PH3230/T3 [NXP]
TRANSISTOR 50 A, 30 V, 0.0073 ohm, N-CHANNEL, Si, POWER, MOSFET, MO-235, PLASTIC, LFPAK-5, FET General Purpose Power;
| 型号： | PH3230/T3 |
| 厂家： | 
NXP |
| 描述： | TRANSISTOR 50 A, 30 V, 0.0073 ohm, N-CHANNEL, Si, POWER, MOSFET, MO-235, PLASTIC, LFPAK-5, FET General Purpose Power 开关 脉冲 晶体管 |
| 文件： | 总13页 (文件大小：255K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
PH3230
N-channel enhancement mode field-effect transistor
M3D748
Rev. 03 — 25 June 2003
Product data
1. Description
The latest generation N-channel enhancement mode field-effect power transistor in a
SOT669 (LFPAK) package.
Product availability:
PH3230 in SOT669 (LFPAK).
2. Features
■ Logic level compatible
■ Low drive current
■ High density mounting
■ Very low on-state resistance.
3. Applications
■ DC-to-DC converters
■ Computer motherboards
■ Switched mode power supplies.
4. Pinning information
Table 1: Pinning - SOT669 (LFPAK), simplified outline and symbol
Pin
1,2,3
4
Description
source (s)
gate (g)
Simplified outline
Symbol
mb
d
mb
mounting base,
connected to
drain (d)
g
1
2
3
4
Top view
MBL286
MBL288
s1 s2 s3
SOT669 (LFPAK)
PH3230
N-channel enhancement mode field-effect transistor
Philips Semiconductors
5. Quick reference data
Table 2: Quick reference data
Symbol Parameter
Conditions
Tj = 25 °C
Typ
Max
30
Unit
V
VDS
ID
drain-source voltage (DC)
drain current (DC)
-
Tmb = 25 °C
Tmb = 25 °C
-
50
A
Ptot
Tj
total power dissipation
junction temperature
-
42
W
-
150
3.7
7.3
°C
mΩ
mΩ
RDSon
drain-source on-state resistance
VGS = 10 V; ID = 25 A; Tj = 25 °C
VGS = 4.5 V; ID = 25 A; Tj = 25 °C
3.2
5.5
6. Limiting values
Table 3: Limiting values
In accordance with the Absolute Maximum Rating System (IEC 60134).
Symbol Parameter
Conditions
Min
Max
30
Unit
V
VDS
VGS
ID
drain-source voltage (DC)
25 °C ≤ Tj ≤ 150 °C
-
gate-source voltage (DC)
drain current (DC)
-
±20
50
V
VGS = 10 V; Tmb = 25 °C; Figure 2 and 4
Tmb = 25 °C; pulsed; tp ≤ 10 µs; Figure 4
Tmb = 25 °C; Figure 1
-
A
IDM
Ptot
Tstg
Tj
peak drain current
-
200
42
A
total power dissipation
storage temperature
junction temperature
-
W
°C
°C
−55
−55
+150
+150
Source-drain diode
ISM peak source (diode forward) current Tmb = 25 °C; pulsed; tp ≤ 10 µs
-
50
A
Avalanche ruggedness
IDS(AL)R repetitive drain-source avalanche
current
-
-
5
A
Tj = 25 °C
EDS(AL)R repetitive drain-source avalanche
energy
Tj = 25 °C; RGS ≥ 50 Ω; IDS(AL)R = 5 A;
VDD = 15 V; duty cycle < 0.1%; Figure 3 and 16
2.5
mJ
9397 750 10949
© Koninklijke Philips Electronics N.V. 2003. All rights reserved.
Product data
Rev. 03 — 25 June 2003
2 of 13
PH3230
N-channel enhancement mode field-effect transistor
Philips Semiconductors
03ag77
03ah31
120
120
I
der
(%)
P
der
(%)
80
80
40
40
0
0
0
50
100
150
200
(°C)
0
50
100
150
200
(°C)
T
T
mb
mb
V
GS ≥ 10 V
Ptot
Pder
=
× 100%
----------------------
P
ID
°
tot(25 C)
Ider
=
× 100%
------------------
I
°
D(25 C)
Fig 1. Normalized total power dissipation as a
function of mounting base temperature.
Fig 2. Normalized continuous drain current as a
function of mounting base temperature.
03aj93
4
E
DS(AL)R
(mJ)
3
2
1
0
0
50
100
150
°
T ( C)
j
IAR = 5 A; VDD = 15 V; duty cycle < 0.1%; RG ≥ 50 Ω
Fig 3. Repetitive drain-source avalanche energy as a function of junction temperature.
9397 750 10949
© Koninklijke Philips Electronics N.V. 2003. All rights reserved.
Product data
Rev. 03 — 25 June 2003
3 of 13
PH3230
N-channel enhancement mode field-effect transistor
Philips Semiconductors
03ag78
3
10
I
D
(A)
Limit R
DSon
= V / I
DS D
t
= 10 µs
p
2
10
100 µs
1 ms
10
DC
10 ms
100 ms
1
-1
10
2
10
V
(V)
1
10
DS
Tmb = 25 °C; IDM is single pulse.
Fig 4. Safe operating area; continuous and peak drain currents as a function of drain-source voltage.
9397 750 10949
© Koninklijke Philips Electronics N.V. 2003. All rights reserved.
Product data
Rev. 03 — 25 June 2003
4 of 13
PH3230
N-channel enhancement mode field-effect transistor
Philips Semiconductors
7. Thermal characteristics
Table 4: Thermal characteristics
Symbol Parameter
Conditions
Min Typ Max Unit
Rth(j-mb) thermal resistance from junction to mounting base Figure 5
-
-
3
K/W
7.1 Transient thermal impedance
03ag76
10
Z
th(j-mb)
(K/W)
δ = 0.5
1
0.2
0.1
0.05
t
p
T
-1
P
δ =
10
10
0.02
t
t
single pulse
p
T
-2
-5
10
-4
-3
-2
10
-1
10
t
p
(s)
10
10
1
10
Fig 5. Transient thermal impedance from junction to mounting base as a function of pulse duration.
9397 750 10949
© Koninklijke Philips Electronics N.V. 2003. All rights reserved.
Product data
Rev. 03 — 25 June 2003
5 of 13
PH3230
N-channel enhancement mode field-effect transistor
Philips Semiconductors
8. Characteristics
Table 5: Characteristics
Tj = 25 °C unless otherwise specified.
Symbol Parameter
Conditions
Min Typ Max Unit
Static characteristics
V(BR)DSS drain-source breakdown voltage
ID = 10 mA; VGS = 0 V
30
1
-
-
-
V
VGS(th)
IDSS
gate-source threshold voltage
drain-source leakage current
gate-source leakage current
drain-source on-state resistance
ID = 1 mA; VDS = VGS; Figure 10
VDS = 30 V; VGS = 0 V
1.9
-
2.5
1
V
µA
µA
mΩ
mΩ
IGSS
VGS = ±16 V; VDS = 0 V
-
0.1
3.2
5.5
10
3.7
7.3
RDSon
VGS = 10 V; ID = 25 A; Figure 8 and 9
VGS = 4.5 V; ID = 25 A; Figure 9
-
-
Dynamic characteristics
gfs
forward transconductance
VDS = 10 V; ID = 25 A; Figure 12
39
-
55
75
16
14
-
-
-
-
S
Qg(tot)
Qgs
Qgd
Ciss
Coss
Crss
td(on)
tr
total gate charge
gate-source charge
gate-drain (Miller) charge
input capacitance
output capacitance
reverse transfer capacitance
turn-on delay time
rise time
ID = 50 A; VDD = 10 V; VGS = 10 V; Figure 15
nC
nC
nC
pF
pF
pF
ns
ns
ns
ns
-
-
VGS = 0 V; VDS = 10 V; f = 1 MHz; Figure 13
-
4750 -
1160 -
-
-
630
25
-
-
-
-
-
VDD = 10 V; ID = 25 A; VGS = 10 V; RG = 4.7 Ω
-
-
50
td(off)
tf
turn-off delay time
fall time
-
90
-
26
Source-drain (reverse) diode
VSD
trr
source-drain (diode forward) voltage IS = 50 A; VGS = 0 V; Figure 14
-
-
0.85 0.98
60
V
reverse recovery time
IS = 50 A; dIS/dt = −50 A/µs; VGS = 0 V
-
ns
9397 750 10949
© Koninklijke Philips Electronics N.V. 2003. All rights reserved.
Product data
Rev. 03 — 25 June 2003
6 of 13
PH3230
N-channel enhancement mode field-effect transistor
Philips Semiconductors
03ag80
03ag79
80
100
10 V
I
D
I
D
T = 25 °C
j
(A)
(A)
V
> I x R
D
DS
DSon
5 V
80
60
4 V
3.5 V
60
40
20
0
40
20
0
150 °C
V
= 3 V
GS
T
= 25 °C
j
0
1
2
3
4
5
0
1
2
3
4
(V)
V
GS
V
(V)
DS
Tj = 25 °C
Tj = 25 °C and 150 °C; VDS > ID × RDSon
Fig 6. Output characteristics: drain current as a
function of drain-source voltage; typical values.
Fig 7. Transfer characteristics: drain current as a
function of gate-source voltage; typical values.
03ah32
03ag85
30
1.8
a
R
DSon
(m
V
= 2.5 V
3 V
GS
)
Ω
20
10
0
1.2
3.5 V
0.6
5 V
10 V
0
0
20
40
60
-80
-20
40
100
160
T (°C)
I
(A)
j
D
Tj = 25 °C
RDSon
a =
---------------------------
R
°
DSon(25 C)
Fig 8. Drain-source on-state resistance as a function
of drain current; typical values.
Fig 9. Normalized drain-source on-state resistance
factor as a function of junction temperature.
9397 750 10949
© Koninklijke Philips Electronics N.V. 2003. All rights reserved.
Product data
Rev. 03 — 25 June 2003
7 of 13
PH3230
N-channel enhancement mode field-effect transistor
Philips Semiconductors
03ah33
03ah30
-1
3
10
I
D
(A)
V
GS(th)
max
-2
-3
-4
-5
-6
(V)
10
2
typ
10
10
10
10
min.
typ.
max.
min
1
0
-80
-20
40
100
160
0
1
2
V
(V)
3
GS
T (°C)
j
ID = 1 mA; VDS = VGS
Tj = 25 °C
Fig 10. Gate-source threshold voltage as a function of
junction temperature
Fig 11. Sub-threshold drain current as a function of
gate-source voltage.
03ag83
03ag81
4
80
10
g
fs
(S)
V
> I x R
D
DS
DSon
C
iss
C
(pF)
T = 25 °C
60
j
150 °C
40
20
0
3
10
C
oss
C
rss
2
10
0
20
40
60
I
80
(A)
-1
2
10
10
1
10
D
V
(V)
DS
Tj = 25 °C and 150 °C; VDS > ID × RDSon
VGS = 0 V; f = 1 MHz
Fig 12. Forward transconductance as a function of
drain current; typical values.
Fig 13. Input, output and reverse transfer capacitances
as a function of drain-source voltage; typical
values.
9397 750 10949
© Koninklijke Philips Electronics N.V. 2003. All rights reserved.
Product data
Rev. 03 — 25 June 2003
8 of 13
PH3230
N-channel enhancement mode field-effect transistor
Philips Semiconductors
03ag84
03ag82
10
100
V
GS
I
S
(A)
80
I
= 50 A
(V)
D
V
= 0 V
GS
8
V
= 10 V
DD
T = 25 °C
j
6
4
2
0
60
40
20
0
150 °C
T = 25 °C
j
0
0.4
0.8
1.2
1.6
0
20
40
60
80
(nC)
Q
G
V
(V)
SD
Tj = 25 °C and 150 °C; VGS = 0 V
Tj = 25 °C; ID = 50 A; VDD = 10 V
Fig 14. Source (diode forward) current as a function of
source-drain (diode forward) voltage; typical
values.
Fig 15. Gate-source voltage as a function of gate
charge; typical values.
9. Test information
L
V
DD
V
DS
V
GS
−I /100
D
R
0
G
T.U.T.
R01
shunt
50 Ω
03am60
V(BR)DSS
---------------------------------------
V(BR)DSS – VDD
EDS(AL)R = 0.5 × (LIDS(AL)R)2 ×
Fig 16. Avalanche energy test circuit.
9397 750 10949
© Koninklijke Philips Electronics N.V. 2003. All rights reserved.
Product data
Rev. 03 — 25 June 2003
9 of 13
PH3230
N-channel enhancement mode field-effect transistor
Philips Semiconductors
10. Package outline
Plastic single-ended surface mounted package (Philips version LFPAK); 4 leads
SOT669
A
2
E
A
C
c
E
b
2
1
2
L
1
mounting
base
D
1
D
H
L
2
1
2
3
4
X
e
w
M
c
A
b
1/2
e
A
(A )
3
A
C
1
θ
L
detail X
y
C
0
2.5
5 mm
scale
DIMENSIONS (mm are the original dimensions)
(1)
D
1
(1)
(1)
(1)
A
A
A
H
L
L
L
w
y
θ
UNIT
A
b
b
c
c
D
E
E
e
1
2
3
1
2
2
2
1
max
1.20 0.15 1.10
1.01 0.00 0.95
0.50 4.41 0.25 0.30 4.10
0.35 3.62 0.19 0.24 3.80
5.0
4.8
3.3
3.1
6.2
5.8
0.85
0.40
1.3
0.8
1.3
0.8
8°
0°
mm
0.25
4.20
1.27
0.25
0.1
Note
1. Plastic or metal protrusions of 0.15 mm maximum per side are not included.
REFERENCES
OUTLINE
EUROPEAN
PROJECTION
ISSUE DATE
VERSION
IEC
JEDEC
JEITA
02-07-10
03-02-05
SOT669
MO-235
Fig 17. SOT669 (LFPAK).
9397 750 10949
© Koninklijke Philips Electronics N.V. 2003. All rights reserved.
Product data
Rev. 03 — 25 June 2003
10 of 13
PH3230
N-channel enhancement mode field-effect transistor
Philips Semiconductors
11. Revision history
Table 6: Revision history
Rev Date
CPCN
-
Description
03 20030625
Product Data (9397 750 10949)
Modifications:
JEDEC reference added to package outline drawing in Figure 17
•
02 20020905
01 20020207
-
-
Product data (9397 750 10122)
Product data (9397 750 09395)
9397 750 10949
© Koninklijke Philips Electronics N.V. 2003. All rights reserved.
Product data
Rev. 03 — 25 June 2003
11 of 13
PH3230
N-channel enhancement mode field-effect transistor
Philips Semiconductors
12. Data sheet status
[1]
[2][3]
Level Data sheet status
Product status
Definition
I
Objective data
Development
This data sheet contains data from the objective specification for product development. Philips
Semiconductors reserves the right to change the specification in any manner without notice.
II
Preliminary data
Qualification
Production
This data sheet contains data from the preliminary specification. Supplementary data will be published
at a later date. Philips Semiconductors reserves the right to change the specification without notice, in
order to improve the design and supply the best possible product.
III
Product data
This data sheet contains data from the product specification. Philips Semiconductors reserves the
right to make changes at any time in order to improve the design, manufacturing and supply. Relevant
changes will be communicated via a Customer Product/Process Change Notification (CPCN).
[1]
[2]
Please consult the most recently issued data sheet before initiating or completing a design.
The product status of the device(s) described in this data sheet may have changed since this data sheet was published. The latest information is available on the Internet at
URL http://www.semiconductors.philips.com.
[3]
For data sheets describing multiple type numbers, the highest-level product status determines the data sheet status.
13. Definitions
14. Disclaimers
Short-form specification — The data in
extracted from a full data sheet with the same type number and title. For
detailed information see the relevant data sheet or data handbook.
a
short-form specification is
Life support — These products are not designed for use in life support
appliances, devices, or systems where malfunction of these products can
reasonably be expected to result in personal injury. Philips Semiconductors
customers using or selling these products for use in such applications do so
at their own risk and agree to fully indemnify Philips Semiconductors for any
damages resulting from such application.
Limiting values definition — Limiting values given are in accordance with
the Absolute Maximum Rating System (IEC 60134). Stress above one or
more of the limiting values may cause permanent damage to the device.
These are stress ratings only and operation of the device at these or at any
other conditions above those given in the Characteristics sections of the
specification is not implied. Exposure to limiting values for extended periods
may affect device reliability.
Right to make changes — Philips Semiconductors reserves the right to
make changes in the products - including circuits, standard cells, and/or
software - described or contained herein in order to improve design and/or
performance. When the product is in full production (status ‘Production’),
relevant changes will be communicated via a Customer Product/Process
Change Notification (CPCN). Philips Semiconductors assumes no
responsibility or liability for the use of any of these products, conveys no
licence or title under any patent, copyright, or mask work right to these
products, and makes no representations or warranties that these products are
free from patent, copyright, or mask work right infringement, unless otherwise
specified.
Application information — Applications that are described herein for any
of these products are for illustrative purposes only. Philips Semiconductors
make no representation or warranty that such applications will be suitable for
the specified use without further testing or modification.
Contact information
For additional information, please visit http://www.semiconductors.philips.com.
For sales office addresses, send e-mail to: sales.addresses@www.semiconductors.philips.com.
Fax: +31 40 27 24825
© Koninklijke Philips Electronics N.V. 2003. All rights reserved.
12 of 13
9397 750 10949
Product data
Rev. 03 — 25 June 2003
PH3230
N-channel enhancement mode field-effect transistor
Philips Semiconductors
Contents
1
Description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1
Features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1
Applications . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1
Pinning information. . . . . . . . . . . . . . . . . . . . . . 1
Quick reference data . . . . . . . . . . . . . . . . . . . . . 2
Limiting values. . . . . . . . . . . . . . . . . . . . . . . . . . 2
Thermal characteristics. . . . . . . . . . . . . . . . . . . 5
Transient thermal impedance . . . . . . . . . . . . . . 5
Characteristics. . . . . . . . . . . . . . . . . . . . . . . . . . 6
Test information. . . . . . . . . . . . . . . . . . . . . . . . . 9
Package outline . . . . . . . . . . . . . . . . . . . . . . . . 10
Revision history. . . . . . . . . . . . . . . . . . . . . . . . 11
Data sheet status . . . . . . . . . . . . . . . . . . . . . . . 12
Definitions . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12
Disclaimers. . . . . . . . . . . . . . . . . . . . . . . . . . . . 12
2
3
4
5
6
7
7.1
8
9
10
11
12
13
14
© Koninklijke Philips Electronics N.V. 2003.
Printed in The Netherlands
All rights are reserved. Reproduction in whole or in part is prohibited without the prior
written consent of the copyright owner.
The information presented in this document does not form part of any quotation or
contract, is believed to be accurate and reliable and may be changed without notice. No
liability will be accepted by the publisher for any consequence of its use. Publication
thereof does not convey nor imply any license under patent- or other industrial or
intellectual property rights.
Date of release: 25 June 2003
Document order number: 9397 750 10949
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