PHD95N03LT [NXP]

N-channel enhancement mode field-effect transistor; N沟道增强模式音响场效晶体管
PHD95N03LT
型号: PHD95N03LT
厂家: NXP    NXP
描述:

N-channel enhancement mode field-effect transistor
N沟道增强模式音响场效晶体管

晶体 晶体管 功率场效应晶体管 开关 脉冲
文件: 总13页 (文件大小:263K)
中文:  中文翻译
下载:  下载PDF数据表文档文件
PHD95N03LT  
N-channel enhancement mode field-effect transistor  
Rev. 01 — 18 July 2001  
Product data  
M3D300  
1. Description  
N-channel logic level field-effect power transistor in a plastic package using  
TrenchMOS™1 technology.  
Product availability:  
PHD95N03LT in SOT428 (D-PAK).  
2. Features  
Low on-state resistance  
Fast switching.  
3. Applications  
High frequency computer motherboard DC to DC converters  
4. Pinning information  
c
c
Table 1: Pinning - SOT428, simplified outline and symbol  
Pin  
1
Description  
gate (g)  
Simplified outline  
Symbol  
d
s
mb  
[1]  
2
drain (d)  
3
source (s)  
g
mb  
mounting base,  
connected to drain (d)  
MBB076  
2
1
3
Top view  
MBK091  
SOT428 (D-Pak)  
[1] It is not possible to make connection to pin 2 of the SOT428 package.  
1. TrenchMOS is a trademark of Royal Philips Electronics.  
PHD95N03LT  
N-channel enhancement mode field-effect transistor  
Philips Semiconductors  
5. Quick reference data  
Table 2: Quick reference data  
Symbol Parameter  
Conditions  
Typ  
Max  
25  
Unit  
V
VDS  
ID  
drain-source voltage (DC)  
drain current (DC)  
Tj = 25 to 175 °C  
Tmb = 25 °C; VGS = 5 V  
Tmb = 25 °C  
75  
A
Ptot  
Tj  
total power dissipation  
junction temperature  
115  
175  
7
W
°C  
mΩ  
mΩ  
RDSon  
drain-source on-state resistance  
VGS = 10 V; ID = 25 A  
VGS = 5 V; ID = 25 A  
5
7.5  
9
6. Limiting values  
Table 3: Limiting values  
In accordance with the Absolute Maximum Rating System (IEC 60134).  
Symbol Parameter  
Conditions  
Min  
Max  
25  
Unit  
V
VDS  
drain-source voltage (DC)  
Tj = 25 to 175 °C  
VDGR  
VGS  
drain-gate voltage (DC)  
gate-source voltage (DC)  
gate-source voltage  
Tj = 25 to 175 °C; RGS = 20 kΩ  
25  
V
±15  
±20  
V
VGSM  
tp 50 µs; pulsed;  
V
duty cycle 25 %; Tj 150 °C  
ID  
drain current (DC)  
Tmb = 25 °C; VGS = 5 V; Figure 2 and 3  
Tmb = 100 °C; VGS = 5 V; Figure 2  
Tmb = 25 °C; pulsed; tp 10 µs; Figure 3  
Tmb = 25 °C; Figure 1  
75  
A
61  
A
IDM  
Ptot  
Tstg  
Tj  
peak drain current  
240  
115  
+175  
+175  
A
total power dissipation  
storage temperature  
W
°C  
°C  
55  
55  
operating junction temperature  
Source-drain diode  
IS  
source (diode forward) current (DC) Tmb = 25 °C  
75  
A
A
ISM  
peak source (diode forward) current Tmb = 25 °C; pulsed; tp 10 µs  
240  
Avalanche ruggedness  
EAS non-repetitive avalanche energy  
unclamped inductive load;  
ID = 75 A; tp = 0.1 ms; VDD = 15 V;  
RGS = 50 ; VGS = 5V; starting Tj = 25 °C;  
120  
75  
mJ  
A
IAS  
non-repetitive avalanche current  
unclamped inductive load;  
VDD = 15 V; RGS = 50 ; VGS = 5V;  
starting Tj = 25 °C  
9397 750 08216  
© Philips Electronics N.V. 2001. All rights reserved.  
Product data  
Rev. 01 — 18 July 2001  
2 of 13  
PHD95N03LT  
N-channel enhancement mode field-effect transistor  
Philips Semiconductors  
03aa16  
03ae86  
120  
120  
der  
P
I
der  
(%)  
100  
(%)  
100  
80  
80  
60  
40  
20  
0
60  
40  
20  
0
0
50  
100  
200  
150  
T
0
50  
100  
150  
200  
o
( C)  
T
(ºC)  
mb  
mb  
Ptot  
ID  
Pder  
=
× 100%  
Ider  
=
× 100%  
----------------------  
------------------  
P
I
°
°
tot(25 C)  
D(25 C)  
Fig 1. Normalized total power dissipation as a  
function of mounting base temperature.  
Fig 2. Normalized continuous drain current as a  
function of mounting base temperature.  
03ae87  
3
10  
I
D
R
= V  
/ I  
DS D  
DSon  
(A)  
tp = 10 µs  
100 µs  
2
10  
1 ms  
D.C.  
10  
t
p
P
δ =  
10 ms  
T
100 ms  
t
t
p
T
1
2
1
10  
10  
V
(V)  
DS  
Tmb = 25 °C; IDM is single pulse.  
Fig 3. Safe operating area; continuous and peak drain currents as a function of drain-source voltage.  
9397 750 08216  
© Philips Electronics N.V. 2001. All rights reserved.  
Product data  
Rev. 01 — 18 July 2001  
3 of 13  
PHD95N03LT  
N-channel enhancement mode field-effect transistor  
Philips Semiconductors  
7. Thermal characteristics  
Table 4: Thermal characteristics  
Symbol Parameter  
Conditions  
Value Unit  
Rth(j-mb) thermal resistance from junction to mounting  
base  
Figure 4  
1.3  
K/W  
Rth(j-a)  
thermal resistance from junction to ambient  
mounted on a printed circuit board;  
minimum footprint  
50  
K/W  
7.1 Transient thermal impedance  
03ae85  
10  
Z
th(j-mb)  
(K/W)  
1
δ = 0.5  
0.2  
0.1  
-1  
10  
10  
10  
0.05  
t
p
0.02  
P
δ =  
T
-2  
-3  
single pulse  
t
t
p
T
-5  
10  
-3  
10  
-2  
10  
-1  
10  
10  
1
10  
t
(s)  
p
Fig 4. Transient thermal impedance from junction to mounting base as a function of pulse duration.  
9397 750 08216  
© Philips Electronics N.V. 2001. All rights reserved.  
Product data  
Rev. 01 — 18 July 2001  
4 of 13  
PHD95N03LT  
N-channel enhancement mode field-effect transistor  
Philips Semiconductors  
8. Characteristics  
Table 5: Characteristics  
Tj = 25 °C unless otherwise specified  
Symbol Parameter  
Conditions  
Min Typ Max Unit  
Static characteristics  
V(BR)DSS drain-source breakdown voltage  
ID = 0.25 mA; VGS = 0 V  
Tj = 25 °C  
25  
22  
V
V
Tj = 55 °C  
VGS(th)  
gate-source threshold voltage  
drain-source leakage current  
ID = 1 mA; VDS = VGS; Figure 9  
Tj = 25 °C  
1
1.5  
2
V
V
V
Tj = 175 °C  
0.5  
Tj = 55 °C  
2.3  
IDSS  
VDS = 25 V; VGS = 0 V  
Tj = 25 °C  
0.05 10  
µA  
Tj = 175 °C  
500 µA  
IGSS  
gate-source leakage current  
VGS = ±5 V; VDS = 0 V  
VGS = 5 V; ID = 25 A; Figure 7 and 8  
Tj = 25 °C  
10  
100 nA  
RDSon  
drain-source on-state resistance  
7.5  
13  
9
mΩ  
Tj = 175 °C  
15.5 mΩ  
VGS = 10 V; ID = 25 A; Figure 7 and 8  
Tj = 25 °C  
5
7
mΩ  
Dynamic characteristics  
gfs  
forward transconductance  
VDS = 25 V; ID = 50 A  
50  
43  
12  
16  
S
Qg(tot)  
Qgs  
Qgd  
Ciss  
Coss  
Crss  
td(on)  
tr  
total gate charge  
ID = 50 A; VDD = 12 V; VGS = 4.5 V;  
Figure 13  
nC  
nC  
nC  
pF  
pF  
pF  
ns  
ns  
gate-source charge  
gate-drain (Miller) charge  
input capacitance  
VGS = 0 V; VDS = 25 V; f = 1 MHz; Figure 11  
2200 −  
output capacitance  
reverse transfer capacitance  
turn-on delay time  
turn-on rise time  
770  
500  
10  
VDD = 15 V; ID = 15 A; VGS = 10 V;  
RG = 6 ; resistive load  
20  
50  
30  
td(off)  
tf  
turn-off delay time  
turn-off fall time  
110 140 ns  
80 100 ns  
Source-drain diode  
VSD  
source-drain (diode forward) voltage IS = 25 A; VGS = 0 V; Figure 12  
0.85 1.2  
0.9  
V
V
IS = 40 A; VGS = 0 V; Figure 12  
9397 750 08216  
© Philips Electronics N.V. 2001. All rights reserved.  
Product data  
Rev. 01 — 18 July 2001  
5 of 13  
PHD95N03LT  
N-channel enhancement mode field-effect transistor  
Philips Semiconductors  
03ad78  
03ad80  
75  
75  
10 V 5 V  
3.5 V  
I
I
T = 25 ºC  
j
D
D
V
> I x R  
D
DS  
DSon  
(A)  
60  
(A)  
60  
45  
30  
15  
0
45  
30  
15  
0
3 V  
T = 25 ºC  
j
175 ºC  
V
= 2.5 V  
GS  
0
0.4  
0.8  
1.2  
1.6  
2
(V)  
0
1
2
3
4
V
(V)  
GS  
V
DS  
Tj = 25 °C  
Tj = 25 °C and 175 °C; VDS ID x RDSON  
Fig 5. Output characteristics: drain current as a  
function of drain-source voltage; typical values.  
Fig 6. Transfer characteristics: drain current as a  
function of gate-source voltage; typical values.  
03ad57  
03ad79  
2
0.06  
DSon  
R
2.5 V  
T = 25 ºC  
j
a
()  
0.05  
V
= 3 V  
GS  
1.6  
0.04  
0.03  
0.02  
0.01  
0
1.2  
0.8  
0.4  
0
3.5 V  
5V  
10 V  
-60  
0
60  
120  
180  
0
15  
30  
45  
60  
75  
Tj (ºC)  
I
(A)  
D
Tj = 25 °C  
RDSon  
a =  
---------------------------  
RDSon(25 C)  
°
Fig 7. Drain-source on-state resistance as a function  
of drain current; typical values.  
Fig 8. Normalized drain-source on-state resistance  
factor as a function of junction temperature.  
9397 750 08216  
© Philips Electronics N.V. 2001. All rights reserved.  
Product data  
Rev. 01 — 18 July 2001  
6 of 13  
PHD95N03LT  
N-channel enhancement mode field-effect transistor  
Philips Semiconductors  
03aa33  
03aa36  
2.5  
-1  
10  
V
I
GS(th)  
D
(V)  
(A)  
max  
2
-2  
10  
typ  
-3  
1.5  
10  
min  
typ  
max  
min  
-4  
-5  
-6  
1
10  
10  
10  
0.5  
0
-60  
0
60  
120  
180  
0
0.5  
1
1.5  
2
2.5  
V
3
(V)  
T (oC)  
j
GS  
ID = 1 mA; VDS = VGS  
Tj = 25 °C; VDS = 5 V  
Fig 9. Gate-source threshold voltage as a function of  
junction temperature.  
Fig 10. Sub-threshold drain current as a function of  
gate-source voltage.  
03ad83  
4
10  
C
iss  
C
oss  
C
rss  
C
iss  
(pF)  
3
10  
C
oss  
C
rss  
2
10  
-1  
2
10  
1
10  
10  
V
(V)  
DS  
VGS = 0 V; f = 1 MHz  
Fig 11. Input, output and reverse transfer capacitances as a function of drain-source voltage; typical values.  
9397 750 08216  
© Philips Electronics N.V. 2001. All rights reserved.  
Product data  
Rev. 01 — 18 July 2001  
7 of 13  
PHD95N03LT  
N-channel enhancement mode field-effect transistor  
Philips Semiconductors  
03ad82  
03ad84  
75  
I
10  
V
T = 25 ºC  
V
= 0 V  
S
GS  
j
GS  
(A)  
60  
(V)  
8
I
= 50 A  
D
V
= 6 V  
12 V 24 V  
DD  
45  
30  
15  
0
6
4
2
0
T = 25 ºC  
175 ºC  
j
0
0.3  
0.6  
0.9  
1.2  
(V)  
0
30  
60  
90  
Q
(nC)  
V
G
SD  
Tj = 25 °C and 175 °C; VGS = 0 V  
ID = 50 A; VDD = 24 V, 12 V and 6 V  
Fig 12. Source (diode forward) current as a function of  
source-drain (diode forward) voltage; typical  
values.  
Fig 13. Gate-source voltage as a function of gate  
charge; typical values.  
9397 750 08216  
© Philips Electronics N.V. 2001. All rights reserved.  
Product data  
Rev. 01 — 18 July 2001  
8 of 13  
PHD95N03LT  
N-channel enhancement mode field-effect transistor  
Philips Semiconductors  
9. Package outline  
Plastic single-ended surface mounted package (Philips version of D-PAK); 3 leads  
(one lead cropped)  
SOT428  
seating plane  
y
A
A
E
A
2
A
b
D
1
1
2
mounting  
base  
E
1
D
H
E
L
2
2
L
1
L
1
3
b
b
w
M
A
c
1
e
e
1
0
10  
20 mm  
scale  
DIMENSIONS (mm are the original dimensions)  
b
E
H
E
max.  
D
L
1
min.  
A
max.  
E
max.  
y
D
max.  
1
1
(1)  
1
A
A
b
2
UNIT  
mm  
b
c
e
e
1
L
L
w
2
1
2
max.  
max.  
min.  
max.  
0.65 0.89  
0.45 0.71  
0.7  
0.5  
2.38  
2.22  
0.89 1.1  
0.71 0.9  
5.36  
5.26  
0.4 6.22  
0.2 5.98  
6.73  
6.47  
10.4 2.95  
9.6  
2.55  
4.81  
4.45  
4.57  
0.2  
0.2  
4.0 2.285  
0.5  
Note  
1. Measured from heatsink back to lead.  
REFERENCES  
EUROPEAN  
PROJECTION  
OUTLINE  
VERSION  
ISSUE DATE  
IEC  
JEDEC  
EIAJ  
98-04-07  
99-09-13  
SOT428  
TO-252  
SC-63  
Fig 14. SOT428 (D-PAK).  
9397 750 08216  
© Philips Electronics N.V. 2001. All rights reserved.  
Product data  
Rev. 01 — 18 July 2001  
9 of 13  
PHD95N03LT  
N-channel enhancement mode field-effect transistor  
Philips Semiconductors  
10. Revision history  
Table 6: Revision history  
Rev Date  
CPCN  
-
Description  
01 20010718  
Product data; initial version  
9397 750 08216  
© Philips Electronics N.V. 2001. All rights reserved.  
Product data  
Rev. 01 — 18 July 2001  
10 of 13  
PHD95N03LT  
N-channel enhancement mode field-effect transistor  
Philips Semiconductors  
11. Data sheet status  
[1]  
[2]  
Data sheet status  
Product status  
Definition  
Objective data  
Development  
This data sheet contains data from the objective specification for product development. Philips Semiconductors  
reserves the right to change the specification in any manner without notice.  
Preliminary data  
Product data  
Qualification  
Production  
This data sheet contains data from the preliminary specification. Supplementary data will be published at a  
later date. Philips Semiconductors reserves the right to change the specification without notice, in order to  
improve the design and supply the best possible product.  
This data sheet contains data from the product specification. Philips Semiconductors reserves the right to  
make changes at any time in order to improve the design, manufacturing and supply. Changes will be  
communicated according to the Customer Product/Process Change Notification (CPCN) procedure  
SNW-SQ-650A.  
[1]  
[2]  
Please consult the most recently issued data sheet before initiating or completing a design.  
The product status of the device(s) described in this data sheet may have changed since this data sheet was published. The latest information is available on the Internet at  
URL http://www.semiconductors.philips.com.  
12. Definitions  
13. Disclaimers  
Short-form specification The data in  
extracted from a full data sheet with the same type number and title. For  
detailed information see the relevant data sheet or data handbook.  
a
short-form specification is  
Life support — These products are not designed for use in life support  
appliances, devices, or systems where malfunction of these products can  
reasonably be expected to result in personal injury. Philips Semiconductors  
customers using or selling these products for use in such applications do so  
at their own risk and agree to fully indemnify Philips Semiconductors for any  
damages resulting from such application.  
Limiting values definition Limiting values given are in accordance with  
the Absolute Maximum Rating System (IEC 60134). Stress above one or  
more of the limiting values may cause permanent damage to the device.  
These are stress ratings only and operation of the device at these or at any  
other conditions above those given in the Characteristics sections of the  
specification is not implied. Exposure to limiting values for extended periods  
may affect device reliability.  
Right to make changes — Philips Semiconductors reserves the right to  
make changes, without notice, in the products, including circuits, standard  
cells, and/or software, described or contained herein in order to improve  
design and/or performance. Philips Semiconductors assumes no  
responsibility or liability for the use of any of these products, conveys no  
licence or title under any patent, copyright, or mask work right to these  
products, and makes no representations or warranties that these products  
are free from patent, copyright, or mask work right infringement, unless  
otherwise specified.  
Application information Applications that are described herein for any  
of these products are for illustrative purposes only. Philips Semiconductors  
make no representation or warranty that such applications will be suitable for  
the specified use without further testing or modification.  
9397 750 08216  
© Philips Electronics N.V. 2001 All rights reserved.  
Product data  
Rev. 01 — 18 July 2001  
11 of 13  
PHD95N03LT  
N-channel enhancement mode field-effect transistor  
Philips Semiconductors  
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For all other countries apply to: Philips Semiconductors,  
Marketing Communications,  
Internet: http://www.semiconductors.philips.com  
Building BE, P.O. Box 218, 5600 MD EINDHOVEN,  
The Netherlands, Fax. +31 40 272 4825  
(SCA72)  
9397 750 08216  
© Philips Electronics N.V. 2001. All rights reserved.  
Product data  
Rev. 01 — 18 July 2001  
12 of 13  
PHD95N03LT  
N-channel enhancement mode field-effect transistor  
Philips Semiconductors  
Contents  
1
Description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1  
Features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1  
Applications . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1  
Pinning information. . . . . . . . . . . . . . . . . . . . . . 1  
Quick reference data . . . . . . . . . . . . . . . . . . . . . 2  
Limiting values. . . . . . . . . . . . . . . . . . . . . . . . . . 2  
Thermal characteristics. . . . . . . . . . . . . . . . . . . 4  
Transient thermal impedance . . . . . . . . . . . . . . 4  
Characteristics. . . . . . . . . . . . . . . . . . . . . . . . . . 5  
Package outline . . . . . . . . . . . . . . . . . . . . . . . . . 9  
Revision history. . . . . . . . . . . . . . . . . . . . . . . . 10  
Data sheet status . . . . . . . . . . . . . . . . . . . . . . . 11  
Definitions . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11  
Disclaimers. . . . . . . . . . . . . . . . . . . . . . . . . . . . 11  
2
3
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7.1  
8
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10  
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12  
13  
© Philips Electronics N.V. 2001.  
Printed in The Netherlands  
All rights are reserved. Reproduction in whole or in part is prohibited without the prior  
written consent of the copyright owner.  
The information presented in this document does not form part of any quotation or  
contract, is believed to be accurate and reliable and may be changed without notice. No  
liability will be accepted by the publisher for any consequence of its use. Publication  
thereof does not convey nor imply any license under patent- or other industrial or  
intellectual property rights.  
Date of release: 18 July 2001  
Document order number: 9397 750 08216  

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