PHP2N60 [NXP]
PowerMOS transistor; 功率MOS晶体管
| 型号： | PHP2N60 |
| 厂家： | 
NXP |
| 描述： | PowerMOS transistor |
| 文件： | 总7页 (文件大小：53K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
Philips Semiconductors
Product specification
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PowerMOS transistor PHP2N60
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GENERAL DESCRIPTION
QUICK REFERENCE DATA
N-channel enhancement mode
field-effect power transistor in a
plastic envelope featuring high
avalanche energy capability, stable
SYMBOL
PARAMETER
MAX.
UNIT
---------------- ------------------------------------------------------- ----------- -----------
VDS
ID
Drain-source voltage
Drain current (DC)
Total power dissipation
Drain-source on-state resistance
600
2.8
83
V
A
W
Ω
off-state
characteristics,
fast
Ptot
switching and high thermal cycling
performance with low thermal
resistance. Intended for use in
Switched Mode Power Supplies
(SMPS), motor control circuits and
RDS(ON)
4.4
general
applications.
purpose
switching
PINNING - TO220AB
PIN CONFIGURATION
SYMBOL
PIN
1
DESCRIPTION
d
tab
gate
2
drain
g
3
source
tab drain
1 2 3
s
LIMITING VALUES
Limiting values in accordance with the Absolute Maximum System (IEC 134)
SYMBOL PARAMETER
CONDITIONS
MIN.
MAX.
UNIT
ID
Continuous drain current
Tmb = 25 ˚C; VGS = 10 V
Tmb = 100 ˚C; VGS = 10 V
Tmb = 25 ˚C
-
-
-
-
-
-
-
2.8
1.8
11
A
A
IDM
PD
Pulsed drain current
Total dissipation
A
Tmb = 25 ˚C
83
W
∆PD/∆Tmb Linear derating factor
Tmb > 25 ˚C
0.67
± 30
84
W/K
V
VGS
EAS
Gate-source voltage
Single pulse avalanche
energy
V
DD ≤ 50 V; starting Tj = 25˚C; RGS = 50 Ω;
VGS = 10 V
DD ≤ 50 V; starting Tj = 25˚C; RGS = 50 Ω;
VGS = 10 V
mJ
IAS
Peak avalanche current
V
-
2.2
A
Tj, Tstg
Operating junction and
storage temperature range
- 55
150
˚C
THERMAL RESISTANCES
SYMBOL PARAMETER
CONDITIONS
MIN. TYP. MAX. UNIT
Rth j-mb
Thermal resistance junction to
-
-
1.5
K/W
mounting base
Rth j-a
Thermal resistance junction to
ambient
-
60
-
K/W
April 1997
1
Rev 1.001
Philips Semiconductors
Product specification
--------------------------------------------------------------------------------------------------------------
PowerMOS transistor PHP2N60
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ELECTRICAL CHARACTERISTICS
Tj = 25 ˚C unless otherwise specified
SYMBOL PARAMETER
CONDITIONS
MIN. TYP. MAX. UNIT
V(BR)DSS
Drain-source breakdown
VGS = 0 V; ID = 0.25 mA
600
-
-
-
-
V
voltage
∆V(BR)DSS
∆Tj
/
Drain-source breakdown
voltage temperature coefficient
Drain-source on resistance
Gate threshold voltage
Forward transconductance
Drain-source leakage current
VDS = VGS; ID = 0.25 mA
0.7
V/K
RDS(ON)
VGS(TO)
gfs
VGS = 10 V; ID = 1.3 A
VDS = VGS; ID = 0.25 mA
VDS = 30 V; ID = 1.3 A
VDS = 600 V; VGS = 0 V
VDS = 480 V; VGS = 0 V; Tj = 125 ˚C
VGS = ±30 V; VDS = 0 V
-
2.0
0.7
-
-
-
4.0
3.0
1.7
1
60
10
4.4
4.0
-
100
500
200
Ω
V
S
µA
µA
nA
IDSS
IGSS
Gate-source leakage current
Qg(tot)
Qgs
Qgd
Total gate charge
Gate-source charge
Gate-drain (Miller) charge
ID = 2 A; VDD = 360 V; VGS = 10 V
-
-
-
25
2
12
30
3
15
nC
nC
nC
td(on)
tr
td(off)
tf
Turn-on delay time
Turn-on rise time
Turn-off delay time
Turn-off fall time
VDD = 300 V; ID = 2 A;
RG = 18 Ω; RD = 150 Ω
-
-
-
-
10
26
66
30
-
-
-
-
ns
ns
ns
ns
Ld
Ld
Ls
Internal drain inductance
Internal drain inductance
Internal source inductance
Measured from contact screw on
tab to centre of die
Measured from drain lead 6 mm
from package to centre of die
Measured from source lead 6 mm
from package to source bond pad
-
-
-
3.5
4.5
7.5
-
-
-
nH
nH
nH
Ciss
Coss
Crss
Input capacitance
Output capacitance
Feedback capacitance
VGS = 0 V; VDS = 25 V; f = 1 MHz
-
-
-
300
43
25
-
-
-
pF
pF
pF
SOURCE-DRAIN DIODE RATINGS AND CHARACTERISTICS
Tj = 25 ˚C unless otherwise specified
SYMBOL PARAMETER
CONDITIONS
MIN. TYP. MAX. UNIT
IS
Continuous source current
Tmb = 25˚C
-
-
-
-
-
-
2.8
A
A
V
(body diode)
ISM
VSD
Pulsed source current (body
diode)
Diode forward voltage
Tmb = 25˚C
11
IS = 2.2 A; VGS = 0 V
1.2
trr
Qrr
Reverse recovery time
Reverse recovery charge
IS = 2 A; VGS = 0 V; dI/dt = 100 A/µs
-
-
500
3
-
-
ns
µC
April 1997
2
Rev 1.001
Philips Semiconductors
Product specification
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PowerMOS transistor PHP2N60
----------------------------------------------------------------------------------------------------------------------------------------------------------
Normalised Power Derating
PD%
Zth j-mb / (K/W)
120
110
100
90
80
70
60
50
40
30
20
10
0
10
1
D =
0.5
0.2
0.1
0.1
0.01
0.05
tp
T
tp
P
D
D =
0.02
0
t
T
0
20
40
60
80
Tmb /
100
120
140
1E-05
1E-03
t / s
1E-01
1E+01
C
Fig.1. Normalised power dissipation.
PD% = 100 PD/PD 25 ˚C = f(Tmb)
Fig.4. Transient thermal impedance.
Zth j-mb = f(t); parameter D = tp/T
ID%
Normalised Current Derating
10 V
ID, Drain current (Amps)
Tj = 25 C
5
4
3
2
1
0
120
100
80
60
40
20
0
6 V
5.5 V
5 V
VGS = 4.5 V
0
5
10
15
20
25
30
0
50
100
150
Tmb / C
VDS, Drain-Source voltage (Volts)
Fig.2. Normalised continuous drain current.
ID% = 100 ID/ID 25 ˚C = f(Tmb); conditions: VGS ≥ 10 V
Fig.5. Typical output characteristics.
ID = f(VDS); parameter VGS
RDS(on), Drain-Source on resistance (Ohms)
ID, Drain current (Amps)
10
8
100
10
1
5 V
VGS = 4.5 V
Tj = 25 C
5.5 V
6 V
6
10 V
tp = 10 us
4
100 us
1 ms
DC
2
10 ms
100 ms
0.1
0
10
100
1000
10000
0
1
2
3
4
5
VDS, Drain-source voltage (Volts)
ID, Drain current (Amps)
Fig.3. Safe operating area. Tmb = 25 ˚C
ID & IDM = f(VDS); IDM single pulse; parameter tp
Fig.6. Typical on-state resistance.
RDS(ON) = f(ID); parameter VGS
April 1997
3
Rev 1.001
Philips Semiconductors
Product specification
--------------------------------------------------------------------------------------------------------------
PowerMOS transistor PHP2N60
----------------------------------------------------------------------------------------------------------------------------------------------------------
VGS(TO) / V
Tj = 25 C
ID, Drain current (Amps)
VDS = 30 V
5
4
3
2
1
0
max.
4
3
2
1
0
typ.
Tj = 150 C
min.
-60 -40 -20
0
20
40
60
80 100 120 140
0
2
4
6
8
10
VGS, Gate-Source voltage (Volts)
Tj /
C
Fig.7. Typical transfer characteristics.
ID = f(VGS); parameter Tj
Fig.10. Gate threshold voltage.
VGS(TO) = f(Tj); conditions: ID = 0.25 mA; VDS = VGS
SUB-THRESHOLD CONDUCTION
ID / A
gfs, Transconductance (S)
VDS = 30 V
1E-01
1E-02
1E-03
1E-04
1E-05
1E-06
3
2.5
2
2 %
typ
98 %
1.5
1
150 C
Tj = 25 C
0.5
0
0
1
2
3
4
0
1
2
3
4
5
ID, Drain current (A)
VGS / V
Fig.8. Typical transconductance.
gfs = f(ID); parameter Tj
Fig.11. Sub-threshold drain current.
ID = f(VGS); conditions: Tj = 25 ˚C; VDS = VGS
Normalised RDS(ON) = f(Tj)
a
Junction capacitances (pF)
1000
100
10
Ciss
2
1
0
Coss
Crss
1
-60 -40 -20
0
20 40 60 80 100 120 140
Tj /
1
10
100
1000
C
VDS, Drain-Source voltage (Volts)
Fig.9. Normalised drain-source on-state resistance.
a = RDS(ON)/RDS(ON)25 ˚C = f(Tj); ID = 2 A; VGS = 10 V
Fig.12. Typical capacitances, Ciss, Coss, Crss.
C = f(VDS); conditions: VGS = 0 V; f = 1 MHz
April 1997
4
Rev 1.001
Philips Semiconductors
Product specification
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PowerMOS transistor PHP2N60
----------------------------------------------------------------------------------------------------------------------------------------------------------
IF, Source-Drain diode current (Amps)
VGS = 0 V
VGS, Gate-Source voltage (Volts)
ID = 2.0 A
20
15
10
5
15
10
5
240 V
Tj = 25 C
120 V
VDD = 360 V
150 C
Tj = 25 C
0
0
0
10
20
Qg, Gate charge (nC)
30
40
0
0.5
1
1.5
VSDS, Source-Drain voltage (Volts)
Fig.13. Typical turn-on gate-charge characteristics.
VGS = f(QG); parameter VDS
Fig.16. Source-Drain diode characteristic.
IF = f(VSDS); parameter Tj
Switching times (ns)
EAS, Normalised unclamped inductive energy (%)
120
1000
100
10
VDD = 300 V
VGS = 10 V
RD = 150 Ohms
ID = 2 A
Tj = 25 C
110
100
90
80
70
60
50
40
30
20
10
0
td(off)
tf
tr
td(on)
1
0
10
20
30
40
50
60
20
40
60
80
100
120
140
RG, Gate resistance (Ohms)
Starting Tj ( C)
Fig.14. Typical switching times.
td(on), tr, td(off), tf = f(RG)
Fig.17. Normalised unclamped inductive energy.
EAS% = f(Tj)
Normalised Drain-source breakdown voltage
V(BR)DSS @ Tj
1.15
1.1
VDD
V(BR)DSS @ 25 C
+
L
1.05
1
VDS
-
VGS
-ID/100
T.U.T.
0
0.95
0.9
R 01
RGS
shunt
0.85
-100
-50
0
50
100
150
Tj, Junction temperature (C)
Fig.18. Unclamped inductive test circuit.
Fig.15. Normalised drain-source breakdown voltage.
V(BR)DSS/V(BR)DSS 25 ˚C = f(Tj)
EAS = 0.5 LID2 V(BR)DSS/(V(BR)DSS − VDD
)
April 1997
5
Rev 1.001
Philips Semiconductors
Product specification
--------------------------------------------------------------------------------------------------------------
PowerMOS transistor PHP2N60
----------------------------------------------------------------------------------------------------------------------------------------------------------
MECHANICAL DATA
Dimensions in mm
4,5
max
Net Mass: 2 g
10,3
max
1,3
3,7
2,8
5,9
min
15,8
max
3,0 max
3,0
not tinned
13,5
min
1,3
1 2 3
max
(2x)
0,9 max (3x)
0,6
2,4
2,54 2,54
Fig.19. TO220AB; pin 2 connected to mounting base.
Notes
1. Observe the general handling precautions for electrostatic-discharge sensitive devices (ESDs) to prevent
damage to MOS gate oxide.
2. Refer to mounting instructions for TO220 envelopes.
3. Epoxy meets UL94 V0 at 1/8".
April 1997
6
Rev 1.001
Philips Semiconductors
Product specification
--------------------------------------------------------------------------------------------------------------
PowerMOS transistor PHP2N60
----------------------------------------------------------------------------------------------------------------------------------------------------------
DEFINITIONS
Data sheet status
Objective specification
This data sheet contains target or goal specifications for product development.
Preliminary specification This data sheet contains preliminary data; supplementary data may be published later.
Product specification
This data sheet contains final product specifications.
Limiting values
Limiting values are given in accordance with the Absolute Maximum Rating System (IEC 134). Stress above one
or more of the limiting values may cause permanent damage to the device. These are stress ratings only and
operation of the device at these or at any other conditions above those given in the Characteristics sections of
this specification is not implied. Exposure to limiting values for extended periods may affect device reliability.
Application information
Where application information is given, it is advisory and does not form part of the specification.
Philips Electronics N.V. 1997
All rights are reserved. Reproduction in whole or in part is prohibited without the prior written consent of the
copyright owner.
The information presented in this document does not form part of any quotation or contract, it is believed to be
accurate and reliable and may be changed without notice. No liability will be accepted by the publisher for any
consequence of its use. Publication thereof does not convey nor imply any license under patent or other
industrial or intellectual property rights.
LIFE SUPPORT APPLICATIONS
These products are not designed for use in life support appliances, devices or systems where malfunction of these
products can be reasonably expected to result in personal injury. Philips customers using or selling these products
for use in such applications do so at their own risk and agree to fully indemnify Philips for any damages resulting
from such improper use or sale.
April 1997
7
Rev 1.001
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