PSMN4R3-30PL [NXP]
N-channel 30 V 4.3 mΩ logic level MOSFET; N沟道30 V 4.3 mΩ的逻辑电平MOSFET型号: | PSMN4R3-30PL |
厂家: | NXP |
描述: | N-channel 30 V 4.3 mΩ logic level MOSFET |
文件: | 总13页 (文件大小:216K) |
中文: | 中文翻译 | 下载: | 下载PDF数据表文档文件 |
PSMN4R3-30PL
N-channel 30 V 4.3 mΩ logic level MOSFET
Rev. 01 — 16 June 2009
Product data sheet
1. Product profile
1.1 General description
Logic level N-channel MOSFET in TO220 package qualified to 175 °C. This product is
designed and qualified for use in a wide range of industrial, communications and domestic
equipment.
1.2 Features and benefits
High efficiency due to low switching
Suitable for logic level gate drive
and conduction losses
sources
1.3 Applications
DC-to-DC converters
Load switiching
Motor control
Server power supplies
1.4 Quick reference data
Table 1.
Quick reference
Symbol Parameter
Conditions
drain-source voltage Tj ≥ 25 °C; Tj ≤ 175 °C
Min
Typ
Max Unit
VDS
ID
-
-
-
-
30
V
A
drain current
Tmb = 25 °C; VGS = 10 V;
see Figure 1
[1]
100
Ptot
total power
dissipation
Tmb = 25 °C; see Figure 2
-
-
-
103
-
W
Dynamic characteristics
QGD gate-drain charge
VGS = 4.5 V; ID = 25 A;
VDS = 15 V; see Figure 14;
see Figure 15
5
nC
Static characteristics
RDSon
drain-source
VGS = 10 V; ID = 15 A;
[2]
-
3.5
4.3
mΩ
on-state resistance
Tj = 25 °C; see Figure 13
[1] Continuous current is limited by package.
[2] Measured 3 mm from package.
PSMN4R3-30PL
NXP Semiconductors
N-channel 30 V 4.3 mΩ logic level MOSFET
2. Pinning information
Table 2.
Pinning information
Pin
1
Symbol Description
Simplified outline
Graphic symbol
G
D
S
D
gate
mb
D
2
drain
source
3
G
mb
mounting base; connected to
drain
mbb076
S
1
2 3
SOT78
( T O - 2 2 0 A B ; S C - 4 6 )
3. Ordering information
Table 3.
Ordering information
Type number
Package
Name
Description
Version
PSMN4R3-30PL
TO-220AB;
SC-46
plastic single-ended package; heatsink mounted; 1 mounting hole; 3-lead SOT78
TO-220AB
PSMN4R3-30PL_1
© NXP B.V. 2009. All rights reserved.
Product data sheet
Rev. 01 — 16 June 2009
2 of 13
PSMN4R3-30PL
NXP Semiconductors
N-channel 30 V 4.3 mΩ logic level MOSFET
4. Limiting values
Table 4.
Limiting values
In accordance with the Absolute Maximum Rating System (IEC 60134).
Symbol
VDS
Parameter
Conditions
Min
Max
30
Unit
V
drain-source voltage
drain-gate voltage
gate-source voltage
drain current
Tj ≥ 25 °C; Tj ≤ 175 °C
Tj ≥ 25 °C; Tj ≤ 175 °C; RGS = 20 kΩ
-
VDGR
VGS
-
30
V
-20
20
V
ID
VGS = 10 V; Tmb = 100 °C; see Figure 1
VGS = 10 V; Tmb = 25 °C; see Figure 1
tp ≤ 10 µs; pulsed; Tmb = 25 °C; see Figure 3
[1]
[1]
-
80
A
-
100
465
103
175
175
A
IDM
Ptot
Tstg
Tj
peak drain current
-
A
total power dissipation Tmb = 25 °C; see Figure 2
storage temperature
-
W
°C
°C
-55
-55
junction temperature
Source-drain diode
IS
source current
peak source current
Tmb = 25 °C
[1]
-
-
100
465
A
A
ISM
tp ≤ 10 µs; pulsed; Tmb = 25 °C
Avalanche ruggedness
EDS(AL)S non-repetitive
VGS = 10 V; Tj(init) = 25 °C; ID = 100 A; Vsup ≤ 30 V;
-
74
mJ
drain-source avalanche RGS = 50 Ω; unclamped
energy
[1] Continuous current is limited by package.
003aad235
03aa16
120
150
ID
P
der
(A)
(%)
80
100
(1)
50
40
0
0
0
50
100
150
200
0
50
100
150
200
T
mb (°C)
T
mb
(°C)
Fig 1. Continuous drain current as a function of
mounting base temperature
Fig 2. Normalized total power dissipation as a
function of mounting base temperature
PSMN4R3-30PL_1
© NXP B.V. 2009. All rights reserved.
Product data sheet
Rev. 01 — 16 June 2009
3 of 13
PSMN4R3-30PL
NXP Semiconductors
N-channel 30 V 4.3 mΩ logic level MOSFET
003aad296
103
ID
Limit RDSon = VDS / ID
(A)
10 μs
102
(1)
100 μs
10
1 ms
DC
10 ms
100 ms
1
10-1
1
10
102
VDS (V)
Fig 3. Safe operating area; continuous and peak drain currents as a function of drain-source voltage
5. Thermal characteristics
Table 5.
Symbol
Rth(j-mb)
Thermal characteristics
Parameter
Conditions
Min
Typ
Max
Unit
thermal resistance from see Figure 4
junction to mounting
base
-
1
1.5
K/W
003aad234
10
Zth (j-mb)
(K/W)
1
δ = 0.5
0.2
0.1
10-1
10-2
10-3
10-4
0.05
0.02
tp
T
P
δ =
single shot
t
tp
T
10-6
10-5
10-4
10-3
10-2
10-1
1
10
tp (s)
Fig 4. Transient thermal impedance from junction to mounting base as a function of pulse duration
PSMN4R3-30PL_1
© NXP B.V. 2009. All rights reserved.
Product data sheet
Rev. 01 — 16 June 2009
4 of 13
PSMN4R3-30PL
NXP Semiconductors
N-channel 30 V 4.3 mΩ logic level MOSFET
6. Characteristics
Table 6.
Symbol
Characteristics
Parameter
Conditions
Min
Typ
Max
Unit
Static characteristics
V(BR)DSS
drain-source
breakdown voltage
ID = 250 µA; VGS = 0 V; Tj = 25 °C
ID = 250 µA; VGS = 0 V; Tj = -55 °C
30
27
1.3
-
-
V
V
V
-
-
VGS(th)
gate-source threshold ID = 1 mA; VDS = VGS; Tj = 25 °C;
1.7
2.15
voltage
see Figure 10; see Figure 11
ID = 1 mA; VDS = VGS; Tj = 175 °C;
see Figure 11
0.5
-
-
-
-
V
V
ID = 1 mA; VDS = VGS; Tj = -55 °C;
see Figure 11
2.45
IDSS
drain leakage current
gate leakage current
VDS = 30 V; VGS = 0 V; Tj = 25 °C
VDS = 30 V; VGS = 0 V; Tj = 125 °C
VGS = 16 V; VDS = 0 V; Tj = 25 °C
VGS = -16 V; VDS = 0 V; Tj = 25 °C
VGS = 4.5 V; ID = 15 A; Tj = 25 °C
-
-
-
-
-
-
-
1
µA
µA
nA
-
40
100
100
6.2
6
IGSS
-
-
nA
RDSon
drain-source on-state
resistance
[2]
[2]
4.5
-
mΩ
mΩ
VGS = 10 V; ID = 15 A; Tj = 100 °C;
see Figure 12; see Figure 13
VGS = 10 V; ID = 15 A; Tj = 25 °C;
see Figure 13;
-
-
3.5
1
4.3
-
mΩ
RG
gate resistance
f = 1 MHz
Ω
Dynamic characteristics
QG(tot)
total gate charge
ID = 25 A; VDS = 15 V; VGS = 4.5 V;
see Figure 14; see Figure 15
-
-
19
-
-
nC
nC
ID = 25 A; VDS = 15 V; VGS = 10 V;
see Figure 14; see Figure 15
41.5
QGS
gate-source charge
ID = 25 A; VDS = 15 V; VGS = 4.5 V;
see Figure 14; see Figure 15
-
-
8
4
-
-
nC
nC
QGS(th)
pre-threshold
gate-source charge
QGS(th-pl)
post-threshold
-
4
-
nC
gate-source charge
QGD
gate-drain charge
-
-
5
-
-
nC
V
VGS(pl)
gate-source plateau
voltage
VDS = 15 V; see Figure 14;
see Figure 15
2.7
Ciss
Coss
Crss
input capacitance
output capacitance
VDS = 12 V; VGS = 0 V; f = 1 MHz;
Tj = 25 °C; see Figure 16
-
-
-
2400
500
-
-
-
pF
pF
pF
reverse transfer
capacitance
240
td(on)
tr
td(off)
tf
turn-on delay time
rise time
VDS = 20 V; RL = 0.5 Ω; VGS = 10 V;
RG(ext) = 5.6 Ω
-
-
-
-
28
58
44
21
-
-
-
-
ns
ns
ns
ns
turn-off delay time
fall time
PSMN4R3-30PL_1
© NXP B.V. 2009. All rights reserved.
Product data sheet
Rev. 01 — 16 June 2009
5 of 13
PSMN4R3-30PL
NXP Semiconductors
N-channel 30 V 4.3 mΩ logic level MOSFET
Table 6.
Symbol
Characteristics …continued
Parameter
Conditions
Min
Typ
Max
Unit
Source-drain diode
VSD
source-drain voltage
IS = 25 A; VGS = 0 V; Tj = 25 °C;
see Figure 17
-
0.81
1.2
V
trr
reverse recovery time
recovered charge
IS = 20 A; dIS/dt = -100 A/µs; VGS = 0 V;
VDS = 30 V
-
-
35
30
-
-
ns
Qr
nC
[1] Tested to JEDEC standards where applicable.
[2] Measured 3 mm from package.
003aad244
003aad241
120
80
40
0
100
ID
(A)
80
gfs
(S)
Tj = 175 °C
60
40
20
0
25 °C
0
20
40
60
80
100
0
1
2
3
4
5
ID (A)
VGS (V)
Fig 6. Transfer characteristics: drain current as a
function of gate-source voltage; typical values
Fig 5. Forward transconductance as a function of
drain current; typical values
PSMN4R3-30PL_1
© NXP B.V. 2009. All rights reserved.
Product data sheet
Rev. 01 — 16 June 2009
6 of 13
PSMN4R3-30PL
NXP Semiconductors
N-channel 30 V 4.3 mΩ logic level MOSFET
003aad240
003aad238
5000
12
RDSon
(mΩ)
C
(pF)
4000
3000
2000
1000
0
Ciss
8
4
0
Crss
0
3
6
9
12
0
5
10
15
VGS (V)
V
GS (V)
Fig 8. Drain-source on-state resistance as a function
of gate-source voltage; typical values
Fig 7. Input and reverse transfer capacitances as a
function of gate-source voltage; typical values
003aad236
003aab271
10-1
100
10
5
ID
ID
(A)
(A)
10-2
80
4
3
min
typ
max
3.5
10-3
10-4
10-5
10-6
60
40
VGS (V) =2.5
20
0
0
1
2
V
GS (V)
3
0
1
2
3
4
5
VDS (V)
Fig 10. Sub-threshold drain current as a function of
gate-source voltage
Fig 9. Output characteristics: drain current as a
function of drain-source voltage; typical values
PSMN4R3-30PL_1
© NXP B.V. 2009. All rights reserved.
Product data sheet
Rev. 01 — 16 June 2009
7 of 13
PSMN4R3-30PL
NXP Semiconductors
N-channel 30 V 4.3 mΩ logic level MOSFET
003aac982
03aa27
2
3
a
VGS(th)
(V)
max
1.5
2
typ
1
min
1
0.5
0
0
-60
−60
0
60
120
180
0
60
120
180
T ( C)
°
j
Tj (°C)
Fig 11. Gate-source threshold voltage as a function of
junction temperature
Fig 12. Normalized drain-source on-state resistance
factor as a function of junction temperature
003aad237
16
V
DS
RDSon
(mΩ)
I
D
3
12
V
GS(pl)
3.5
V
GS(th)
8
4.5
4
V
GS
Q
GS1
Q
GS2
5
4
Q
GS
Q
GD
Q
G(tot)
VGS (V) =10
003aaa508
0
Fig 14. Gate charge waveform definitions
0
20
40
60
80
100
ID (A)
Fig 13. Drain-source on-state resistance as a function
of drain current; typical values
PSMN4R3-30PL_1
© NXP B.V. 2009. All rights reserved.
Product data sheet
Rev. 01 — 16 June 2009
8 of 13
PSMN4R3-30PL
NXP Semiconductors
N-channel 30 V 4.3 mΩ logic level MOSFET
003aad242
003aad239
10
VGS
(V)
104
C
(pF)
8
Ciss
6
VDS = 15V
103
4
2
0
Coss
Crss
102
10-1
0
20
40
60
1
10
VDS (V) 102
Q
G (nC)
Fig 15. Gate-source voltage as a function of gate
charge; typical values
Fig 16. Input, output and reverse transfer capacitances
as a function of drain-source voltage; typical
values
003aad243
100
IS
(A)
80
60
40
20
0
Tj = 175 °C
25 °C
0
0.5
1
1.5
2
V
SD (V)
Fig 17. Source (diode forward) current as a function of source-drain (diode forward) voltage; typical values
PSMN4R3-30PL_1
© NXP B.V. 2009. All rights reserved.
Product data sheet
Rev. 01 — 16 June 2009
9 of 13
PSMN4R3-30PL
NXP Semiconductors
N-channel 30 V 4.3 mΩ logic level MOSFET
7. Package outline
Plastic single-ended package; heatsink mounted; 1 mounting hole; 3-lead TO-220AB
SOT78
E
p
A
A
1
q
mounting
D
1
base
D
(1)
(1)
L
1
L
2
Q
(2)
b
1
L
(3×)
(2)
b
2
(2×)
1
2
3
b(3×)
c
e
e
0
5
10 mm
scale
DIMENSIONS (mm are the original dimensions)
(1)
L
2
(2)
(2)
(1)
1
UNIT
mm
A
A
b
b
b
c
D
D
1
E
e
L
L
p
q
Q
1
1
2
max.
4.7
4.1
1.40
1.25
0.9
0.6
1.6
1.0
1.3
1.0
0.7
0.4
16.0
15.2
6.6
5.9
10.3
9.7
15.0 3.30
12.8 2.79
3.8
3.5
3.0
2.7
2.6
2.2
2.54
3.0
Notes
1. Lead shoulder designs may vary.
2. Dimension includes excess dambar.
REFERENCES
OUTLINE
VERSION
EUROPEAN
PROJECTION
ISSUE DATE
IEC
JEDEC
JEITA
08-04-23
08-06-13
SOT78
SC-46
3-lead TO-220AB
Fig 18. Package outline SOT78 (TO-220AB)
PSMN4R3-30PL_1
© NXP B.V. 2009. All rights reserved.
Product data sheet
Rev. 01 — 16 June 2009
10 of 13
PSMN4R3-30PL
NXP Semiconductors
N-channel 30 V 4.3 mΩ logic level MOSFET
8. Revision history
Table 7.
Revision history
Document ID
Release date
Data sheet status
Change notice
Supersedes
PSMN4R3-30PL_1
20090616
Product data sheet
-
-
PSMN4R3-30PL_1
© NXP B.V. 2009. All rights reserved.
Product data sheet
Rev. 01 — 16 June 2009
11 of 13
PSMN4R3-30PL
NXP Semiconductors
N-channel 30 V 4.3 mΩ logic level MOSFET
9. Legal information
9.1 Data sheet status
Document status [1][2]
Product status[3]
Development
Definition
Objective [short] data sheet
This document contains data from the objective specification for product development.
This document contains data from the preliminary specification.
This document contains the product specification.
Preliminary [short] data sheet Qualification
Product [short] data sheet Production
[1]
[2]
[3]
Please consult the most recently issued document before initiating or completing a design.
The term 'short data sheet' is explained in section "Definitions".
The product status of device(s) described in this document may have changed since this document was published and may differ in case of multiple devices. The latest product
status information is available on the Internet at URL http://www.nxp.com.
Applications — Applications that are described herein for any of these
9.2 Definitions
products are for illustrative purposes only. NXP Semiconductors makes no
representation or warranty that such applications will be suitable for the
specified use without further testing or modification.
Draft — The document is a draft version only. The content is still under
internal review and subject to formal approval, which may result in
modifications or additions. NXP Semiconductors does not give any
representations or warranties as to the accuracy or completeness of
information included herein and shall have no liability for the consequences of
use of such information.
Quick reference data — The Quick reference data is an extract of the
product data given in the Limiting values and Characteristics sections of this
document, and as such is not complete, exhaustive or legally binding.
Limiting values — Stress above one or more limiting values (as defined in
the Absolute Maximum Ratings System of IEC 60134) may cause permanent
damage to the device. Limiting values are stress ratings only and operation of
the device at these or any other conditions above those given in the
Characteristics sections of this document is not implied. Exposure to limiting
values for extended periods may affect device reliability.
Short data sheet — A short data sheet is an extract from a full data sheet
with the same product type number(s) and title. A short data sheet is intended
for quick reference only and should not be relied upon to contain detailed and
full information. For detailed and full information see the relevant full data
sheet, which is available on request via the local NXP Semiconductors sales
office. In case of any inconsistency or conflict with the short data sheet, the
full data sheet shall prevail.
Terms and conditions of sale — NXP Semiconductors products are sold
subject to the general terms and conditions of commercial sale, as published
at http://www.nxp.com/profile/terms, including those pertaining to warranty,
intellectual property rights infringement and limitation of liability, unless
explicitly otherwise agreed to in writing by NXP Semiconductors. In case of
any inconsistency or conflict between information in this document and such
terms and conditions, the latter will prevail.
9.3 Disclaimers
General — Information in this document is believed to be accurate and
reliable. However, NXP Semiconductors does not give any representations or
warranties, expressed or implied, as to the accuracy or completeness of such
information and shall have no liability for the consequences of use of such
information.
No offer to sell or license — Nothing in this document may be interpreted or
construed as an offer to sell products that is open for acceptance or the grant,
conveyance or implication of any license under any copyrights, patents or
other industrial or intellectual property rights.
Right to make changes — NXP Semiconductors reserves the right to make
changes to information published in this document, including without
limitation specifications and product descriptions, at any time and without
notice. This document supersedes and replaces all information supplied prior
to the publication hereof.
Export control — This document as well as the item(s) described herein may
be subject to export control regulations. Export might require a prior
authorization from national authorities.
Suitability for use — NXP Semiconductors products are not designed,
authorized or warranted to be suitable for use in medical, military, aircraft,
space or life support equipment, nor in applications where failure or
malfunction of an NXP Semiconductors product can reasonably be expected
to result in personal injury, death or severe property or environmental
damage. NXP Semiconductors accepts no liability for inclusion and/or use of
NXP Semiconductors products in such equipment or applications and
therefore such inclusion and/or use is at the customer’s own risk.
9.4 Trademarks
Notice: All referenced brands, product names, service names and trademarks
are the property of their respective owners.
TrenchMOS — is a trademark of NXP B.V.
10. Contact information
For more information, please visit: http://www.nxp.com
For sales office addresses, please send an email to: salesaddresses@nxp.com
PSMN4R3-30PL_1
© NXP B.V. 2009. All rights reserved.
Product data sheet
Rev. 01 — 16 June 2009
12 of 13
PSMN4R3-30PL
NXP Semiconductors
N-channel 30 V 4.3 mΩ logic level MOSFET
11. Contents
1
Product profile . . . . . . . . . . . . . . . . . . . . . . . . . . .1
1.1
1.2
1.3
1.4
General description . . . . . . . . . . . . . . . . . . . . . .1
Features and benefits. . . . . . . . . . . . . . . . . . . . .1
Applications . . . . . . . . . . . . . . . . . . . . . . . . . . . .1
Quick reference data . . . . . . . . . . . . . . . . . . . . .1
2
3
4
5
6
7
8
Pinning information. . . . . . . . . . . . . . . . . . . . . . .2
Ordering information. . . . . . . . . . . . . . . . . . . . . .2
Limiting values. . . . . . . . . . . . . . . . . . . . . . . . . . .3
Thermal characteristics . . . . . . . . . . . . . . . . . . .4
Characteristics. . . . . . . . . . . . . . . . . . . . . . . . . . .5
Package outline . . . . . . . . . . . . . . . . . . . . . . . . .10
Revision history. . . . . . . . . . . . . . . . . . . . . . . . .11
9
Legal information. . . . . . . . . . . . . . . . . . . . . . . .12
Data sheet status . . . . . . . . . . . . . . . . . . . . . . .12
Definitions. . . . . . . . . . . . . . . . . . . . . . . . . . . . .12
Disclaimers . . . . . . . . . . . . . . . . . . . . . . . . . . . .12
Trademarks. . . . . . . . . . . . . . . . . . . . . . . . . . . .12
9.1
9.2
9.3
9.4
10
Contact information. . . . . . . . . . . . . . . . . . . . . .12
Please be aware that important notices concerning this document and the product(s)
described herein, have been included in section ‘Legal information’.
© NXP B.V. 2009.
All rights reserved.
For more information, please visit: http://www.nxp.com
For sales office addresses, please send an email to: salesaddresses@nxp.com
Date of release: 16 June 2009
Document identifier: PSMN4R3-30PL_1
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