SAA1305T/N1,118 [NXP]
SAA1305T - On/off logic IC SOP 24-Pin;
| 型号： | SAA1305T/N1,118 |
| 厂家： | 
NXP |
| 描述： | SAA1305T - On/off logic IC SOP 24-Pin 光电二极管 商用集成电路 |
| 文件： | 总32页 (文件大小：164K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
INTEGRATED CIRCUITS
DATA SHEET
SAA1305T
On/off logic IC
Product specification
2004 Jan 15
Supersedes data of 1998 Sep 04
Philips Semiconductors
Product specification
On/off logic IC
SAA1305T
FEATURES
• 8 accurate Schmitt trigger inputs with clamp circuits
• Very low quiescent current
• Reset generator circuit
• Changed information output
The SAA1305T can replace an existing on/off logic built-up
with discrete components.
• On/off output to control a regulator IC which supplies the
microcontroller
The SAA1305T contains 8 inputs with accurate Schmitt
triggers and clamp circuits. The main function of this IC is
an intelligent I/O expander with 2 modes of operation:
• 32.768 kHz RC oscillator and/or a 32.768 kHz crystal
oscillator
• No delayed reset needed (start-up behaviour oscillator
1. Normal I/O expander: the microcontroller (master) is
running and the SAA1305T acts like a slave.
fixed by internal logic)
• Watchdog timer function
2. Sleep mode of the total application: the microcontroller
is stopped and the SAA1305T acts like a master.
During an event, the microcontroller is awakened.
• Blinking LED oscillator with drive circuit for LED
• Watch function.
The communication with the IC is performed via the
I2C-bus (400 kHz). Extra functions of the SAA1305T are:
GENERAL DESCRIPTION
The SAA1305T is an on/off logic IC, intended for use in car
radios to interface between a microcontroller and various
input signals such as ignition, low supply detection, on/off
key and external control signals.
• LED blinker circuit
• One-day watch
• Watchdog timer.
QUICK REFERENCE DATA
SYMBOL
VDD
PARAMETER
supply voltage
CONDITIONS
operating
MIN.
4.5
TYP. MAX. UNIT
5.0
130
−
5.5
V
Iq
quiescent supply current
VDD = 5 V; standby mode
−
−
−
200
400
150
µA
kHz
°C
fSCL(max)
Tvj
maximum SCL clock frequency
virtual junction temperature
−
ORDERING INFORMATION
PACKAGE
TYPE NUMBER
NAME
DESCRIPTION
VERSION
SAA1305T
SO24
plastic small outline package; 24 leads; body width 7.5 mm
SOT137-1
2004 Jan 15
2
Philips Semiconductors
Product specification
On/off logic IC
SAA1305T
BLOCK DIAGRAM
1
D0
24
23
9
COMPARATOR
MASK
2
CHI
D1
3
D2
RESET
GENERATOR
4
RP
D3
NEW
LATCH
OLD
LATCH
5
D4
ON/OFF
6
D5
SAA1305T
7
D6
8
D7
12
11
V
TIMER
TS
L
STATUS
WATCH TIMER
ALARM TIMER
18
SDA
2
I C-BUS
20
INTERFACE
WATCHDOG
TIMER
SCL
OSCILLATOR
WD
ERROR
COUNTER
LED DRIVER
SUPPLY
22
10 21 19
16 17 14 15
13
TST
MGR200
V
XTAL2
OSC2
SS
LED
RES
V
XTAL1 OSC1
DD
Fig.1 Block diagram.
2004 Jan 15
3
Philips Semiconductors
Product specification
On/off logic IC
SAA1305T
PINNING
SYMBOL
PIN
DESCRIPTION
D0
1
2
3
4
5
6
7
8
9
input D0; generates a reset pulse on pin RP and a LOW-level voltage on pin CHI
input D1; generates a reset pulse on pin RP and a LOW-level voltage on pin CHI
input D2; generates a reset pulse on pin RP and a LOW-level voltage on pin CHI
input D3; generates a reset pulse on pin RP and a LOW-level voltage on pin CHI
input D4; generates a reset pulse on pin RP and a LOW-level voltage on pin CHI
input D5; generates a reset pulse on pin RP and a LOW-level voltage on pin CHI
input D6; generates a reset pulse on pin RP and a LOW-level voltage on pin CHI
input D7; generates a reset pulse on pin RP and a LOW-level voltage on pin CHI
D1
D2
D3
D4
D5
D6
D7
ON/OFF
on/off output (off is active LOW); for controlling the enable of a separate power supply IC from the
microcontroller
RES
WD
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
reset input (active LOW); for power-on or system reset for the IC
Watchdog timer trigger input signal from the microcontroller
timer start input (active LOW); to trigger the VL (is an undervoltage) timer (250 ms)
test purpose input; must be connected to VSS
TS
TST
OSC1
OSC2
XTAL1
XTAL2
SDA
VSS
RC oscillator output (32.768 kHz)
RC oscillator input (32.768 kHz)
crystal oscillator output (32.768 kHz)
crystal oscillator input (32.768 kHz)
I2C-bus serial data input/output; interface to the microcontroller
ground supply (0 V)
SCL
VDD
I2C-bus serial clock line input; interface to the microcontroller
supply voltage; 5 V ±10% with a current consumption of maximum 200 µA (without LED current)
LED
RP
light emitting diode output; to drive a LED up to 20 mA (high side switch to VDD
)
reset pulse output
CHI
change information output (active LOW); note 1
Note
1. The following results in a LOW-level voltage on pin CHI:
a) A change on any of the (non-masked) inputs D0 to D7.
b) A device reset.
c) An alarm or VL timer event.
d) An oscillator fault or a failed I2C-bus read sequence after a change information signal.
e) A failed Watchdog timer trigger sequence.
2004 Jan 15
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Philips Semiconductors
Product specification
On/off logic IC
SAA1305T
Reset time
The pulse time on pin RP is selectable via an I2C-bus
command; see Table 8. The default value after Power-on
reset is the longest time (20 ms). Selectable pulse times
via the control register are: 1, 5, 10 and 20 ms.
handbook, halfpage
D0
D1
CHI
RP
1
2
24
23
22
21
20
19
18
D2
LED
With the rising edge of the reset pulse all inputs, except the
Watchdog timer and VL timer, are disabled until the
I2C-bus command ENABLE-RESET. Each pulse on
pin RP resets the internal I2C-bus interface.
3
V
D3
4
DD
D4
SCL
5
V
D5
6
SS
On/off
SAA1305T
D6
SDA
7
The output signal on pin ON/OFF remains HIGH after a
trigger event. Trigger sources are:
D7
8
17 XTAL2
ON/OFF
RES
WD
XTAL1
OSC2
OSC1
TST
9
16
15
14
13
• Alterations on any of the inputs D0 to D7
• An impedance detection
10
11
• A device reset
• A VL (is an undervoltage) timer or alarm timer event
• An oscillator fault.
TS 12
MGR201
In the event of a five time failed Watchdog timer trigger or
missed I2C-bus read sequence (after a change information
indication), an internal logic circuit will reset pin ON/OFF
and set the IC in the standby mode. It is also possible to
control pin ON/OFF during the run mode via an I2C-bus
command (see Table 8, bit 1). In principal two stable IC
modes are possible; see Fig.3:
Fig.2 Pin configuration.
FUNCTIONAL DESCRIPTION
1. Standby mode: an oscillator fault and the following IC
function groups can trigger a reset pulse to enter the
run mode;
Figure 1 shows the block diagram for the SAA1305T.
Details are explained in the subsequent sections.
a) Watch (alarm timer).
b) Supply (device reset).
Watch and alarm functions
An internal RAM (watch register) counts automatically the
seconds for one-day (one-day reset also automatically).
The watch register can be set and read from the I2C-bus.
An alarm function is possible via a second RAM (alarm
register) and is programmable via the I2C-bus. The alarm
timer triggers pin CHI and if enabled the reset pulse on
pin RP. After a device reset the content of the alarm
register is FFFFH (alarm function is disabled) and the
content of watch register is 0000H.
c) Inputs D0 to D7 (a change on any of these inputs
or an impedance detection).
The Watchdog timer and the VL timer are disabled in
the standby mode.
2. Run mode: only the Watchdog timer (WD), an
oscillator fault, a missed I2 C-bus communication and
the reset input (RES) can trigger a reset pulse. It is
possible to enter the standby mode via control register
bit 0; see Table 8.
LED control
The dynamic mode or wait mode is possible but can only
be started from the run mode (see Section “VL timer”).
The I2C-bus interface control (see Table 10) for the LED
contains:
• Two function control bits
• Two control bits for the blink LED frequency
• Two control bits for the blink LED duration time.
All bits are combined within the LED register.
2004 Jan 15
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Philips Semiconductors
Product specification
On/off logic IC
SAA1305T
h
SAA1305T
OPERABLE
RES = HIGH
2
I C-bus error counter = 5
Watchdog timer error counter = 5
RUN
STANDBY
RESET
(3)
event ; CHI
(1)
(4)
(5)
entry
entry
(2)
control register bit 0
event
event
V
timer start
L
WAIT
V
timer end
L
(6)
(5)
entry
input D0 = logic 1
oscillator fault
event
RES = LOW
MGR202
(1) See Section “Run mode entries”.
(2) See Section “Run mode events”.
(3) Possible events are: alterations on any of the inputs D0 to D7, an impedance detection, an alarm timer event and an oscillator fault.
(4) See Section “Standby mode entries”.
(5) Not available.
(6) See Section “Wait mode entries”.
Fig.3 State diagram for IC modes.
RUN MODE ENTRIES
WAIT MODE ENTRIES
• Reset Watchdog timer error counter
• Enable Watchdog timer
• Disable Watchdog timer
• Reset I2C-bus error counter
• Reset Watchdog timer error counter
• Start VL timer
• Enable VL timer function
• Generate reset pulse
• Disable reset generation via inputs D0 to D7 changes
• Set pin CHI in 3-state
(inclusive impedance detection) and watch compare
• Reset I2C-bus interface
• Set pin ON/OFF to LOW (OFF is active).
STANDBY MODE ENTRIES
• Set pin CHI to LOW (LOW = active)
• Set pin ON/OFF to HIGH (ON is active).
• Disable Watchdog timer
• Reset Watchdog timer error counter
• Reset I2C-bus error counter
• Disable VL timer function
RUN MODE EVENTS
• I2C-bus read and write commands
• Watchdog timer reset
• Missed I2C-bus communication after a (CHI) change
• Enable reset generation via inputs D0 to D7 changes
(inclusive impedance detection) and watch compare
information signal
• Set pin ON/OFF to LOW (OFF is active)
• Set pin CHI in 3-state.
• Oscillator fault.
2004 Jan 15
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Philips Semiconductors
Product specification
On/off logic IC
SAA1305T
Serial I/O
Due to the fact, that a ‘reset pulse’ signal or a ‘change
information’ signal are also possible via the Watchdog
timer, VL timer, alarm timer, impedance detection,
oscillator fault or after a device reset, the information about
these different events is also available via corresponding
bits within the status register; see Table 5.
The hardware of the I2C-bus interface (slave) operates
with a maximum clock frequency of 400 kHz.
Inputs
Pins D0 to D7 are connected to latches (new register).
Each latch contains and stores the input change until the
read out via the I2C-bus (read out of new register).
A second register (old register, latches) contains the input
situation before a ‘reset pulse’ signal or HIGH-to-LOW
transition of pin CHI. After a level change on any of the
inputs D0 to D7 (content of new register into ‘old’ register),
pin CHI will indicate this event. Reading the ‘old’ register
has no influence on any latch content. Reading the new
register will shift the content into the old register. During
the I2C-bus read sequence of the new register the latch
content will be shifted into the corresponding old latch and
afterwards the new latches are enabled until the next
change on this input. The functions of the inputs D0 to D7
are shown in Table 1.
A status I2C-bus read sequence resets the status register
and pin CHI. Only after a change on any of the inputs
D0 to D7, an I2C-bus read sequence of the status register,
old register and new register is it necessary to reset
pin CHI. The inputs D4 to D7 are maskable via the
I2C-bus; see Table 8. All masked inputs (defined via the
control register) are blocked to trigger pins CHI and RP.
During the disable phase of the masked inputs the
corresponding bits within the old and new registers will be
continuously refreshed with the actual input level.
Table 1 Input logic levels and functions
SCHMITT
TRIGGER INPUT
VL TIMER
INTERRUPT
IMPEDANCE
DETECTION
INPUT
SPECIAL INPUT
MASKABLE
D7
D6
D5
D4
D3
D2
D1
D0
X
X
X
−
−
−
−
X
X
X
−
−
X
X
X
X
−
−
−
−
−
−
−
−
−
−
−
X
−
−
−
−
−
−
X
−
−
−
X
X
2004 Jan 15
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Philips Semiconductors
Product specification
On/off logic IC
SAA1305T
IMPEDANCE DETECTION
Between detection and indication via the status register
bit 6, a delay time is integrated (programmable via the
impedance register bits 1 and 0; see Table 15). When the
1⁄2VDD value is detected the EXNOR output will be set to
logic 1 (active) and after the programmed delay time the
status register bit 6 will be set to logic 1 (active). This event
will also be indicated via pin CHI and (if enabled) pin RP.
The impedance information (bit 6 is active) within the
status register is present until the I2C-bus status is read.
With the disappearance of the impedance information no
further actions will be generated. Every impedance signal
change during the delay time will restart the delay time.
However an impedance detection is only possible in the
event of a stable signal, at least for the programmed delay
time. Setting the status register bit 6 with a repetition time
which equals the ‘impedance delay time’ as long as
input D1 stays in high-impedance state is implemented.
Input D1 is a normal input with comparable behaviour like
the other seven inputs. The only difference is an additional
internal exclusive-NOR (EXNOR) connected between the
two comparator outputs for high and low detection;
see Fig.4. The EXNOR signal indicates, in combination
with a special external circuit on input D1, a voltage of
1⁄2VDD on this input.
The simple input description for impedance detection is
probably not the real solution, but helps to explain the
function. Input D1 can be used as a normal input and for
impedance detection as described in Table 2. For normal
use the output Q acts like every other input, but for
impedance detection the EXNOR output S is also
important. Output S is linked to the status register bit 6 and
indicates the 1⁄2VDD; see Table 5.
12 V
5 V
O1
S
ignition
key
100 kΩ
input D1
3.5 V
Q
10 kΩ
R
100 kΩ
O2
S
1.5 V
MGR203
Fig.4 Simple input description for impedance detection.
Table 2 Logic levels for impedance detection
IGNITION KEY
O1
O2
Q
S
12 V
1
0
0
0
0
1
1
0 or 1
0
0
1
0
Open-circuit (VI = 2.5 V)
Ground (VI < 1.5 V)
2004 Jan 15
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Philips Semiconductors
Product specification
On/off logic IC
SAA1305T
Watchdog timer
After the HIGH-to-LOW transition of the reset pulse output,
the first transition change within 500 ms on pin WD will be
detected as the first trigger from the microcontroller. The
timing diagram for the Watchdog timer trigger signal is
shown in Fig.5.
An internal Watchdog timer is active after each reset pulse
output and can be triggered via pin WD. In the event of a
not specified pulse, a delayed or missing trigger pulse, a
reset on pin RP will be the immediate reaction.
handbook, halfpage
RP
WD
(1)
(2)
(3)
MGR220
(1) In the event of a not specified, a delayed or missing trigger signal, a reset on pin RP will be the immediate reaction.
(2) The maximum time until signal change for first Watchdog timer is 500 ms.
(3) The time until next signal change is minimum 200 ms and maximum 300 ms.
Fig.5 Watchdog timer trigger timing.
Oscillators
VL timer
Two oscillator types are built-in, a RC oscillator (designed
for 32.768 kHz) and a crystal oscillator (32.768 kHz), both
with separate pins. For a proper device function an
oscillator control circuit is integrated. This circuit
supervises the oscillator function and creates a reset and
oscillator restart in the event of an oscillator failure.
A built-in timer, which can be started with a HIGH-to-LOW
transition on pin TS, triggers, after 250 ms, pins RP
and CHI and sets pin ON/OFF. The VL timer starts only
once after a valid start condition. Default state after a
Power-on reset is not active. A VL timer start resets the
Watchdog timer. During run time of the VL timer is
ON/OFF = LOW, CHI = 3-state and the Watchdog timer is
disabled.
In the event of an oscillator fault, the event will be indicated
after a restart via the status register bit 5. During the
oscillator failure phase some outputs remain at a defined
level as shown in Table 3.
Pin TS is only active during the run mode. During run time
of the VL timer the IC remains in the wait mode. Only a
HIGH-level signal on input D0 can stop the VL timer in the
same way as after 250 ms. In the event of an oscillator
fault the IC also enters the run mode but without an
influence on the status register bit 2. During the wait mode
an influence of the status register via other sources (e.g.
timer and inputs) is possible, but a transition from wait
mode to run mode is only possible as described above.
The RC oscillator accuracy is 5%.
When operating with the RC oscillator, pin XTAL2 must be
connected to VDD or VSS to minimize the quiescent
current. When operating with the crystal oscillator
pin OSC2 must be connected to VSS or VDD
.
2004 Jan 15
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Philips Semiconductors
Product specification
On/off logic IC
SAA1305T
Power-on or system reset
After the system reset (rising edge on pin RES) all internal
registers are in a defined condition (see Table 4) and the
outputs are as shown in Table 3 for RES = HIGH.
The reset input (pin RES) is of the CMOS input levels type.
During a LOW level on pin RES the outputs are as shown
in Table 3 for RES = LOW.
Table 3 Logic levels for the reset input and oscillator failure
PIN
RES = LOW
RES = HIGH
OSCILLATOR FAILURE
RP
HIGH
HIGH (voltage on VDD
)
3-state
3-state [after a defined time (maximum reset time)]
ON/OFF
LED
LOW
LOW
HIGH
LOW
LOW
LOW
SDA
3-state
3-state
3-state (receiving mode if RP = LOW)
LOW (information for microcontroller)
3-state
LOW
CHI
Table 4 Defined condition after reset for the registers; RES = HIGH
REGISTER
Status register
New register
Old register
CONTENTS
02 (HEX)
all input latches are enabled
same levels as corresponding inputs during falling edge on pin RES
Control register
LED register
03 (HEX)
04 (HEX)
Alarm register
Watch register
FFFF (HEX); see Table 7
0000 (HEX)
Impedance register 03 (HEX)
2004 Jan 15
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Philips Semiconductors
Product specification
On/off logic IC
SAA1305T
I2C-BUS INTERFACE COMMANDS
To terminate the stream of bytes, the master must not
acknowledge the last byte output, but must generate a
STOP condition. The output data is from consecutive byte
addresses, with the internal byte address counter
automatically incremented after each byte output. In the
event of higher read sequences than available data bytes,
the 7th and 8th bit content are 0 and the address counter
will generate a wrap around (output at address 0).
I2C-bus communication is only possible in the run mode.
Read mode operations
Only the sequential read mode is possible. The IC starts
after every device select (code 48) to output data 1.
However, in this event the master does acknowledge the
data output and the IC continues to output the next data in
sequence; see Figs 6 and 7.
The definitions of the bits are given in Tables 5, 6 and 7.
acknowledge
acknowledge
acknowledge
no acknowledge
h
S
DEVICE SELECT
DATA 1
DATA N P
START
condition
STOP
condition
R/W
MGR221
Fig.6 I2C-bus read mode sequence.
START
DEVICE SELECT
byte
STATUS
0
OLD
1
NEW
2
WATCH
STOP
3, 4, 5, 6, 7
MGR222
Fig.7 I2C-bus read data sequence.
11
2004 Jan 15
Philips Semiconductors
Product specification
On/off logic IC
SAA1305T
Table 5 Definition of the status register bits
BIT
DESCRIPTION
7
6
5
4
a logic 1 indicates a change on any of the inputs D7 to D0
a logic 1 indicates a 1⁄2VDD on input D1 (impedance detection)
a logic 1 indicates a reset after an oscillator fault
a logic 1 indicates a reset caused by a missed I2C-bus communication after a change information signal
(no communication between two Watchdog timer trigger pulses)
3
2
1
0
a logic 1 indicates a timer alarm
a logic 1 indicates a VL timer reset
a logic 1 indicates a device reset (via pin RES)
a logic 1 indicates a Watchdog timer reset
Table 6 Definition of the old and new register bits
BIT
DESCRIPTION
7
6
5
4
3
2
1
0
data of input D7
data of input D6
data of input D5
data of input D4
data of input D3
data of input D2
data of input D1
data of input D0
Table 7 Definition of the watch and alarm register bits (read mode); note 1
ADDRESS
DATA BITS
DESCRIPTION
hours of alarm
VALUES
DEFAULT
(HEX)
2
3
4
5
6
7
4 to 0
5 to 0
5 to 0
4 to 0
5 to 0
5 to 0
0 to 31
0 to 63
0 to 63
0 to 23
0 to 59
0 to 59
31
63
63
0
minutes of alarm
seconds of alarm
hours of watch
minutes of watch
seconds of watch
0
0
Note
1. The alarm is disabled by writing a time larger than 24:00:00. With the default values the alarm function is disabled.
2004 Jan 15
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Philips Semiconductors
Product specification
On/off logic IC
SAA1305T
Write mode operations
The transfer is terminated when the master generates a
STOP condition. In the event of a wrong address decoding
the IC sends a no acknowledge signal and ignores all
following data.
After a START condition the master sends a device select
code with the R/W bit reset to logic 0; see Fig.8. The IC
acknowledge this and waits for the address byte. After the
address the master sends the corresponding data, which
is acknowledged by the IC. It is possible to continue with
the data transfer, each byte is acknowledged by the IC.
The internal byte address counter is incremented after
each data transmission.
Figure 9 shows the sequence for write data mode. Both
alarm and watch registers consist of 3 bytes. The first byte
(2 and 5) is the most significant byte. The definitions of the
bits are given in Tables 8, 10, 14 and 15.
acknowledge
acknowledge
acknowledge acknowledge
acknowledge
S
DEVICE SELECT
ADDRESS
DATA 1
DATA N
P
START
condition
STOP
condition
R/W
MGR223
Fig.8 I2C-bus write mode sequence.
START
DEVICE SELECT ADDRESS CONTROL LED ALARM WATCH IMPEDANCE
byte 2, 3, 4 5, 6, 7
STOP
0
1
8
MGR224
Fig.9 I2C-bus write data sequence.
13
2004 Jan 15
Philips Semiconductors
Product specification
On/off logic IC
SAA1305T
Table 8 Definition of the control register bits
BIT
DESCRIPTION
part of the mask register; corresponds to input D7; a logic 1 disables input D7 (no influence on pin CHI)
7
6
5
4
3
2
1
0
part of the mask register; corresponds to input D6; a logic 1 disables input D6 (no influence on pin CHI)
part of the mask register; corresponds to input D5; a logic 1 disables input D5 (no influence on pin CHI)
part of the mask register; corresponds to input D4; a logic 1 disables input D4 (no influence on pin CHI)
content of bits 3 and 2 corresponds with the pulse width of the reset pulse output; see Table 9
control bit for pin ON/OFF; a logic 0 sets pin ON/OFF to VSS; a logic 1 sets pin ON/OFF to VDD
control bit (ENABLE-RESET) for the IC modes; only setting a logic 0 is possible; standby mode with disabled
Watchdog timer, enabled reset generation, ON/OFF = LOW and CHI = 3-state; with the rising edge of the
reset pulse output the IC enters the run mode with enabled Watchdog timer, disabled reset generation,
ON/OFF = HIGH (but controllable via control register bit 1) and CHI = HIGH (is active, not in 3-state)
Table 9 Pulse width of the reset pulse output
Table 12 Control bits for the blink LED frequency
BIT 3 BIT 2
PULSE WIDTH (ms)
BIT 3 BIT 2
FREQUENCY
2 Hz (0.5 s)
1 Hz (1 s)
0
0
1
1
0
1
0
1
20
10
5
0
0
1
1
0
1
0
1
0.67 Hz (1.5 s)
0.5 Hz (2 s)
1
Table 10 Definition of the LED register bits
Table 13 Control bits for the blink LED duration time
BIT
7
DESCRIPTION
BIT 1 BIT 0
DURATION TIME (ms)
bits 7 and 6 are function control bits;
see Table 11
0
0
1
1
0
1
0
1
20
30
40
50
6
5
no function
4
reset I2C-bus error counter
3
bits 3 and 2 are control bits for the blink LED
frequency (output LOW time); see Table 12
2
1
bits 1 and 0 are control bits for the blink LED
duration time; see Table 13
0
Table 11 Function control bits
BIT 7 BIT 6
FUNCTION
0
0
0
1
LED output switched to ground
blink function according the LED
register bits 0 to 3
1
1
0
1
LED output switched to VDD
blink function according the LED
register bits 0 to 3
2004 Jan 15
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Philips Semiconductors
Product specification
On/off logic IC
SAA1305T
Table 14 Definition of the watch and alarm register bits (write mode); notes 1, 2 and 3
ADDRESS (HEX)
DATA BITS
DESCRIPTION
VALUES
DEFAULT
2
3
4
5
6
7
4 to 0
5 to 0
5 to 0
4 to 0
5 to 0
5 to 0
hours of alarm
0 to 31
0 to 63
0 to 63
0 to 23
0 to 59
0 to 59
31
63
63
0
minutes of alarm
seconds of alarm
hours of watch
minutes of watch
seconds of watch
0
0
Notes
1. The alarm is disabled by writing a time larger than 24:00:00. With the default values the alarm function is disabled.
The alarm is also disabled if hours >23 or minutes >59 or seconds >59.
2. There are several attention points if a senseless time is written to the alarm register, for example:
a) Write 25 to address 2; data bits 4 to 0 = 25
b) Write 70 to address 3; data bits 5 to 0 = 6
c) Write 81 to address 4; data bits 5 to 0 = 17
hours = 25 (alarm disabled).
minutes = 6.
seconds = 17.
3. There are several attention points if a senseless time is written to the watch register, for example:
a) Write 25 to address 5; data bits 4 to 0 = 25
b) Write 70 to address 6; data bits 5 to 0 = 6
c) Write 81 to address 7; data bits 5 to 0 = 17
hours = 23 (limited).
minutes = 6.
seconds = 17.
Table 15 Definition of the impedance register bits
BIT
DESCRIPTION
7
6
5
4
3
2
no function
no function
no function
no function
no function
enable or disable bit for the impedance detection
0 = inactive (1⁄2VDD detection without influence on the status register)
1 = active (1⁄2VDD detection with influence on the status register)
bits 1 and 0 are control bits for the impedance detection delay time; see Table 16
1
0
Table 16 Control bits for the impedance detection delay time
BIT 1
BIT 0
DELAY TIME
100 ms
250 ms
500 ms
1 s
0
0
1
1
0
1
0
1
2004 Jan 15
15
Philips Semiconductors
Product specification
On/off logic IC
SAA1305T
LIMITING VALUES
In accordance with the Absolute Maximum Rating System (IEC 60134).
SYMBOL
PARAMETER
supply voltage
CONDITIONS
MIN.
−0.5
MAX.
+6.5
UNIT
VDD
Iq
operating
V
quiescent supply current
input voltage on pins
SDA, SCL, RES, WD and TS
D0 to D7
VDD = 5 V; standby mode
fosc = 32 kHz
−
200
µA
VI(n)
−0.5
−0.5
−0.5
+6.5
+17
V
V
V
with 5 kΩ series resistor
VO(n)
output voltage on pins CHI, RP,
ON/OFF and LED
fosc = 32 kHz
+6.5
fSCL(max)
Tvj
maximum SCL clock frequency
virtual junction temperature
storage temperature
−
400
150
+150
+85
kHz
°C
−
Tstg
−65
−40
°C
Tamb
ambient temperature
°C
THERMAL CHARACTERISTICS
SYMBOL
PARAMETER
CONDITIONS
VALUE
78
UNIT
Rth(j-a)
thermal resistance from junction to
ambient
in free air
K/W
CHARACTERISTICS
VDD = 5 V; Tamb = 25 °C; unless otherwise specified.
SYMBOL
PARAMETER
CONDITIONS
MIN.
TYP.
MAX.
UNIT
Supply
VDD
Iq
supply voltage
quiescent supply current
operating
note 1
4.5
5.0
5.5
V
−
130
200
µA
Inputs
PINS D0 TO D7
Vi(clamp)
Iclamp(h)
ILI
input clamping voltage
Iclamp = 2 mA
VD0 to VD7 >VDD
VDx = 5 V
5.5
−
6.5
−
8.3
2
V
high clamping current
input leakage current
mA
µA
−
−
1
SCHMITT TRIGGER INPUTS FOR PINS D0, D1 AND D5 TO D7
Vth(r)
Vth(f)
Vhys
rising threshold voltage
falling threshold voltage
hysteresis voltage
3.4
1.4
1.8
3.5
1.5
2
3.6
1.6
2.2
V
V
V
SPECIAL INPUTS FOR PINS D2, D3 AND D4
Vth(r)
Vth(f)
Vhys
rising threshold voltage
falling threshold voltage
hysteresis voltage
2.4
1.7
0.5
2.5
1.8
0.7
2.6
1.9
0.9
V
V
V
2004 Jan 15
16
Philips Semiconductors
Product specification
On/off logic IC
SAA1305T
SYMBOL
PARAMETER
CONDITIONS
MIN.
TYP.
MAX.
UNIT
PIN SCL
VIL
LOW-level input voltage
HIGH-level input voltage
input leakage current
maximum SCL clock frequency
input rise time
0
3
−
−
−
−
−
−
−
−
−
1.5
V
V
VIH
ILI
VDD
1
Vi = 5 V; with output off
µA
kHz
µs
fSCL(max)
ti(r)
400
−
tbf
tbf
−
ti(f)
input fall time
−
µs
Ci
input capacitance
7
pF
PINS RES, WD AND TS
VIL
VIH
ILI
LOW-level input voltage
0
−
−
−
−
0.2VDD
V
HIGH-level input voltage
input leakage current
input capacitance
0.8VDD
VDD
1
V
Vi = 5 V; with output off
−
−
µA
pF
Ci
7
Inputs/outputs
PIN SDA
VIL
VIH
VOL
Ioff
LOW-level input voltage
0
3
0
−
−
−
−
−
−
−
−
−
−
−
−
−
−
−
1.5
VDD
1
V
HIGH-level input voltage
LOW-level output voltage
3-state off current
input rise time
V
IOL = 3 mA
V
Vi = 5 or 0 V
10
2
µA
µs
µs
ns
pF
pF
ti(r)
ti(f)
to(f)
Ci
input fall time
2
output fall time
1 V ≤ Vi ≤ 3 V
200
7
input capacitance
load capacitance
CL
400
CRYSTAL OSCILLATOR; notes 2 and 3; see Fig.10
Pdr
CL
Rs
fosc
Q
drive level power
load capacitance
series resistance
oscillator frequency
Q factor
−
−
−
−
−
10
−
µW
pF
7 to 12
40
−
−
kΩ
32.768
40000
−
kHz
100000
RC OSCILLATOR; note 4; see Fig.11
Cosc
Rosc
fosc
oscillator capacitance
oscillator resistance
oscillator frequency
100
5
300
−
−
−
pF
90
kΩ
kHz
Cosc = 300 pF;
−
32.768
Rosc = 90 kΩ; note 5
fclk(min)
minimum clock frequency
note 6
−
−
10
kHz
2004 Jan 15
17
Philips Semiconductors
Product specification
On/off logic IC
SAA1305T
SYMBOL
Outputs
PIN LED
PARAMETER
CONDITIONS
MIN.
TYP.
MAX.
UNIT
VOL
VOH
IOH
LOW-level output voltage
HIGH-level output voltage
HIGH-level output current
IOL = 16 mA
0
4
−
−
−
0.5
V
V
IOL = 16 mA
VOH > 1 V
VDD
−20
−
mA
PIN ON/OFF
VOL
VOH
LOW-level output voltage
HIGH-level output voltage
IOL = 4 mA
0
−
−
−
0.5
V
V
V
IOH = −600 µA
IOH = −4 mA
4.8
4
VDD
VDD
PIN CHI
VOL
ILO
LOW-level output voltage
output leakage current
IOL = 200 µA
0
−
−
0.5
5
V
VOH = VDD
−
µA
PIN RP
VOH
HIGH-level output voltage
3-state off current
IOH = −4 mA
4
−
−
VDD
5
V
Ioff
Vo = VDD or VSS
−
µA
Notes
1. The IC is programmed to standby mode via the I2C-bus command, no LED is connected, no I2C-bus communication,
one oscillator is running and the Watchdog timer is disabled.
2. When running on crystal oscillator, the input of the RC oscillator must be connected to VDD or VSS
.
3. Preferable crystal types: MU206S and DMX38.
4. When running on RC oscillator, the input of the crystal oscillator must be connected to VDD or VSS
.
0.87
osc × Cosc
5. The RC oscillator frequency fosc
=
------------------------------
R
2
The RC oscillator frequency tolerance ∆fosc
=
∆Rosc2 + ∆Cosc2 + (0.05 × fosc
)
6. Below this maximum value the IC will detect an oscillator fault.
2004 Jan 15
18
Philips Semiconductors
Product specification
On/off logic IC
SAA1305T
APPLICATION CIRCUITS
V
h
DD
R4
1 kΩ
input D7 input D4
1
2
3
4
5
6
7
8
24
23
9
R3
25 kΩ
R1
33 kΩ
SAA1305T
12
11
18
20
R2
20 kΩ
22
10 21 19
16 17 14 15
13
R5
1 kΩ
(1)
C1
15 pF
C2
15 pF
MGR204
(1) Crystal oscillator type MU206S (32.768 kHz).
Fig.10 Application circuit for crystal oscillator.
V
DD
R4
4.7 kΩ
input D7 input D4
R3
1
2
24
23
9
25 kΩ
3
4
5
6
7
8
R1
33 kΩ
SAA1305T
12
11
18
20
R2
20 kΩ
22
10 21 19
16 17 14 15
13
R5
1 kΩ
R
osc
90 kΩ
C
osc
300 pF
MGR205
Fig.11 Application circuit for RC oscillator.
19
2004 Jan 15
Philips Semiconductors
Product specification
On/off logic IC
SAA1305T
ON/OFF LOGIC WITH MICROCONTROLLER IN POWER-DOWN STATE
14 V
5 V
5 V
21
10
ON/OFF
RP
CONTINUOUS
REGULATOR
9
23
11
24
18
20
RES
WD
MICRO-
CONTROLLER
SAA1305T
CHI
SDA
SCL
D0 to D7
1 to 8
MGR206
Fig.12 Block diagram with continuous microcontroller supply.
14 V
Dx
RP
RES
ON/OFF
CHI
ON/OFF
RP
CHI
WD
WD
(1)
(1)
MGR207
a. First power-on.
b. Normal switch-on.
(1) Level not defined.
Fig.13 Timing diagrams with continuous microcontroller supply.
20
2004 Jan 15
Philips Semiconductors
Product specification
On/off logic IC
SAA1305T
Scenarios for ON/OFF logic with microcontroller in power-down state
5 V continuous
regulator
SAA1305T
microcontroller
RES = LOW
RP = HIGH
220 ms (hardware specific)
RES = HIGH
ON/OFF = HIGH (A/D supply)
CHI = LOW
20 ms
RP = LOW
2
I C-bus read status/old/new register
CHI = HIGH
2
I C-bus write reset time/blink/LED status
2
I C-bus write ENABLE-RESET
MGR208
Fig.14 Proper first connection on power supply.
SAA1305T
microcontroller
main supply
Dx
RP = HIGH
ON/OFF = HIGH
CHI = LOW
1 ms
RP = LOW
2
I C-bus read status/old/new register
CHI = HIGH
WD = LOW
250 ms
250 ms
POWER-ON
WD = HIGH
WD = LOW
MGR209
Fig.15 Switch-on after a valid input change.
2004 Jan 15
21
Philips Semiconductors
Product specification
On/off logic IC
SAA1305T
SAA1305T
microcontroller
main supply
POWER-OFF
input D0 = LOW
TS = LOW
ON/OFF = LOW
RP = HIGH
250 ms
1 ms
CHI = LOW
ON/OFF = HIGH
RP = LOW
2
I C-bus read status register
CHI = HIGH
TS = LOW
ON/OFF = LOW
RP = HIGH
250 ms
1 ms
sequence runs untill signal input D0 = HIGH
CHI = LOW
ON/OFF = HIGH
RP = LOW
MGR210
Fig.16 VL timer behaviour (voltage drops >250 ms).
SAA1305T
microcontroller
main supply
POWER-OFF
input D0 = LOW
TS = LOW
ON/OFF = LOW
RP = HIGH
t < 250 ms
input D0 = HIGH
CHI = LOW
1 ms
ON/OFF = HIGH
RP = LOW
2
I C-bus read status/old/new register
CHI = HIGH
WD = LOW
WD = HIGH
WD = LOW
250 ms
250 ms
POWER-ON
MGR211
Fig.17 VL timer behaviour (voltage drops <250 ms).
22
2004 Jan 15
Philips Semiconductors
Product specification
On/off logic IC
SAA1305T
SAA1305T
microcontroller
main supply
2
I C-bus write alarm timer
2
POWER-OFF
I C-bus write ENABLE-RESET
programmable
time
ON/OFF = LOW (A/D supply is off)
RP = HIGH
ON/OFF = HIGH (A/D supply is on)
CHI = LOW
1 ms
RP = LOW
2
I C-bus read status/old/new register
CHI = HIGH
(1)
Watchdog timer trigger sequence
POWER-ON
MGR212
(1) See Fig.5.
Fig.18 Wake-up via alarm.
SAA1305T
microcontroller
main supply
input Dx
CHI = LOW
0 to 300 ms
WD = HIGH (LOW)
WD = LOW (HIGH)
RP = HIGH
0 to 300 ms
1 to 20 ms
POWER-OFF
RP = LOW
MGR213
Fig.19 Behaviour after missed I2C-bus read sequence.
23
2004 Jan 15
Philips Semiconductors
Product specification
On/off logic IC
SAA1305T
ON/OFF LOGIC WITH SWITCHED MICROCONTROLLER SUPPLY
14 V
5 V
5 V
21
10
ON/OFF
RP
5 V
5 V
CONTINUOUS
REGULATOR
9
RES
REGULATOR
RESET
MICRO-
CONTROLLER
23
11
SAA1305T
WD
CHI
24
18
20
D0 to D7
SDA
SCL
1 to 8
MGR214
Fig.20 Block diagram with switched microcontroller supply.
14 V
Dx
ON/OFF
RP
RES
ON/OFF
RP
CHI
CHI
WD
WD
(1)
(1)
MGR215
a. First power-on.
b. Normal switch-on.
(1) Level not defined.
Fig.21 On/off description with switched microcontroller supply.
24
2004 Jan 15
Philips Semiconductors
Product specification
On/off logic IC
SAA1305T
Scenarios for ON/OFF logic with switched microcontroller supply
5 V continuous
regulator
SAA1305T
5 V regulator
microcontroller
RES = LOW
RP = HIGH
200 ms
RES = HIGH
ON/OFF = HIGH
RESET = HIGH
CHI = LOW
6 ms
20 ms
RESET = LOW
RP = LOW
2
I C-bus read status/old/new register
CHI = HIGH
2
I C-bus write reset time/blink/LED status
2
I C-bus write ENABLE-RESET
ON/OFF = LOW
RESET = HIGH
MGR216
Fig.22 Proper first connection on power supply.
SAA1305T
5 V regulator
microcontroller
Dx
RP = HIGH
ON/OFF = HIGH
RESET = HIGH
RESET = LOW
6 ms
10 ms
CHI = LOW
RP = LOW
2
I C-bus read status/old/new register
CHI = HIGH
WD = LOW
WD = HIGH
WD = LOW
250 ms
250 ms
MGR217
Fig.23 Switch-on after a valid input change.
2004 Jan 15
25
Philips Semiconductors
Product specification
On/off logic IC
SAA1305T
SAA1305T
input D0 = LOW
5 V regulator
microcontroller
25 ms
TS = LOW
ON/OFF = LOW
RESET = HIGH
250 ms
10 ms
RP = HIGH
CHI = LOW
ON/OFF = HIGH
RP = LOW
(1)
input D0 = HIGH
2
I C-bus read status/old/new register
CHI = HIGH
WD = LOW
WD = HIGH
WD = LOW
250 ms
250 ms
MGR218
(1) If input D0 = LOW, the microcontroller will restart the VL timer.
Fig.24 VL timer behaviour.
SAA1305T
h
5 V regulator
microcontroller
wrong or missed Watchdog timer trigger signal
RP = HIGH
1 to 20 ms
300 ms
RP = LOW
CHI = LOW
wrong or missed Watchdog timer trigger signal
wrong or missed Watchdog timer trigger signal
4 times
RP = HIGH
RP = LOW
1 to 20 ms
300 ms
ON/OFF = LOW
MGR219
Fig.25 Wrong or missed Watchdog timer trigger.
2004 Jan 15
26
Philips Semiconductors
Product specification
On/off logic IC
SAA1305T
PACKAGE OUTLINE
SO24: plastic small outline package; 24 leads; body width 7.5 mm
SOT137-1
D
E
A
X
c
H
v
M
A
E
y
Z
24
13
Q
A
2
A
(A )
3
A
1
pin 1 index
θ
L
p
L
1
12
w
detail X
e
M
b
p
0
5
10 mm
scale
DIMENSIONS (inch dimensions are derived from the original mm dimensions)
A
max.
(1)
(1)
(1)
UNIT
mm
A
A
A
b
c
D
E
e
H
L
L
Q
v
w
y
θ
1
2
3
p
E
p
Z
0.3
0.1
2.45
2.25
0.49
0.36
0.32
0.23
15.6
15.2
7.6
7.4
10.65
10.00
1.1
0.4
1.1
1.0
0.9
0.4
2.65
0.1
0.25
0.01
1.27
0.05
1.4
0.25 0.25
0.01
0.1
8o
0o
0.012 0.096
0.004 0.089
0.019 0.013 0.61
0.014 0.009 0.60
0.30
0.29
0.419
0.394
0.043 0.043
0.016 0.039
0.035
0.016
inches
0.055
0.01 0.004
Note
1. Plastic or metal protrusions of 0.15 mm (0.006 inch) maximum per side are not included.
REFERENCES
OUTLINE
EUROPEAN
PROJECTION
ISSUE DATE
VERSION
IEC
JEDEC
JEITA
99-12-27
03-02-19
SOT137-1
075E05
MS-013
2004 Jan 15
27
Philips Semiconductors
Product specification
On/off logic IC
SAA1305T
SOLDERING
Wave soldering
Introduction to soldering surface mount packages
Conventional single wave soldering is not recommended
for surface mount devices (SMDs) or printed-circuit boards
with a high component density, as solder bridging and
non-wetting can present major problems.
This text gives a very brief insight to a complex technology.
A more in-depth account of soldering ICs can be found in
our “Data Handbook IC26; Integrated Circuit Packages”
(document order number 9398 652 90011).
To overcome these problems the double-wave soldering
method was specifically developed.
There is no soldering method that is ideal for all surface
mount IC packages. Wave soldering can still be used for
certain surface mount ICs, but it is not suitable for fine pitch
SMDs. In these situations reflow soldering is
recommended.
If wave soldering is used the following conditions must be
observed for optimal results:
• Use a double-wave soldering method comprising a
turbulent wave with high upward pressure followed by a
smooth laminar wave.
Reflow soldering
• For packages with leads on two sides and a pitch (e):
Reflow soldering requires solder paste (a suspension of
fine solder particles, flux and binding agent) to be applied
to the printed-circuit board by screen printing, stencilling or
pressure-syringe dispensing before package placement.
Driven by legislation and environmental forces the
– larger than or equal to 1.27 mm, the footprint
longitudinal axis is preferred to be parallel to the
transport direction of the printed-circuit board;
– smaller than 1.27 mm, the footprint longitudinal axis
must be parallel to the transport direction of the
printed-circuit board.
worldwide use of lead-free solder pastes is increasing.
Several methods exist for reflowing; for example,
convection or convection/infrared heating in a conveyor
type oven. Throughput times (preheating, soldering and
cooling) vary between 100 and 200 seconds depending
on heating method.
The footprint must incorporate solder thieves at the
downstream end.
• For packages with leads on four sides, the footprint must
be placed at a 45° angle to the transport direction of the
printed-circuit board. The footprint must incorporate
solder thieves downstream and at the side corners.
Typical reflow peak temperatures range from
215 to 270 °C depending on solder paste material. The
top-surface temperature of the packages should
preferably be kept:
During placement and before soldering, the package must
be fixed with a droplet of adhesive. The adhesive can be
applied by screen printing, pin transfer or syringe
dispensing. The package can be soldered after the
adhesive is cured.
• below 225 °C (SnPb process) or below 245 °C (Pb-free
process)
– for all BGA, HTSSON-T and SSOP-T packages
Typical dwell time of the leads in the wave ranges from
3 to 4 seconds at 250 °C or 265 °C, depending on solder
material applied, SnPb or Pb-free respectively.
– for packages with a thickness ≥ 2.5 mm
– for packages with a thickness < 2.5 mm and a
volume ≥ 350 mm3 so called thick/large packages.
A mildly-activated flux will eliminate the need for removal
of corrosive residues in most applications.
• below 240 °C (SnPb process) or below 260 °C (Pb-free
process) for packages with a thickness < 2.5 mm and a
volume < 350 mm3 so called small/thin packages.
Manual soldering
Moisture sensitivity precautions, as indicated on packing,
must be respected at all times.
Fix the component by first soldering two
diagonally-opposite end leads. Use a low voltage (24 V or
less) soldering iron applied to the flat part of the lead.
Contact time must be limited to 10 seconds at up to
300 °C.
When using a dedicated tool, all other leads can be
soldered in one operation within 2 to 5 seconds between
270 and 320 °C.
2004 Jan 15
28
Philips Semiconductors
Product specification
On/off logic IC
SAA1305T
Suitability of surface mount IC packages for wave and reflow soldering methods
SOLDERING METHOD
PACKAGE(1)
WAVE
not suitable
REFLOW(2)
BGA, HTSSON..T(3), LBGA, LFBGA, SQFP, SSOP..T(3), TFBGA,
USON, VFBGA
suitable
DHVQFN, HBCC, HBGA, HLQFP, HSO, HSOP, HSQFP, HSSON,
HTQFP, HTSSOP, HVQFN, HVSON, SMS
PLCC(5), SO, SOJ
not suitable(4)
suitable
suitable
suitable
LQFP, QFP, TQFP
not recommended(5)(6) suitable
SSOP, TSSOP, VSO, VSSOP
CWQCCN..L(8), PMFP(9), WQCCN..L(8)
not recommended(7)
suitable
not suitable
not suitable
Notes
1. For more detailed information on the BGA packages refer to the “(LF)BGA Application Note” (AN01026); order a copy
from your Philips Semiconductors sales office.
2. All surface mount (SMD) packages are moisture sensitive. Depending upon the moisture content, the maximum
temperature (with respect to time) and body size of the package, there is a risk that internal or external package
cracks may occur due to vaporization of the moisture in them (the so called popcorn effect). For details, refer to the
Drypack information in the “Data Handbook IC26; Integrated Circuit Packages; Section: Packing Methods”.
3. These transparent plastic packages are extremely sensitive to reflow soldering conditions and must on no account
be processed through more than one soldering cycle or subjected to infrared reflow soldering with peak temperature
exceeding 217 °C ± 10 °C measured in the atmosphere of the reflow oven. The package body peak temperature
must be kept as low as possible.
4. These packages are not suitable for wave soldering. On versions with the heatsink on the bottom side, the solder
cannot penetrate between the printed-circuit board and the heatsink. On versions with the heatsink on the top side,
the solder might be deposited on the heatsink surface.
5. If wave soldering is considered, then the package must be placed at a 45° angle to the solder wave direction.
The package footprint must incorporate solder thieves downstream and at the side corners.
6. Wave soldering is suitable for LQFP, TQFP and QFP packages with a pitch (e) larger than 0.8 mm; it is definitely not
suitable for packages with a pitch (e) equal to or smaller than 0.65 mm.
7. Wave soldering is suitable for SSOP, TSSOP, VSO and VSSOP packages with a pitch (e) equal to or larger than
0.65 mm; it is definitely not suitable for packages with a pitch (e) equal to or smaller than 0.5 mm.
8. Image sensor packages in principle should not be soldered. They are mounted in sockets or delivered pre-mounted
on flex foil. However, the image sensor package can be mounted by the client on a flex foil by using a hot bar
soldering process. The appropriate soldering profile can be provided on request.
9. Hot bar or manual soldering is suitable for PMFP packages.
2004 Jan 15
29
Philips Semiconductors
Product specification
On/off logic IC
SAA1305T
DATA SHEET STATUS
DATA SHEET
LEVEL
PRODUCT
STATUS(2)(3)
DEFINITION
STATUS(1)
I
Objective data
Development This data sheet contains data from the objective specification for product
development. Philips Semiconductors reserves the right to change the
specification in any manner without notice.
II
Preliminary data Qualification
This data sheet contains data from the preliminary specification.
Supplementary data will be published at a later date. Philips
Semiconductors reserves the right to change the specification without
notice, in order to improve the design and supply the best possible
product.
III
Product data
Production
This data sheet contains data from the product specification. Philips
Semiconductors reserves the right to make changes at any time in order
to improve the design, manufacturing and supply. Relevant changes will
be communicated via a Customer Product/Process Change Notification
(CPCN).
Notes
1. Please consult the most recently issued data sheet before initiating or completing a design.
2. The product status of the device(s) described in this data sheet may have changed since this data sheet was
published. The latest information is available on the Internet at URL http://www.semiconductors.philips.com.
3. For data sheets describing multiple type numbers, the highest-level product status determines the data sheet status.
DEFINITIONS
DISCLAIMERS
Short-form specification
The data in a short-form
Life support applications
These products are not
specification is extracted from a full data sheet with the
same type number and title. For detailed information see
the relevant data sheet or data handbook.
designed for use in life support appliances, devices, or
systems where malfunction of these products can
reasonably be expected to result in personal injury. Philips
Semiconductors customers using or selling these products
for use in such applications do so at their own risk and
agree to fully indemnify Philips Semiconductors for any
damages resulting from such application.
Limiting values definition Limiting values given are in
accordance with the Absolute Maximum Rating System
(IEC 60134). Stress above one or more of the limiting
values may cause permanent damage to the device.
These are stress ratings only and operation of the device
at these or at any other conditions above those given in the
Characteristics sections of the specification is not implied.
Exposure to limiting values for extended periods may
affect device reliability.
Right to make changes
Philips Semiconductors
reserves the right to make changes in the products -
including circuits, standard cells, and/or software -
described or contained herein in order to improve design
and/or performance. When the product is in full production
(status ‘Production’), relevant changes will be
Application information
Applications that are
communicated via a Customer Product/Process Change
Notification (CPCN). Philips Semiconductors assumes no
responsibility or liability for the use of any of these
products, conveys no licence or title under any patent,
copyright, or mask work right to these products, and
makes no representations or warranties that these
products are free from patent, copyright, or mask work
right infringement, unless otherwise specified.
described herein for any of these products are for
illustrative purposes only. Philips Semiconductors make
no representation or warranty that such applications will be
suitable for the specified use without further testing or
modification.
2004 Jan 15
30
Philips Semiconductors
Product specification
On/off logic IC
SAA1305T
PURCHASE OF PHILIPS I2C COMPONENTS
Purchase of Philips I2C components conveys a license under the Philips’ I2C patent to use the
components in the I2C system provided the system conforms to the I2C specification defined by
Philips. This specification can be ordered using the code 9398 393 40011.
2004 Jan 15
31
Philips Semiconductors – a worldwide company
Contact information
For additional information please visit http://www.semiconductors.philips.com.
Fax: +31 40 27 24825
For sales offices addresses send e-mail to: sales.addresses@www.semiconductors.philips.com.
© Koninklijke Philips Electronics N.V. 2004
SCA76
All rights are reserved. Reproduction in whole or in part is prohibited without the prior written consent of the copyright owner.
The information presented in this document does not form part of any quotation or contract, is believed to be accurate and reliable and may be changed
without notice. No liability will be accepted by the publisher for any consequence of its use. Publication thereof does not convey nor imply any license
under patent- or other industrial or intellectual property rights.
Printed in The Netherlands
R32/02/pp32
Date of release: 2004 Jan 15
Document order number: 9397 750 12586
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