SAA7818HL,557 [NXP]

SAA7818HL;


型号：	SAA7818HL,557
厂家：	NXP
描述：	SAA7818HL 商用集成电路
文件：	总30页 (文件大小：120K)
中文：	中文翻译
下载：	下载PDF数据表文档文件

SAA7818HL

DVD and CD playback IC

Rev. 03 — 25 November 2004

Product data sheet

1. General description

The SAA7818HL is a device for 6 × DVD and 18 × CD playback applications.

This device contains an embedded microcontroller which can operate as a 33 MHz or

67 MHz equivalent 80C51 and interfaces to the channel decoder, block decoder and servo

processor.

New features enable superior playability in both CD and DVD modes.

The block decoder has an embedded DVD video authentication module and supports up

to 64 Mbit of external SDRAM memory. The data can be fed out in a number of different

conﬁgurations including I²S-bus, ATAPI and UDE. This device also includes the option to

bypass the external memory altogether, creating a bufferless ATAPI or UDE data path

solution.

The channel decoder has selectable differential and single-ended HF inputs, which are

compatible with the TZA1036 and TZA1038 devices. There is an option to output the data

as raw I²S-bus via some programmable data I/O pins. With increased tap setting for the

PLL equalizer compared with the SAA7816 device and enhanced playability of black dots

and scratches, overall playability has been greatly improved. There are also beneﬁts due

to a new defect detector that allows holding the HF PLL frequency and slicer settings over

a defect. These, together with an additional limit equalizer lead to improved tolerance to

continuity errors in DVD playback mode. There are also two extra motor gain settings

compared to the SAA7816 device and support for copyright protection strategies in games

applications.

The servo processor has been upgraded to include an improved defect detection and

handling process, an integrated envelope detection circuit and also DC offset

compensation on the diode inputs.

2. Features

■ Host interface:

◆ Supports ATAPI interface

◆ Conﬁgurable as generic DMA interface; for use with external host interface devices

◆ Automatic determination of block length for mode 2; form 1 and form 2 sectors;

block length transferred is programmable

◆ Supports synchronous UDE interface

◆ Supports bufferless mode.

■ Block decoder:

◆ Supports CD-ROM, CDr, CD-DA, VCD, SVCD, CD-I, photo CD and DVD video

formats

SAA7818HL

Philips Semiconductors

DVD and CD playback IC

◆ Supports real-time error detection and correction in hardware for CD-ROM mode

◆ CD-ROM error corrector switchable between single or dual pass; both with Error

Detection/Correction (EDC)

◆ Internal registers are memory mapped

◆ Embedded DVD video authentication module.

■ Buffer memory controller:

◆ Support for up to 64 Mbit external SDRAM memory

◆ Block based sector addressing.

■ Channel decoder:

◆ Selectable differential and single-ended HF inputs; compatible with the TZA1036

and TZA1038; single-ended input has bypassable AGC

◆ Internal 8-bit ADC

◆ Digital PLL and slicer for HF clock regeneration

◆ Supports EFM and EFM+ demodulation

◆ Full CD error correction strategy; t = 2 and e = 4

◆ On-chip CD error corrector memory with ±8 frame jitter margin

◆ Built-in hardware for double pass DVD error corrector; can correct 5 errors in C1

frame; 16 errors in C2 frame

◆ Error corrector monitor signal available

◆ I²S-bus output available via programmable vampire pins

◆ Programmable frame sync loss indication

◆ Increased tap settings for PLL equalizer compared with SAA7816

◆ Enhanced playability of black dots and scratches with improved defect detector; it

enables the HF PLL frequency, slicer, high-pass ﬁlter, AGC and offset loops to be

held when a defect is detected

◆ Improved tolerance to continuity errors in DVD play mode

◆ Limit equalizer

◆ Two extra motor gain settings compared to SAA7816

◆ Support for copyright protection strategy for games applications

◆ Hardware AGC loop, in combination with front-end IC (TZA1038)

◆ Hardware automatic offset compensation loop, in combination with front-end IC

(TZA1038)

◆ Average jitter can be read back

◆ Internal digital high-pass ﬁlter on HF input, with programmable cut-off frequencies

◆ Run Length 3 (RL3) pushback feature

◆ PLL monitor signal available

◆ Interpolate and hold on audio output.

■ Spindle motor control:

◆ Advanced motor control loop allows CAV, CLV and pseudo-CLV playback

◆ Support for 3-pin and 1-pin tacho control

◆ Motor control via incoming bitstream or tacho.

■ Speed operation:

◆ Supports 18 × CD-ROM playback

◆ Supports 6 × DVD-ROM playback.

9397 750 14312

Product data sheet

Rev. 03 — 25 November 2004

2 of 30

SAA7818HL

Philips Semiconductors

DVD and CD playback IC

■ Multimedia functions:

◆ Supports audio playback via DRAM buffer; allows audio discs to be played at

higher speeds

◆ IEC 60958 (SPDIF, AES/EBU and DOBM) output with Q-W subcode and

programmable category code; output at n = 1 rate

◆ Audio output via I²S-bus vampire interface: 4 × oversampling ﬁlter, digital volume

control, attenuator and mute.

■ Microcontroller interface:

◆ Embedded microcontroller can operate as 33 MHz or 67 MHz equivalent 80C51

◆ Embedded co-processor for fast multiply, divide, shift and normalize instructions;

supported by C-compilers

◆ Co-processor for MSF calculations

◆ Memory mapped interfaces to sub functions

◆ External microcontroller support

◆ Embedded SRAM: 1.5 kbytes Xdata, 512 bytes Idata, 224 bytes data and registers

◆ 4 banks; on Idata and registers, for better multi-tasking support

◆ External ﬂash EPROM programming support: serial boot possible with empty ﬂash

EPROM and internal program upload support

◆ Code space support up to 1 Mbyte through built-in bank switching

◆ Debug interface for embedded microcontroller.

■ Servo processor:

◆ Switched current Analog-to-Digital Converters (ADCs) for diode and error signal

inputs

◆ Selectable servo error or servo diode inputs

◆ Focus and radial servo loops

◆ Automatic closed-loop gain control available for focus and radial loops

◆ Built-in access procedure with fast track count input

◆ High-speed track crossing velocity measurement (> 350 kHz) for CD and DVD

◆ Special DVD track crossing support

◆ Fast radial brake circuitry

◆ Eight-to-Fourteen Modulation (EFM) actuator damping circuitry

◆ Sledge motor servo loop with enhanced PCS support

◆ Sledge stepper motor support

◆ Adaptive Repetitive Control (ARC)

◆ Debug interface for servo

◆ DC offset compensation for servo

◆ White and black dot defect detection and handling

◆ Integrated envelope detection.

■ Clock multiplier:

◆ On-chip clock multipliers allows the use of 8.4672 MHz crystal.

9397 750 14312

Product data sheet

Rev. 03 — 25 November 2004

3 of 30

SAA7818HL

Philips Semiconductors

DVD and CD playback IC

3. Quick reference data

Table 1:

Quick reference data

Symbol Parameter

Conditions

Min

1.65

3.0

Typ

1.8

3.3

Max

1.95

3.6

Unit

V_DDD(C)

V_DDD(P)

digital supply voltage for core

digital supply voltage for pad

cells (3 V)

V_DDA

I_DDA

analog supply voltage

analog supply current

3.0

3.3

3.6

I_DDD(P)

digital supply current for pad

cells

135

I_DDD(C)

f_xtal

digital supply current for core

crystal frequency

MHz

°C

8.4672 9

T_amb

T_stg

ambient temperature

storage temperature

−40

−55

+85

+125

°C

4. Ordering information

Table 2:

Ordering information

Type number

Package

Name

Description

Version

SAA7818HL

LQFP208

plastic low proﬁle quad ﬂat package; 208 leads;

SOT459-1

body 28 × 28 × 1.4 mm

9397 750 14312

Product data sheet

Rev. 03 — 25 November 2004

4 of 30

xxxx xxxxxxxxxxxxxxxxxxxxxxxxxxxxxx x xxxxxxxxxxxxxx xxxxxxxxxx xxx xxxxxx xxxxxxxxxxxxxxxxxxxxxxx xxxxxxxxxxxxxxxxxxxxxx

xxxxx xxxxxx xx xxxxxxxxxxxxxxxxxxxxxxxxxxxxx xxxxxxxxxxxxxxxxxxxxxx xxxxxxxxxxx xxxxxxx xxxxxxxxxxxxxxxxxxx

xxxxxxxxxxxxxxxx xxxxxxxxxxxxxx xxxxxx xx xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx xxxxxxxxxxxxxxxxxxxxxxxx xxxxxxx

xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx xxxxxxxxxxx xxxxx x x

CHANNEL DECODER

BLOCK DECODER

CD/DVD

ERCO

DRAM

INTERFACE

DRIVE

INTERFACE

ADC

BIT DETECTOR

AND

MEMORY

PROCESSOR

HOST

INTERFACE

DEMODULATOR

ERCO

MEMORY

PROCESSOR

MULTIMEDIA

INTERFACE

MOTOR/TACHO

INTERFACE

SUBCODE

INTERFACE

CSS

MODULE

CONTROL

REGISTERS

CPU INTERFACE

MICROCONTROLLER

SERVO

ADDRESS

DECODER

RAM

CPU

PCS

ACCELERATOR

ADC

SERVO

PROCESSOR

1.5 kbytes ROM

736 bytes RAM

PORT REGISTER

1.5 kbytes

AUXILLIARY

RAM

ADC

SERVO

ACCELERATOR

SFRs

mdb204

Fig 1. Block diagram.

SAA7818HL

Philips Semiconductors

DVD and CD playback IC

6. Pinning information

6.1 Pinning

156

SAA7818HL

105

001aab845

Fig 2. Pin conﬁguration.

6.2 Pin description

Table 3:

Symbol

Pin description

Pin Type^[1]Drive/

Description

threshold

POR_NEG

BCA

Power-on reset input; active LOW

BCA input (mode 2 = SCCLK;

mace_debug = opc_int)

MOTO1

motor control output

tacho 1 input

tacho 2 input

tacho 3 input

V_DDD(P1)

V_SSD(P1)

TEST1

TEST2

V_DDA1

digital supply voltage 1 for the pad cells (3.3 V)

digital ground 1 for the pad cells

test input 1 (internal pull-down resistor)

test input 2 (internal pull-down resistor

analog supply voltage 1 (3.3 V)

negative differential HF input

positive differential HF input

single-ended HF input (AGC)

analog ground 1

HFIN_DN

HFIN_DP

HFIN_SE

V_SSA1

VCOM

V_DDA2

common mode reference output (TZA1038)

analog supply voltage 2 (3.3 V)

DAC output

ALPHA0

CRIN

clock input

CROUT

V_SSA2

clock output

analog ground 2

IREF

reference current output

9397 750 14312

Product data sheet

Rev. 03 — 25 November 2004

6 of 30

SAA7818HL

Philips Semiconductors

DVD and CD playback IC

Table 3:

Symbol

Pin description …continued

Pin Type^[1]Drive/

Description

threshold

UOPT

upper reference input voltage for ADC ladder

sine input from hall detectors

SIN_PHI

COS_PHI

XDET

cosine input from hall detectors

auxiliary ADC input

ACT_EMFP

ACT_EMFN

V_DDA3

EMF of the actuator; positive input

EMF of the actuator; negative input

analog supply voltage 3 (3.3 V)

UOPB

decoupling point for ADC ladder

analog ground 3

V_SSA3

AI/O

diode input 1

D2_TLN

D3_REN

D4_FEN

S1_MIRN

diode input 2 or normal track-loss signal

diode input 3 or normal radial error signal

diode input 4 or normal focus error signal

satellite diode input 1/normal mirror signal

satellite diode input 2

V_RIN

I/O reference voltage for servo ADC

track count input

FTCH

V_SSD(P2)

V_DDD(P2)

P5_7_DEFO_N 42

digital ground 2 for the pad cells

digital supply voltage 2 for the pad cells (3.3 V)

defect output or general purpose I/O

defect input or general purpose I/O

track-loss measure output or general purpose I/O

radial polarity or focus OK or general purpose I/O

CS external SRAM or general purpose I/O

servo clock output or general purpose I/O

I²C-bus data or general purpose I/O

I²C-bus clock or general purpose I/O

M/T

P5_6_DEFI_N

P5_5_TL

P5_4_RP_FOK 45

P5_3_CE1

P5_2_CLO

P5_1_SDA

P5_0_SCL

SCCLK

internal/external microcontroller clock

[mace_debug = int1 (PLUM)]

V_DDD(P3)

V_SSD(P3)

digital supply voltage 3 for the pad cells (3.3 V)

digital ground 3 for the pad cells

radial output (3-state during reset)

focus output (3-state during reset)

sledge output (3-state during reset)

disconnects radial actuator (1 = disconnect)

RAC_SW

REF_SIN

PDM reference signal output; removes DC offset

from sin_phi

REF_COS

PDM reference signal output; removes DC offset

from cos_phi

V_DDD(P4)

V_SSD(P4)

digital supply voltage 4 for the pad cells (3.3 V)

digital ground 4 for the pad cells

9397 750 14312

Product data sheet

Rev. 03 — 25 November 2004

7 of 30

SAA7818HL

Philips Semiconductors

DVD and CD playback IC

Table 3:

Symbol

Pin description …continued

Pin Type^[1]Drive/

Description

threshold

P4_7_PXT2EN

M/T

timer 2 input enable or SILD for TZA1038

timer 2 clock input or SICL for TZA1038

timer 1 clock input or SIDA for TZA1038

timer 0 clock input or CS2 for external device

general purpose I/O

P4_6_PXT2

P4_5_PXT0

P4_4_PXT

P4_3_A19

P4_2_A18

V_DDD(C1)

M/T

general purpose I/O

digital supply voltage 1 for the core (1.8 V)

digital ground 1 for the core

V_SSD(C1)

UA0_P1_0

M/T

Port 1; demultiplexed lower microcontroller

address lines; bit 0

UA1_P1_1

UA2_P1_2

UA3_P1_3

UA4_P1_4

UA5_P1_5

UA6_P1_6

UA7_P1_7

Port 1; demultiplexed lower microcontroller

address lines; bit 1 (mode 3 = SCCLK)

Port 1; demultiplexed lower microcontroller

address lines; bit 2 (mode 3 = OTD)

Port 1; demultiplexed lower microcontroller

address lines; bit 3 (mode 3 = DEB_OUT)

Port 1; demultiplexed lower microcontroller

address lines; bit 4 (mode 3 = MON_A)

Port 1; demultiplexed lower microcontroller

address lines; bit 5 (mode 3 = MON_D)

Port 1; demultiplexed lower microcontroller

address lines; bit 6 (mode 3 = vampire 6 to SYNC)

Port 1; demultiplexed lower microcontroller

address lines; bit 7 (mode 3 = vampire 7 to V4)

V_DDD(P5)

digital supply voltage 5 for the pad cells (3.3 V)

digital ground 5 for the pad cells

V_SSD(P5)

EAN_WAITN

M/T

address input or wait output (internal pull-up

resistor)

DSDEN_SRST

PSENN_CS

ALE_ASTB

microcontroller reset output [mace_debug = int0

(HDR66/PLUM)]

M/T

programmable strobe enable or output; enable for

external device (internal pull-up resistor)

address latch or chip select (internal pull-up

resistor)

V_DDD(C2)

V_SSD(C2)

UA12

digital supply voltage 2 for the core (1.8 V)

digital ground 2 for the core

M/T

Port 2; upper microcontroller address line; bit 12

Port 2; upper microcontroller address line; bit 15

A16 to EPROM

UA15

P4_0_A16

P4_1_A17

UA14

A17 to EPROM

Port 2; upper microcontroller address line; bit 14

Port 2; upper microcontroller address line; bit 13

Port 2; upper microcontroller address line; bit 8

UA13

UA8

9397 750 14312

Product data sheet

Rev. 03 — 25 November 2004

8 of 30

SAA7818HL

Philips Semiconductors

DVD and CD playback IC

Table 3:

Symbol

Pin description …continued

Pin Type^[1]Drive/

Description

threshold

UA9

M/T

Port 2; upper microcontroller address line; bit 9

Port 2; upper microcontroller address line; bit 11

Port 2; upper microcontroller address line; bit 10

digital supply voltage 6 for the pad cells (3.3 V)

digital ground 6 for the pad cells

UA11

M/T

UA10

V_DDD(P6)

V_SSD(P6)

UDA7

M/T

Port 0; multiplexed microcontroller data/lower

address line; bit 7

UDA6

UDA5

UDA4

UDA3

UDA2

UDA1

UDA0

Port 0; multiplexed microcontroller data/lower

address line; bit 6

Port 0; multiplexed microcontroller data/lower

address line; bit 5

100

101

102

103

104

Port 0; multiplexed microcontroller data/lower

address line; bit 4

Port 0; multiplexed microcontroller data/lower

address line; bit 3

Port 0; multiplexed microcontroller data/lower

address line; bit 2

Port 0; multiplexed microcontroller data/lower

address line; bit 1

Port 0; multiplexed microcontroller data/lower

address line; bit 0

V_DDD(P7)

105

106

107

108

109

digital supply voltage 7 for the pad cells (3.3 V)

digital ground 7 for the pad cells

V_SSD(P7)

P3_7_RDN

P3_6_WRN

P3_5_TXD2

M/T

read signal input or general purpose I/O

write signal output or general purpose I/O

UART 2 transmit line output or general purpose

I/O

P3_4_RXD2

P3_3_INT1

P3_2_INT0

P3_1_TXD1

110

111

112

113

M/T

UART 2 receive line input or general purpose I/O

interrupt 1 input or general purpose I/O

interrupt 0 input or general purpose I/O

UART 1 transmit line output or general purpose

I/O

P3_0_RXD1

V_DDD(C3)

V_SSD(C3)

HRESET

DD7

114

115

116

117

118

119

M/T

UART 1 receive line input or general purpose I/O

digital supply voltage 3 for the core (1.8 V)

digital ground 3 for the core

host reset input

AL/T

host interface/generic DMA; bit 7

DD8

host interface/generic DMA; bit 8

(mode 1 = MEAS_CFLG)

DD6

DD9

120

121

AL/T

host interface/generic DMA; bit 6

host interface/generic DMA; bit 9

(mode 1 = MEAS1)

DD5

122

AL/T

host interface/generic DMA; bit 5

9397 750 14312

Product data sheet

Rev. 03 — 25 November 2004

9 of 30

SAA7818HL

Philips Semiconductors

DVD and CD playback IC

Table 3:

Symbol

Pin description …continued

Pin Type^[1]Drive/

Description

threshold

DD10

123

AL/T

host interface/generic DMA; bit 10

(mode 1 = MON_A)

DD4

124

125

AL/T

host interface/generic DMA; bit 4

DD11

host interface/generic DMA; bit 11

(mode 1 = MON_D)

V_DDD(P8)

V_SSD(P8)

DD3

126

127

128

129

digital supply voltage 8 for the pad cells (3.3 V)

digital ground 8 for the pad cells

AL/T

host interface/generic DMA; bit 3

DD12

host interface/generic DMA; bit 12

(mode 1 = DEB_OUT)

DD2

130

131

AL/T

host interface/generic DMA; bit 2

DD13

host interface/generic DMA; bit 13

(mode 1 = OTD)

DD1

132

133

AL/T

host interface/generic DMA; bit 1

DD14

host interface/generic DMA; bit 14

(mode 1 = SCCLK)

DD0

134

135

AL/T

host interface/generic DMA; bit 0

DD15

host interface/generic DMA; bit 15

(mace_debug = servo_int)

V_DDD(C4)

V_SSD(C4)

136

137

digital supply voltage 4 for the core (1.8 V)

digital ground 4 for the core

DMARQ_GACK 138

host DMA request or generic DMA acknowledge

host interface input write strobe

host interface input read strobe

DIOW

139

140

141

142

DIOR

IORDY

host interface ready output

DMACK_GRQ

host DMA acknowledge or generic DMA request

input

INTRQ

143

144

145

146

147

148

host interface interrupt request output

host interface 8/16-bit Port output

IOCS16

DA1_GWR

V_DDD(P9)

V_SSD(P9)

PDIAG

AL/T

host address bit 1 or generic write

digital supply voltage 9 for the pad cells (3.3 V)

digital ground 9 for the pad cells

AL/T

host interface passed test input/output

(mode 1 = SYNC)

DA0

149

150

151

152

153

AL/T

host address bit 0 input/output

DA2_GRD

CS0

host address bit 2 or generic read

host interface chip select 0 input/output

host interface chip select 1 input/output

CS1

DASP

host interface active slave present input/output

(mode 1 = V4)

IECO_CL1

V_DDD(P10)

154

155

IEC 60958 output or CL1 output from HDR66

digital supply voltage 10 for the pad cells (3.3 V)

9397 750 14312

Product data sheet

Rev. 03 — 25 November 2004

10 of 30

SAA7818HL

Philips Semiconductors

DVD and CD playback IC

Table 3:

Symbol

Pin description …continued

Pin Type^[1]Drive/

Description

threshold

V_SSD(P10)

XDA3

156

157

158

159

160

161

162

163

164

165

166

167

168

169

170

171

172

173

174

175

176

177

178

179

180

181

182

183

184

185

186

187

188

189

190

191

192

193

194

195

digital ground 10 for the pad cells

DRAM address output; bit 3

XDA2

DRAM address output; bit 2

XDA1

DRAM address output; bit 1

XDA0

DRAM address output; bit 0

XDA10

V_DDD(P11)

V_SSD(P11)

XDD2

DRAM address output; bit 10

digital supply voltage 11 for the pad cells (3.3 V)

digital ground 11 for the pad cells

DRAM data bus input/output; bit 2

DRAM data bus input/output; bit 1

DRAM data bus input/output; bit 0

DRAM data bus input/output; bit 3

DRAM data bus input/output; bit 4

DRAM data bus input/output; bit 5

DRAM data bus input/output; bit 6

DRAM data bus input/output; bit 7

digital supply voltage 5 for the core (1.8 V)

digital ground 5 for the core

M/T

XDD1

XDD0

XDD3

XDD4

XDD5

XDD6

XDD7

V_DDD(C5)

V_SSD(C5)

LDQM

XWR

SDRAM data mask output LOW

DRAM write strobe output

XRAS

DRAM RAS strobe output

SDCS

SDRAM chip select output

XCAS

DRAM CAS strobe output

XDA12

XDA13

SDCK

DRAM address output; bit 12

DRAM address output; bit 13

SDRAM clock output

UDQM

V_DDD(P12)

V_SSD(P12)

XDD8

SDRAM data mask output HIGH

digital supply voltage 12 for the pad cells (3.3 V)

digital ground 12 for the pad cells

DRAM data bus input/output; bit 8

DRAM data bus input/output; bit 9

DRAM data bus input/output; bit 10

DRAM data bus input/output; bit 11

DRAM data bus input/output; bit 12

DRAM data bus input/output; bit 15

DRAM data bus input/output; bit 14

DRAM data bus input/output; bit 13

digital supply voltage 6 for the core (1.8 V)

digital ground 6 for the core

M/T

XDD9

XDD10

XDD11

XDD12

XDD15

XDD14

XDD13

V_DDD(C6)

V_SSD(C6)

XDA11

DRAM address output; bit 11

9397 750 14312

Product data sheet

Rev. 03 — 25 November 2004

11 of 30

SAA7818HL

Philips Semiconductors

DVD and CD playback IC

Table 3:

Symbol

Pin description …continued

Pin Type^[1]Drive/

Description

threshold

XDA9

196

197

198

199

200

201

202

203

204

205

DRAM address output; bit 9

XDA8

DRAM address output; bit 8

XDA7

DRAM address output; bit 7

XDA6

DRAM address output; bit 6

XDA5

DRAM address output; bit 5

XDA4

DRAM address output; bit 4

V_DDD(P13)

V_SSD(P13)

FLAG

digital supply voltage 13 for the pad cells (3.3 V)

digital ground 13 for the pad cells

I²S-bus ﬂag input/output (mode 2 = DEB_OUT)

M/T

MCK

multimedia master clock input/output

(mode 2 = MEAS_CFLG)

DATA_SDI

206

207

M/T

I²S-bus data input/output (mode 2 = MON_A)

I²S-bus word clock input/output

(mode 2 = MEAS1)

WCLK_WSI

BCLK_SCKI

208

M/T

I²S-bus bit clock input/output (mode 2 = MON_D)

[1] See Table 4 for the pin type deﬁnition.

Table 4:

Pin type deﬁnition

Deﬁnition

Type

input

output

open-drain

bidirectional

3-state output

analog input

analog output

power connection; all supply pins must be connected to the same external power

supply voltage

9397 750 14312

Product data sheet

Rev. 03 — 25 November 2004

12 of 30

SAA7818HL

Philips Semiconductors

DVD and CD playback IC

7. Register and memory map

The internal registers are SFRs within the address space of the internal microcontroller.

They are accessed in the same way as standard 80C51 SFRs.

The external registers and memory spaces make up the external memory map of the

internal microcontroller. Some of the memory spaces are on-chip and some are in the

external DRAM. All registers are addressed as external memory space with respect to the

internal microcontroller.

Table 5:

Internal registers

ADDR

(hex)

0/8

1/9

2/A

3/B

4/C

5/D

6/E

7/F

0080

0088

0090

0098

00A0

00A8

00B0

00B8

00C0

00C8

00D0

00D8

00E0

00E8

00F0

00F8

DPL

DPH

PCON

TCON

TMOD

TL0

TL1

TH0

TH1

SCON

SBUF

CLK_GEN DIV17

P2SFR

INTLATCH INTEN

SCON2

T2CON

SBUF2

T2MOD

RCAP2L

RCAP2H

TL2

TH2

TLS_CNTL CSCNTRL CSWAIT

SSR

ACC

PORT4

SCR

MD0

MD1

DDR5

DDR4

MD2

MD3

DACDEB

DDR2

MD4

MD5

ARCON

CONFIG4

DDR3

CONFIG3

CONFIG

DDR1

DDR0

CONFIG2

9397 750 14312

Product data sheet

Rev. 03 — 25 November 2004

13 of 30

xxxxxxxxxxxxxxxxxxxxx xxxxxxxxxxxxxxxxxxxxxxxxxx xxxxxxx x x x xxxxxxxxxxxxxxxxxxxxxxxxxxxxxx xxxxxxxxxxxxxxxxxxx xx xx

xxxxx xxxxxxxxxxxxxxxxxxxxxxxxxxx xxxxxxxxxxxxxxxxxxx xxxxxx xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx xxxxxxxxxxxx x x

xxxxxxxxxxxxxxxxxxxxx xxxxxxxxxxxxxxxxxxxxxxxxxxxxxx xxxxx xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx xxxxxxxx

xxxxxxxxxxxxxxxxxxxxxxxxx xxxxxxxxxxxxxxxxxxxx xxx

Table 6:

External registers and memory space

ADDR

(hex)

0/8

1/9

2/A

3/B

4/C

5/D

6/E

7/F

0000

auxiliary RAM (internal)

05F8

0600

external DRAM (PLUM subpage 1)

BFF8

C000

TIME_KEEPER FOC_STAT

RAD_STAT

MEM_

SLEDGE1_HI

DIST_LO

DIST_HI

MEM_

SLEDGE1_LO

RAD_INT_HI

SPEED_LO

C008

C010

C018

C020

C028

C030

C038

RAD_INT_LO

RAD_OFFSET_ RAD_ERROR_

HI GAIN_MEM_HI

TPI_GAIN_HI

FOCUS_

ERROR_MEM

RAD_ERROR_

MEM

SPEED_HI

FOCUS_INT_HI FOCUS_INT_LO DROP_OUT_

CODE

FOC_PROP_

MEM

FOCUS_PROP_ FOC_INT_GAIN RAMP_MEAN_

MULT

SLEEP_MULT_

MEM

VALUE

RAMP_HEIGHT FE_LEVEL

TIMER

reserved

RAD_PROP_

MULT_MEM

RAD_ERROR_

ACC_MEM

RAD_INT_

GAIN_MEM

SPEED_MULT_

MEM

RAD_OFFSET_L RAD_ERROR_

TPI_GAIN_LO

SP_MEM_LO

STACK5

SP_MEM_HI

SPEED_

SETPOINT

TPI_SIGNAL_

MEM

RAD_CTRL_1_

MEM2

GAIN_MEM_LO

RAD_CTRL_1_ reserved

MEM

RAD_GAIN_

MEM

STACK4

STACK3

STACK2

STACK1

STACK0

OLDCOM

STATE_MULT_

MEM

MEM_

SLEDGE2_LO

MEM_

SLEDGE2_HI

RAMP_INCR

reserved

SLEDGE_

MULT_MEM2

FAST_SPEED

MEM_

reserved

SLEDGE_OUT_ reserved

MEM

reserved

FOCUS_INT_

MEM1

SLEDGE2_LO_

C040

INTERRUPT

REG

reserved

SLEDGE_

PULSE_MEM

reserved

SPEED_

DREMPEL_

MEM

HOLD_MULT_

MEM

XTRA_PRESET

C048

C050

C058

C060

reserved

SLEDGE_

LONG_BRAKE

reserved

SLEDGE_

POWER_MEM

RAD_MEM_

PART1

SLEDGE_

FOCUS_INJECT RADIAL_INJECT DET_PHASE

AGCFREQ

INJECTLEVEL1 INJECTLEVEL2 OSC

PULSE_HEIGHT

AGCGAINMEM AGCGAINLO

PCS_STAT START_LO

FOCUS_

OFFSET_AGC

INJECT_LO

LOC_LO

OFFTRACK_HI OFFTRACK_MI OFFTRACK_LO MIRN_MEM

START_HI

LOC_MI

LOC_HI

ACT_FF

PCS_FF_

STROKE

xxxxxxxxxxxxxxxxxxxxx xxxxxxxxxxxxxxxxxxxxxxxxxx xxxxxxx x x x xxxxxxxxxxxxxxxxxxxxxxxxxxxxxx xxxxxxxxxxxxxxxxxxx xx xx

xxxxx xxxxxxxxxxxxxxxxxxxxxxxxxxx xxxxxxxxxxxxxxxxxxx xxxxxx xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx xxxxxxxxxxxx x x

xxxxxxxxxxxxxxxxxxxxx xxxxxxxxxxxxxxxxxxxxxxxxxxxxxx xxxxx xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx xxxxxxxx

xxxxxxxxxxxxxxxxxxxxxxxxx xxxxxxxxxxxxxxxxxxxx xxx

External registers and memory space …continued

Table 6:

ADDR

(hex)

0/8

1/9

2/A

3/B

4/C

5/D

6/E

7/F

C068

C070

C078

PCS_SPEED_

GAIN

SPEED_

SETPOINT_LO

SPEED_

SETPOINT_HI

reserved

PCS_PD

PCS_PD_INT

PCS_PD_

INT_LO

PCS_ACC_

STEP

PCS_ACC_

JUMP

VEL_ROOT_HI

VEL_ROOT_LO PCS_STP_POS PCS_STP_NEG FOCUS_

OFFSET

PROT_STAT

RE_FILTER_

MEM

FE_FILTER_

MEM

RE_DET_LEVEL FE_DET_LEVEL EMFREAD_

MEM

EMF_DAMP_

MEM

RACSWITCH_

MEM

PCS_SEN

C080

reserved

C0A8

C0B0

C0B8

ARC_STAT

ARC_FOC_IN

ARC_RAD_IN

ARC_FOC_OUT ARC_RAD_OUT ARC_FOC_DIFF ARC_RAD_DIFF ARC_ANG

DEFECT

CNTRL1

DEFECT

CNTRL2

DEFECT

CNTRL3

HF_ENVELOPE ALPHA0_DAC

CONTROL_REG CALF_FORMAT CNF_TEST_

VALUE

C0C0

C0C8

C0D0

C0D8

C0E0

C0E8

MIR_FIL_

BLACK_HI

MIR_FIL_

BLACK_LO

MIR_FIL_

WHITE_HI

MIR_FIL_

WHITE_LO

REG_FBK_

BLACK_HI

REG_FBK_

BLACK_LO

REG_FBK_

WHITE_HI

REG_FBK_

WHITE_LO

CALF_PROBE_ CALF_PROBE_ reserved

reserved

TLSLICECNTR

DECAY_RATE

ACTUAL_DIFF

FORCED_DIFF AUX_ADC

PCS_HALL_PH PEAK_PROBE

BOTTOM_

PROBE

PP_TPI_PROBE reserved

PP_TPI_FIL_

PROBE_HI

PP_TPI_FIL_

PROBE_LO

reserved

DEFECT_

COUNTER

DEFECT_

SIGNALS

OPC_STAT

OPC_CTRL1

OPC_CTRL2

OPC_REPEAT

OPC_DELAY

OPC_ADR_

START

OPC_ADR_

STOP

OPC_ALPHA0_

START

OPC_ALHPA0_ OPC_PW_LPF

STEP

OPC_EMFH

OPC_EMFL

OPC_DEL_ACT OPC_TIML

OPC_TIMH

reserved

C0F0

C0F8

C100

DEBUG0

reserved

DEBUG1

reserved

DEBUG2

reserved

DEBUG3

reserved

inaccessible

CFF8

D000

external DRAM (PLUM subpage 2)

DFF8

xxxxxxxxxxxxxxxxxxxxx xxxxxxxxxxxxxxxxxxxxxxxxxx xxxxxxx x x x xxxxxxxxxxxxxxxxxxxxxxxxxxxxxx xxxxxxxxxxxxxxxxxxx xx xx

xxxxx xxxxxxxxxxxxxxxxxxxxxxxxxxx xxxxxxxxxxxxxxxxxxx xxxxxx xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx xxxxxxxxxxxx x x

xxxxxxxxxxxxxxxxxxxxx xxxxxxxxxxxxxxxxxxxxxxxxxxxxxx xxxxx xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx xxxxxxxx

xxxxxxxxxxxxxxxxxxxxxxxxx xxxxxxxxxxxxxxxxxxxx xxx

External registers and memory space …continued

Table 6:

ADDR

(hex)

0/8

1/9

2/A

3/B

4/C

5/D

6/E

7/F

E000

external DRAM (PLUM subseg n)

FCF8

FD00

BUFFERBASE

BUFFERTOP

TAGGED_CNT/

UNTAGGED_CNT/

TAGGED_CNT_UPD

UNTAGGED_CNT_UPD

FD08

FD10

FD18

FD20

ACQ_AUTO_

CTRL

STRMSTRTADDR

NXTXFR_ADDR

STRMSTOPADDR

ACQAUTO_INT

ACQAUTO_

INTEN

ENDXFR_ADDR/REM_CNT

BYTESPER

SECTOR(L)

BYTESPER

SECTOR(H)

TAGSCAN_

MASK

TAGSCAN_

VALUE

MHEAD

ACQMISS_STAT HOST_AUTO_

CTRL

MATHPROC

TAGSCAN_

CNTL

TAGSCAN_

OFFS_H

TAGSCAN_

OFFS_L

MATCHED_

COUNT

reserved

FD28

reserved

FD50

FD58

reserved

DRAM_MODE/

DRAM_FEAT/

DRAM_COLW

reserved

FD60

FD68

FD70

CAM_CMD/

CAM_STAT

CAM_DAT

reserved

FD78

FD80

FD88

reserved

AGCBW

DEFIRA1

AGCTHR_HI

DEFIRA2

AGCTHR_LO

DEFIRA3

AGCTHR_HI2

HIGHPASS

AGC_TIMHI

HF_AMPLITUDE AGC_SET

DEFIRA0

OFFSETCONT

OFFSETDATA

OFFSET

BOUND

OFFSET

SETTING

FD90

FD98

FDA0

SIFCONTROL

OFFSET_LVL

GLUE1

SERIF1

SERIF2

SERIF3

HF_DETECT1

DECSTATUS3

DC_CONTROL

HF_DETECT2

HF_DETECT5

DC_VALUE

HF_DETECT3

HF_DETECT6

D1_OFFSET

AGCDAC_DIV

OFFSETBW

D2_OFFSET

HFMAX_PEAK

HFMIN_PEAK

PORTAMODE

HF_DETECT4

reserved

PORTADATA/

PORTAREAD

xxxxxxxxxxxxxxxxxxxxx xxxxxxxxxxxxxxxxxxxxxxxxxx xxxxxxx x x x xxxxxxxxxxxxxxxxxxxxxxxxxxxxxx xxxxxxxxxxxxxxxxxxx xx xx

xxxxx xxxxxxxxxxxxxxxxxxxxxxxxxxx xxxxxxxxxxxxxxxxxxx xxxxxx xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx xxxxxxxxxxxx x x

xxxxxxxxxxxxxxxxxxxxx xxxxxxxxxxxxxxxxxxxxxxxxxxxxxx xxxxx xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx xxxxxxxx

xxxxxxxxxxxxxxxxxxxxxxxxx xxxxxxxxxxxxxxxxxxxx xxx

External registers and memory space …continued

Table 6:

ADDR

(hex)

0/8

1/9

2/A

3/B

4/C

5/D

6/E

7/F

FDA8

D3_OFFSET

D4_OFFSET

S1_OFFSET

S2_OFFSET

DEMOD_

DCOD_

ENVELOPE_

CONTROL

CLIPLEVEL_LE GAIN_LE

CONTROL

FDB0

SWITCH_LE

reserved

LAST_GOOD_

HEADER

CONTROL_AD_ LAST_GOOD_

reserved

STORAGE

ADDRESS

FDB8

FFC0

CHPLL_LOCK/

PLL_FREQ_R

CHPLL_SET/

CHPLL_ASYM

CHPLL_FREQ/

CHPLL_JIT

CHPLL_EQU/

CHPLL_LOCK_ MEAS/

CHPLL_F_

OUTPUT1

reserved

OUTPUT3

MOTOR4

CHPLL_AVG_

JIT

FFC8

FFD0

CLOCKPRE2

MOTOR5

SEMA2

MEAS_OUT_

EN/AGC_GAIN

INT_EN/

INT_STAT

MOTOR1/

SLICE1

MOTOR2/

EYE_OPEN

MOTOR3/

TACHO4

MOTOR6

TACHO3

CLOCKPRE1/

SUB_C_STAT

DECOMODE/

SUB_C_DATA

HFPLLMINMAX/ ANASET/

SUB_C_END

VITSET/

BCASTAT

TACHO1/

BCADATA

FIFOFILL

FFD8

FFE0

FFE8

TACHO2

reserved

BCASET

SRESET

CHPLL_SET_2

MOTOR7

reserved

ANASET2

HFDEFECT

STATUS

reserved

HFDEFECT

DATA

HFDEFECT

DATAEND

FFF0

FFF8

reserved

C1BLER

C2BLER

reserved

SAA7818HL

Philips Semiconductors

DVD and CD playback IC

8. Limiting values

Table 7:

Limiting values

In accordance with the Absolute Maximum Rating System (IEC 60134).

Symbol Parameter

Conditions

Min

Max

Unit

[1] [2]

[2]

V_DDD(P)digital supply voltage for the

−0.5

+4.0

pad cells (3 V)

V_DDD(C)

digital supply voltage for the

core (1.8 V)

1.65

1.95

+4.0

[2]

[3]

V_DDA

V_I(max)

V_O

analog supply voltage

−0.5

input voltage on any input

output voltage on any output

output current continuous

V_DD+ 0.5 V

+6.5

I_O

I_IK

DC input diode current

continuous

T_stg

storage temperature

−55

+125

+2000

+200

°C

[4]

[5]

V_esd

electrostatic discharge

voltage

human body model

machine model

−1000

−200

[1] All pad supply connections V_DDD(P)must be made externally to the same power supply.

[2] All V_SSpins must be connected to the same external voltage.

[3] When digital inputs are connected to V_DDD(P)at 3.3 V, the digital inputs are tolerant to the application of 5 V.

[4] Equivalent to discharging a 100 pF capacitor via a 1.5 kΩ series resistor with a rise time of 15 ns.

[5] Equivalent to discharging a 200 pF capacitor via a 2.5 µH series inductor.

9. Characteristics

Table 8:

Supplies

V_DDD(P)= 3.0 V to 3.6 V; V_DDD(C)= 1.65 V to 1.95 V; V_DDA= 3.0 V to 3.6 V; V_SS= 0 V; T_amb= −40 °C to +85 °C; unless

otherwise speciﬁed.

Symbol

Parameter

Conditions

Min

Typ

Max

Unit

V_DDD(C)

digital supply voltage for

the core

1.65

1.8

1.95

V_DDD(P)

digital supply voltage for

the pad cells

3.0

3.3

3.6

V_DDA

analog supply voltage

3.0

3.3

3.6

I_DDD(C)

digital supply current for V_DDD(C)= 1.8 V

the core

I_DDD(P)

I_DDA

digital supply current for V_DDD(P)= 3.3 V

the pad cells

135

analog supply current

V_DDA= 3.3 V

9397 750 14312

Product data sheet

Rev. 03 — 25 November 2004

18 of 30

SAA7818HL

Philips Semiconductors

DVD and CD playback IC

Table 9:

Analog blocks

V_DDD(P)= 3.3 V; V_DDD(C)= 1.8 V; V_DDA= 3.3 V V_SS= 0 V; T_amb= +25 °C; unless otherwise speciﬁed.

Symbol

Pin: IREF

V_IREF

Parameter

Conditions

Min

Typ

Max

Unit

reference voltage on pin IREF

1.16

1.26

1.36

R_IREF

external resistor on pin IREF

kΩ

(±1 %)

I_IREF

output current from pin IREF

µA

Pin: VCOM

V_VCOM

common mode reference

voltage

1.08

1.2

1.32

Z_o

output impedance

Ω

C_ext

external capacitor on pin

VCOM

Pins: HFIN_DN and HFIN_DP

f_clk

clock sample rate

100

MHz

recovered bandwidth

effective number of bits

1/3 Nyquist

46.6

ENOB

V_i(dif)(p-p)

at 100 MHz

differential input signal

(peak-to-peak value)

0 dB; depends on V_DDA

2.0

3.3

× V

------

DDA

V_dif(offset)

V_cm(offset)

V_ADC(offset)

C_i(stat)

differential offset voltage

common mode offset voltage

ADC offset voltage

V_{HFIN_DP}to V_{HFIN_DN}

−100

+100

−200

+100

−60

+60

static input capacitance

input to ground

input to input

∞

R_i

input resistance

group delay

kΩ

t_d(g)

100

Pin: HFIN_SE

f_clk

clock sample rate

100

MHz

recovered bandwidth

AGC gain range

32 steps

−2.1

+11.4

−35

THD

total harmonic distortion

f_sig= 25 MHz;

at V_dif= 1.4 V (p-p)

S/N

signal-to-noise and distortion

of AGC

V_i(se)(p-p)

single-ended input signal

(peak-to-peak value)

0 dB; depends on V_DDA1

input to ground

1.4

× V

------

DDA

3.3

C_i(stat)

R_i

static input capacitance

input resistance

kΩ

8.6

t_d(g)

group delay ﬂatness

0 MHz to 35 MHz

600

Pins: D1, D2_TLN, D3_REN, D4_FEN, S1_MIRN and S2

[1]

I_IO(max)

V_i

maximum input/output current selectable via gain

µA

input voltage

V_VRIN

G_tol

gain tolerance

−20

+20

9397 750 14312

Product data sheet

Rev. 03 — 25 November 2004

19 of 30

SAA7818HL

Philips Semiconductors

DVD and CD playback IC

Table 9:

Analog blocks …continued

V_DDD(P)= 3.3 V; V_DDD(C)= 1.8 V; V_DDA= 3.3 V V_SS= 0 V; T_amb= +25 °C; unless otherwise speciﬁed.

Symbol

Parameter

Conditions

Min

Typ

Max

Unit

∆G

variation of gain between

channels

pins D1 to D2_TLN and

D3_REN to D4_FEN

−4.5

+4.5

pins S1_MIRN to S2

−6

C_pcb(max)

maximum parasitic

capacitance connected to input

f_clk

sample rate

8.4672

MHz

kHz

recovered bandwidth

(THD+N)/S

total harmonic

I_sinkor I_source= 6 µA

−40

distortion-plus-noise to signal

ratio

dynamic range

_sinkor I_source= 6 µA

Pin: VRIN

V_o(VRIN)

output driving voltage on pin

VRIN

1.0

1.2

0.5V_DDA2+ V

0.1

V_i(VRIN)

input voltage on pin VRIN

0.5V_DDA2+ V

0.1

Pin: FTCH

V_FTC(offset)

V_FTC(hys)

V_cm

comparator FTC offset voltage

comparator FTC hysteresis

common mode voltage

clock sample rate

−20

+20

−10

+10

1.67

f_clk

8.4672

MHz

C_i(stat)

R_i

static input capacitance

input resistance

input to ground

100

kΩ

Pins: UOPB and UOPT

V_i(UOPB)input voltage on pin UOPB

V_i(UOPT)input voltage on pin UOPT

Pins: ACT_EMFP and ACT_EMFN

2.6

V_i

input voltage

V_UOPT

V_cm

common mode voltage

gain

[2]

bandwidth

265

100

kHz

kΩ

R_i

input resistance

static input capacitance

120

C_i(stat)

[3]

Pins: SIN_PHI, COS_PHI, XDET and ACT_EMFP

V_i

input voltage

V_UOPT

∆G

gain matching between

channels

−1

R_i

input resistance

∞

kΩ

C_i(stat)

C_i(dyn)

static input capacitance

dynamic input capacitance

9397 750 14312

Product data sheet

Rev. 03 — 25 November 2004

20 of 30

SAA7818HL

Philips Semiconductors

DVD and CD playback IC

Table 9:

Analog blocks …continued

V_DDD(P)= 3.3 V; V_DDD(C)= 1.8 V; V_DDA= 3.3 V V_SS= 0 V; T_amb= +25 °C; unless otherwise speciﬁed.

Symbol

f_clk

Parameter

Conditions

Min

Typ

1.05

Max

Unit

MHz

kHz

sample rate

recovered bandwidth

effective number of bits

output code for minimum

ENOB

at 1.05 MHz

7.2

CODE_min(Vin)

_UOPBinput

CODE_max(Vin)output code for maximum

_UOPTinput

251

253

255

Pin: ALPHA0

f_clk

V_o

C_L

R_L

sample rate

1.05

MHz

output voltage

load capacitance

load resistance

V_UOPT

kΩ

Clock multipliers

f_ref

reference frequency

8.4672 17

MHz

MULT

f_out

multiplication ratios

203.2128 MHz

valid output frequencies

clock jitter (RMS value)

settling time of clock

42.336

J_clk(rms)

t_set

150

µs

[1] Clips at maximum gain setting; input can handle 2 × the maximum signal amplitude.

[2] Gain depends on application components.

[3] Operating in bypass mode.

Table 10: Digital blocks

V_DDD(P)= 3.0 V to 3.6 V; V_DDD(C)= 1.65 V to 1.95 V; V_DDA= 3.0 V to 3.6 V; V_SS= 0 V; T_amb= −40 °C to +85 °C; unless

otherwise speciﬁed.

Symbol

Parameter

Conditions

Min

Typ

Max

Unit

Digital inputs: PORE_NEG, HRESET and BCA (Schmitt-trigger inputs); TTL input with hysteresis

V_th(r)

V_th(f)

V_hys

C_i

switching threshold rising

switching threshold falling

hysteresis voltage

1.4

0.9

0.4

1.9

1.45

0.7

input capacitance

Digital inputs designated by ‘T’; TTL input

V_IL

V_IH

I_LI

LOW-level input voltage

HIGH-level input voltage

input leakage current

input capacitance

0.8

2.0

−10

[1]

V_i= 0 − V_DDD(P)

+10

µA

C_i

Digital outputs designated by ‘L’ (CMOS levels)

V_OL

V_OH

C_L

LOW-level output voltage

HIGH-level output voltage

load capacitance

I_OL= 2 mA

0.4

I_OH= −2 mA

0.85V_DDD(P)

9397 750 14312

Product data sheet

Rev. 03 — 25 November 2004

21 of 30

SAA7818HL

Philips Semiconductors

DVD and CD playback IC

Table 10: Digital blocks …continued

V_DDD(P)= 3.0 V to 3.6 V; V_DDD(C)= 1.65 V to 1.95 V; V_DDA= 3.0 V to 3.6 V; V_SS= 0 V; T_amb= −40 °C to +85 °C; unless

otherwise speciﬁed.

Symbol

Parameter

Conditions

Min

Typ

Max

Unit

t_o(r)

output rise time

20 % to 80 % levels;

C_L= 10 pF

1.0

t_o(f)

output fall time

80 % to 20 % levels;

C_L= 10 pF

1.0

Digital outputs designated by ‘M’ (CMOS levels)

V_OL

V_OH

C_L

LOW-level output voltage

HIGH-level output voltage

load capacitance

I_OL= 4 mA

0.4

I_OH= −4 mA

0.85V_DDD(P)

t_o(r)

output rise time

20 % to 80 % levels;

C_L= 10 pF

0.9

t_o(f)

I_LO

output fall time

80 % to 20 % levels;

C_L= 10 pF

0.9

3-state leakage current

V_i= 0 to V_DDD(P)

−10

+10

µA

Digital outputs designated by ‘H’ (CMOS levels)

V_OL

V_OH

C_L

LOW-level output voltage

HIGH-level output voltage

load capacitance

I_OL= 6 mA

0.4

I_OH= −6 mA

0.85V_DDD(P)

t_o(r)

output rise time

20 % to 80 % levels;

C_L= 10 pF

0.8

t_o(f)

I_LO

output fall time

80 % to 20 % levels;

C_L= 10 pF

0.8

3-state leakage current

V_i= 0 to V_DDD(P)

−10

+10

µA

Digital outputs designated by ‘AL’ (ATA data bus levels)

V_OL

V_OH

C_L

LOW-level output voltage

HIGH-level output voltage

load capacitance

I_OL= 4 mA

0.5

I_OH= −4 mA

0.9V_DDD(P)

100

t_o(r)

output rise time

0.5 V to 0.9V_DDD(P)

;

C_L= 100 pF

t_o(f)

output fall time

0.9V_DDD(P)to 0.5 V;

C_L= 100 pF

Digital outputs designated by ‘AH’ (ATA levels)

V_OL

V_OH

C_L

LOW-level output voltage

HIGH-level output voltage

load capacitance

I_OL= 12 mA

0.5

I_OH= −4 mA

0.9V_DDD(P)

100

t_o(r)

output rise time

0.5 V to 0.9V_DDD(P)

;

C_L= 100 pF

t_o(f)

output fall time

0.9V_DDD(P)to 0.5 V;

C_L= 100 pF

Digital input: CRIN (external clock)

V_IL

V_IH

t_IH

LOW-level input voltage

HIGH-level input voltage

input HIGH time

−0.3

2.0

+0.5

V_DDA+ 0.3 V

relative to period

9397 750 14312

Product data sheet

Rev. 03 — 25 November 2004

22 of 30

SAA7818HL

Philips Semiconductors

DVD and CD playback IC

Table 10: Digital blocks …continued

V_DDD(P)= 3.0 V to 3.6 V; V_DDD(C)= 1.65 V to 1.95 V; V_DDA= 3.0 V to 3.6 V; V_SS= 0 V; T_amb= −40 °C to +85 °C; unless

otherwise speciﬁed.

Symbol

Parameter

Conditions

Min

−10

Typ

Max

+10

Unit

µA

I_LI

C_i

input leakage current

input capacitance

Output: CROUT

[2]

f_xtal

g_m

crystal frequency

8.4672

MHz

mA/V

mutual conductance at start-up

feedback capacitance

output capacitance

C_fb

C_o

R_bias

internal bias resistor

200

kΩ

[1] Input leakage does not apply to EAN_WAITN, PSENN_CS and ALE_STB, as these pins have internal pull-up resistors.

[2] It is recommended that the nominal running series resistance of the crystal or ceramic resonator is ≤ 60 Ω.

9397 750 14312

Product data sheet

Rev. 03 — 25 November 2004

23 of 30

SAA7818HL

Philips Semiconductors

DVD and CD playback IC

10. Package outline

LQFP208; plastic low profile quad flat package; 208 leads; body 28 x 28 x 1.4 mm

SOT459-1

105

104

156

157

(A )

w M

detail X

pin 1 index

208

w M

10 mm

scale

DIMENSIONS (mm are the original dimensions)

(1)

UNIT

max.

7^o

0^o

0.15 1.45

0.05 1.35

0.27 0.20 28.1 28.1

0.17 0.09 27.9 27.9

30.15 30.15

29.85 29.85

0.75

0.45

1.43 1.43

1.08 1.08

1.6

0.25

0.12 0.08 0.08

0.5

Note

1. Plastic or metal protrusions of 0.25 mm maximum per side are not included.

REFERENCES

OUTLINE

EUROPEAN

PROJECTION

ISSUE DATE

VERSION

IEC

JEDEC

JEITA

00-02-06

03-02-20

SOT459-1

136E30

MS-026

Fig 3. Package outline LQFP208 (SOT459-1).

9397 750 14312

Product data sheet

Rev. 03 — 25 November 2004

24 of 30

SAA7818HL

Philips Semiconductors

DVD and CD playback IC

11. Soldering

11.1 Introduction to soldering surface mount packages

This text gives a very brief insight to a complex technology. A more in-depth account of

soldering ICs can be found in our Data Handbook IC26; Integrated Circuit Packages

(document order number 9398 652 90011).

There is no soldering method that is ideal for all surface mount IC packages. Wave

soldering can still be used for certain surface mount ICs, but it is not suitable for ﬁne pitch

SMDs. In these situations reﬂow soldering is recommended.

11.2 Reﬂow soldering

Reﬂow soldering requires solder paste (a suspension of ﬁne solder particles, ﬂux and

binding agent) to be applied to the printed-circuit board by screen printing, stencilling or

pressure-syringe dispensing before package placement. Driven by legislation and

environmental forces the worldwide use of lead-free solder pastes is increasing.

Several methods exist for reﬂowing; for example, convection or convection/infrared

heating in a conveyor type oven. Throughput times (preheating, soldering and cooling)

vary between 100 seconds and 200 seconds depending on heating method.

Typical reﬂow peak temperatures range from 215 °C to 270 °C depending on solder paste

material. The top-surface temperature of the packages should preferably be kept:

• below 225 °C (SnPb process) or below 245 °C (Pb-free process)

– for all BGA, HTSSON..T and SSOP..T packages

– for packages with a thickness ≥ 2.5 mm

– for packages with a thickness < 2.5 mm and a volume ≥ 350 mm³so called

thick/large packages.

• below 240 °C (SnPb process) or below 260 °C (Pb-free process) for packages with a

thickness < 2.5 mm and a volume < 350 mm³so called small/thin packages.

Moisture sensitivity precautions, as indicated on packing, must be respected at all times.

11.3 Wave soldering

Conventional single wave soldering is not recommended for surface mount devices

(SMDs) or printed-circuit boards with a high component density, as solder bridging and

non-wetting can present major problems.

To overcome these problems the double-wave soldering method was speciﬁcally

developed.

If wave soldering is used the following conditions must be observed for optimal results:

• Use a double-wave soldering method comprising a turbulent wave with high upward

pressure followed by a smooth laminar wave.

• For packages with leads on two sides and a pitch (e):

– larger than or equal to 1.27 mm, the footprint longitudinal axis is preferred to be

parallel to the transport direction of the printed-circuit board;

9397 750 14312

Product data sheet

Rev. 03 — 25 November 2004

25 of 30

SAA7818HL

Philips Semiconductors

DVD and CD playback IC

– smaller than 1.27 mm, the footprint longitudinal axis must be parallel to the

transport direction of the printed-circuit board.

The footprint must incorporate solder thieves at the downstream end.

• For packages with leads on four sides, the footprint must be placed at a 45° angle to

the transport direction of the printed-circuit board. The footprint must incorporate

solder thieves downstream and at the side corners.

During placement and before soldering, the package must be ﬁxed with a droplet of

adhesive. The adhesive can be applied by screen printing, pin transfer or syringe

dispensing. The package can be soldered after the adhesive is cured.

Typical dwell time of the leads in the wave ranges from 3 seconds to 4 seconds at 250 °C

or 265 °C, depending on solder material applied, SnPb or Pb-free respectively.

A mildly-activated ﬂux will eliminate the need for removal of corrosive residues in most

applications.

11.4 Manual soldering

Fix the component by ﬁrst soldering two diagonally-opposite end leads. Use a low voltage

(24 V or less) soldering iron applied to the ﬂat part of the lead. Contact time must be

limited to 10 seconds at up to 300 °C.

When using a dedicated tool, all other leads can be soldered in one operation within

2 seconds to 5 seconds between 270 °C and 320 °C.

11.5 Package related soldering information

Table 11: Suitability of surface mount IC packages for wave and reﬂow soldering methods

Package ^[1]

Soldering method

Wave

Reﬂow^[2]

BGA, HTSSON..T^[3], LBGA, LFBGA, SQFP,

SSOP..T^[3], TFBGA, VFBGA, XSON

not suitable

suitable

DHVQFN, HBCC, HBGA, HLQFP, HSO, HSOP,

HSQFP, HSSON, HTQFP, HTSSOP, HVQFN,

HVSON, SMS

not suitable^[4]

suitable

PLCC^[5], SO, SOJ

suitable

LQFP, QFP, TQFP

not recommended^{[5] [6]}

not recommended^[7]

not suitable

suitable

SSOP, TSSOP, VSO, VSSOP

CWQCCN..L^[8], PMFP^[9], WQCCN..L^[8]

suitable

not suitable

[1] For more detailed information on the BGA packages refer to the (LF)BGA Application Note (AN01026);

order a copy from your Philips Semiconductors sales ofﬁce.

[2] All surface mount (SMD) packages are moisture sensitive. Depending upon the moisture content, the

maximum temperature (with respect to time) and body size of the package, there is a risk that internal or

external package cracks may occur due to vaporization of the moisture in them (the so called popcorn

effect). For details, refer to the Drypack information in the Data Handbook IC26; Integrated Circuit

Packages; Section: Packing Methods.

[3] These transparent plastic packages are extremely sensitive to reﬂow soldering conditions and must on no

account be processed through more than one soldering cycle or subjected to infrared reﬂow soldering with

peak temperature exceeding 217 °C ± 10 °C measured in the atmosphere of the reﬂow oven. The package

body peak temperature must be kept as low as possible.

9397 750 14312

Product data sheet

Rev. 03 — 25 November 2004

26 of 30

SAA7818HL

Philips Semiconductors

DVD and CD playback IC

[4] These packages are not suitable for wave soldering. On versions with the heatsink on the bottom side, the

solder cannot penetrate between the printed-circuit board and the heatsink. On versions with the heatsink

on the top side, the solder might be deposited on the heatsink surface.

[5] If wave soldering is considered, then the package must be placed at a 45° angle to the solder wave

direction. The package footprint must incorporate solder thieves downstream and at the side corners.

[6] Wave soldering is suitable for LQFP, QFP and TQFP packages with a pitch (e) larger than 0.8 mm; it is

deﬁnitely not suitable for packages with a pitch (e) equal to or smaller than 0.65 mm.

[7] Wave soldering is suitable for SSOP, TSSOP, VSO and VSSOP packages with a pitch (e) equal to or larger

than 0.65 mm; it is deﬁnitely not suitable for packages with a pitch (e) equal to or smaller than 0.5 mm.

[8] Image sensor packages in principle should not be soldered. They are mounted in sockets or delivered

pre-mounted on ﬂex foil. However, the image sensor package can be mounted by the client on a ﬂex foil by

using a hot bar soldering process. The appropriate soldering proﬁle can be provided on request.

[9] Hot bar soldering or manual soldering is suitable for PMFP packages.

9397 750 14312

Product data sheet

Rev. 03 — 25 November 2004

27 of 30

SAA7818HL

Philips Semiconductors

DVD and CD playback IC

12. Revision history

Table 12: Revision history

Document ID

SAA7818HL_3

Modiﬁcations:

SAA7818HL_2

SAA7818HL_1

Release date Data sheet status

20041125 Product data sheet

• Table 7: Table note 3; V_DDD(C)changed into V_DDD(P)

Change notice Doc. number

Supersedes

9397 750 14312 SAA7818HL_2

20041025

Product data sheet

9397 750 14026 SAA7818HL_1

20030923

Product speciﬁcation

9397 750 11111

9397 750 14312

Product data sheet

Rev. 03 — 25 November 2004

28 of 30

SAA7818HL

Philips Semiconductors

DVD and CD playback IC

13. Data sheet status

Level Data sheet status^[1]Product status^{[2] [3]}

Deﬁnition

Objective data

Development

This data sheet contains data from the objective speciﬁcation for product development. Philips

Semiconductors reserves the right to change the speciﬁcation in any manner without notice.

Preliminary data

Qualiﬁcation

This data sheet contains data from the preliminary speciﬁcation. Supplementary data will be published

at a later date. Philips Semiconductors reserves the right to change the speciﬁcation without notice, in

order to improve the design and supply the best possible product.

III

Product data

Production

This data sheet contains data from the product speciﬁcation. Philips Semiconductors reserves the

right to make changes at any time in order to improve the design, manufacturing and supply. Relevant

changes will be communicated via a Customer Product/Process Change Notiﬁcation (CPCN).

[1]

[2]

Please consult the most recently issued data sheet before initiating or completing a design.

The product status of the device(s) described in this data sheet may have changed since this data sheet was published. The latest information is available on the Internet at

URL http://www.semiconductors.philips.com.

[3]

For data sheets describing multiple type numbers, the highest-level product status determines the data sheet status.

performance. When the product is in full production (status ‘Production’),

14. Deﬁnitions

relevant changes will be communicated via a Customer Product/Process

Change Notiﬁcation (CPCN). Philips Semiconductors assumes no

responsibility or liability for the use of any of these products, conveys no

license or title under any patent, copyright, or mask work right to these

products, and makes no representations or warranties that these products are

free from patent, copyright, or mask work right infringement, unless otherwise

speciﬁed.

Short-form speciﬁcation — The data in a short-form speciﬁcation is

extracted from a full data sheet with the same type number and title. For

detailed information see the relevant data sheet or data handbook.

Limiting values deﬁnition — Limiting values given are in accordance with

the Absolute Maximum Rating System (IEC 60134). Stress above one or

more of the limiting values may cause permanent damage to the device.

These are stress ratings only and operation of the device at these or at any

other conditions above those given in the Characteristics sections of the

speciﬁcation is not implied. Exposure to limiting values for extended periods

may affect device reliability.

ICs with CD functionality — Purchase of a Philips IC with CD functionality

does not convey an implied license under any patent right to use this IC in

any CD application. A license needs to be obtained via Philips Intellectual

Property & Standards (www.ip.philips.com), e-mail:

info.licensing@philips.com.

ICs with DVD functionality — Purchase of a Philips IC with DVD

functionality does not convey an implied license under any patent right to use

this IC in any DVD application. A license needs to be obtained via Philips

Intellectual Property & Standards (www.ip.philips.com), e-mail:

info.licensing@philips.com.

Application information — Applications that are described herein for any

of these products are for illustrative purposes only. Philips Semiconductors

make no representation or warranty that such applications will be suitable for

the speciﬁed use without further testing or modiﬁcation.

15. Disclaimers

16. Licenses

Life support — These products are not designed for use in life support

appliances, devices, or systems where malfunction of these products can

reasonably be expected to result in personal injury. Philips Semiconductors

customers using or selling these products for use in such applications do so

at their own risk and agree to fully indemnify Philips Semiconductors for any

damages resulting from such application.

Purchase of Philips I²C-bus components

Purchase of Philips I²C-bus components conveys a

license under the Philips’ I²C-bus patent to use the

components in the I²C-bus system provided the system

conforms to the I²C-bus speciﬁcation deﬁned by

Koninklijke Philips Electronics N.V. This speciﬁcation

can be ordered using the code 9398 393 40011.

Right to make changes — Philips Semiconductors reserves the right to

make changes in the products - including circuits, standard cells, and/or

software - described or contained herein in order to improve design and/or

17. Contact information

For additional information, please visit: http://www.semiconductors.philips.com

For sales ofﬁce addresses, send an email to: sales.addresses@www.semiconductors.philips.com

9397 750 14312

Product data sheet

Rev. 03 — 25 November 2004

29 of 30

SAA7818HL

Philips Semiconductors

DVD and CD playback IC

18. Contents

General description . . . . . . . . . . . . . . . . . . . . . . 1

Features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1

Quick reference data . . . . . . . . . . . . . . . . . . . . . 4

Ordering information. . . . . . . . . . . . . . . . . . . . . 4

Block diagram . . . . . . . . . . . . . . . . . . . . . . . . . . 5

6.1

6.2

Pinning information. . . . . . . . . . . . . . . . . . . . . . 6

Pinning . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6

Pin description . . . . . . . . . . . . . . . . . . . . . . . . . 6

Limiting values. . . . . . . . . . . . . . . . . . . . . . . . . 18

Characteristics. . . . . . . . . . . . . . . . . . . . . . . . . 18

Package outline . . . . . . . . . . . . . . . . . . . . . . . . 24

11.1

Soldering . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25

Introduction to soldering surface mount

packages . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25

Reﬂow soldering . . . . . . . . . . . . . . . . . . . . . . . 25

Wave soldering . . . . . . . . . . . . . . . . . . . . . . . . 25

Manual soldering . . . . . . . . . . . . . . . . . . . . . . 26

Package related soldering information . . . . . . 26

11.2

11.3

11.4

11.5

Revision history. . . . . . . . . . . . . . . . . . . . . . . . 28

Data sheet status . . . . . . . . . . . . . . . . . . . . . . . 29

Deﬁnitions . . . . . . . . . . . . . . . . . . . . . . . . . . . . 29

Disclaimers. . . . . . . . . . . . . . . . . . . . . . . . . . . . 29

Licenses . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 29

Contact information . . . . . . . . . . . . . . . . . . . . 29

All rights are reserved. Reproduction in whole or in part is prohibited without the prior

written consent of the copyright owner. The information presented in this document does

not form part of any quotation or contract, is believed to be accurate and reliable and may

be changed without notice. No liability will be accepted by the publisher for any

consequence of its use. Publication thereof does not convey nor imply any license under

patent- or other industrial or intellectual property rights.

Date of release: 25 November 2004

Document number: 9397 750 14312

Published in The Netherlands

SAA7818HL,557 [NXP]

相关型号：

SAA7824

SAA7824HL

SAA7826

SAA7826HL

SAA7838H

SAA7893

SAA7893HL

SAA8103HL

SAA8103HL

SAA8110G

SAA8110G/C1

SAA8110GBE