SC18IM700IPW [NXP]

Master I-2C - bus controller with UART interface; 主I- 2C - 通过UART接口总线控制器
SC18IM700IPW
型号: SC18IM700IPW
厂家: NXP    NXP
描述:

Master I-2C - bus controller with UART interface
主I- 2C - 通过UART接口总线控制器

总线控制器 微控制器和处理器 外围集成电路 光电二极管 数据传输
文件: 总21页 (文件大小:109K)
中文:  中文翻译
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SC18IM700  
Master I2C-bus controller with UART interface  
Rev. 01 — 28 February 2006  
Product data sheet  
1. General description  
The SC18IM700 is designed to serve as an interface between the standard UART port of  
a microcontroller or microprocessor and the serial I2C-bus; this allows the microcontroller  
or microprocessor to communicate directly with other I2C-bus devices. The SC18IM700  
can operate as an I2C-bus master. The SC18IM700 controls all the I2C-bus specific  
sequences, protocol, arbitration and timing. The host communicates with SC18IM700 with  
ASCII messages protocol; this makes the control sequences from the host to the  
SC18IM700 become very simple.  
2. Features  
UART host interface  
I2C-bus controller  
Eight programmable I/O pins  
High-speed UART: baud rate up to 460.8 kbit/s  
High-speed I2C-bus: 400 kbit/s  
16-byte TXFIFO  
16-byte RXFIFO  
Programmable baud rate generator  
2.3 V and 3.6 V operation  
Sleep mode (power-down)  
UART message format resembles I2C-bus transaction format  
I2C-bus master functions  
Multi-master capability  
5 V tolerance on the input pins  
8 N 1 UART format (8 data bits, no parity bit, 1 stop bit)  
Available in very small TSSOP16 package  
3. Applications  
Enable I2C-bus master support in a system  
I2C-bus instrumentation and control  
Industrial control  
Medical equipment  
Cellular telephones  
Handheld computers  
SC18IM700  
Philips Semiconductors  
Master I2C-bus controller with UART interface  
4. Ordering information  
Table 1:  
Ordering information  
Type number  
Package  
Name  
Description  
Version  
SC18IM700IPW  
TSSOP16  
plastic thin shrink small outline package; 16 leads; SOT403-1  
body width 4.4 mm  
5. Block diagram  
V
V
SS  
DD  
SC18IM700  
RX  
TX  
2
SDA  
SCL  
I C-BUS  
CONTROLLER  
UART  
8
RESET  
GPIO  
GPIOs  
REGISTER  
WAKEUP  
002aab743  
Fig 1. Block diagram of SC18IM700  
SC18IM700_1  
© Koninklijke Philips Electronics N.V. 2006. All rights reserved.  
Product data sheet  
Rev. 01 — 28 February 2006  
2 of 21  
SC18IM700  
Philips Semiconductors  
Master I2C-bus controller with UART interface  
6. Pinning information  
6.1 Pinning  
1
2
3
4
5
6
7
8
16  
15  
14  
13  
12  
11  
10  
9
GPIO0  
GPIO1  
RESET  
GPIO7  
GPIO4  
GPIO5  
V
WAKEUP  
SS  
SC18IM700IPW  
GPIO2  
GPIO3  
SDA  
V
DD  
GPIO6  
TX  
SCL  
RX  
002aab798  
Fig 2. Pin configuration for TSSOP16  
6.2 Pin description  
Table 2:  
Symbol  
Pin description  
Pin  
1
Type  
I/O  
I/O  
I
Description  
GPIO0  
GPIO1  
RESET  
VSS  
programmable I/O pin  
programmable I/O pin  
hardware reset input  
ground  
2
3
4
-
GPIO2  
GPIO3  
SDA  
5
I/O  
I/O  
I/O  
O
programmable I/O pin  
programmable I/O pin  
I2C-bus data pin  
I2C-bus clock output  
RS-232 receive input  
RS-232 transmit input  
programmable I/O pin  
power supply  
6
7
SCL  
8
RX  
9
I
TX  
10  
11  
12  
O
GPIO6  
VDD  
I/O  
-
WAKEUP 13  
I
Wake up SC18IM700 from Power-down mode. Pulling LOW by the  
host to wake up the device. A 1 kresistor must be connected  
between VDD and this pin.  
GPIO5  
GPIO4  
GPIO7  
14  
15  
16  
I/O  
O
programmable I/O pin  
programmable I/O pin  
programmable I/O pin  
O
SC18IM700_1  
© Koninklijke Philips Electronics N.V. 2006. All rights reserved.  
Product data sheet  
Rev. 01 — 28 February 2006  
3 of 21  
SC18IM700  
Philips Semiconductors  
Master I2C-bus controller with UART interface  
7. Functional description  
The SC18IM700 is a bridge between a UART port and I2C-bus. The UART interface  
consists of a full-functional advanced UART. The UART communicates with the host  
through the TX and RX pins. The serial data format is fixed: one start bit, 8 data bits, and  
one stop bit. After reset the baud rate defaults to 9600 bit/s, and can be changed through  
the Baud Rate Generator (BRG) registers.  
After a power-up sequence or a hardware reset, the SC18IM700 will send two continuous  
bytes to the host to indicate a start-up condition. These two bytes are 0x4F and 0x4B;  
‘OK’ in ASCII.  
7.1 UART message format  
The host initiates an I2C-bus data transfer, reads from and writes to SC18IM700 internal  
registers through a series of ASCII commands. Table 3 lists the ASCII commands  
supported by SC18IM700, and also their hexadecimal value representation.  
Unrecognized commands are ignored by the device.  
To prevent the host from handing the SC18IM700 due to an unfinished command  
sequence, the SC18IM700 has a time-out feature. The delay between any two bytes of  
data coming from the host should be less than 655 ms. If this condition is not met, the  
SC18IM700 will time-out and clear the receive buffer. The SC18IM700 then starts to wait  
for the next command from the host.  
Table 3:  
ASCII commands supported by SC18IM700  
ASCII command  
Hex value  
0x53  
Command function  
I2C-bus START  
I2C-bus STOP  
S
P
R
W
I
0x50  
0x52  
read SC18IM700 internal register  
write to SC18IM700 internal register  
read GPIO port  
0x57  
0x49  
O
Z
0x4F  
write to GPIO port  
0x5A  
power down  
7.1.1 Write N bytes to slave device  
The host issues the write command by sending an S character followed by an I2C-bus  
slave device address, the total number of bytes to be sent, and I2C-bus data which begins  
with the first byte (DATA 0) and ends with the last byte (DATA N). The frame is then  
terminated with a P character. Once the host issues this command, the SC18IM700 will  
access the I2C-bus slave device and start sending the I2C-bus data bytes.  
Note that the second byte sent is the I2C-bus device slave address. The least significant  
bit (W) of this byte must be set to 0 to indicate this is an I2C-bus write command.  
SC18IM700_1  
© Koninklijke Philips Electronics N.V. 2006. All rights reserved.  
Product data sheet  
Rev. 01 — 28 February 2006  
4 of 21  
SC18IM700  
Philips Semiconductors  
Master I2C-bus controller with UART interface  
host sends  
S CHAR.  
SLAVE ADR.  
+ W  
NUMBER  
OF BYTES  
DATA 0  
DATA N  
P CHAR.  
002aac048  
Fig 3. Write N bytes to slave device  
7.1.2 Read N byte from slave device  
The host issues the read command by sending an S character followed by an I2C-bus  
slave device address, and the total number of bytes to be read from the addressed  
I2C-bus slave. The frame is then terminated with a P character. Once the host issues this  
command, the SC18IM700 will access the I2C-bus slave device, get the correct number of  
bytes from the addressed I2C-bus slave, and then return the data to the host.  
Note that the second byte sent is the I2C-bus device slave address. The least significant  
bit (R) of this byte must be set to 1 to indicate this is an I2C-bus write command.  
host sends  
SLAVE ADR.  
+ R  
NUMBER  
S CHAR.  
P CHAR.  
002aac049  
OF BYTES  
18IM responds  
DATA 0  
DATA N  
Fig 4. Read N byte from slave device  
7.1.3 Write to 18IM internal register  
The host issues the internal register write command by sending a W character followed by  
the register and data pair. Each register to be written must be followed by the data byte.  
The frame is then terminated with a P character.  
W CHAR.  
REGISTER 0  
DATA 0  
REGISTER N  
DATA N  
P CHAR.  
002aac050  
Fig 5. Write to 18IM internal register  
Remark: Write and read from the internal 18IM register is processed immediately as soon  
as the intended register is determined by 18IM.  
SC18IM700_1  
© Koninklijke Philips Electronics N.V. 2006. All rights reserved.  
Product data sheet  
Rev. 01 — 28 February 2006  
5 of 21  
SC18IM700  
Philips Semiconductors  
Master I2C-bus controller with UART interface  
7.1.4 Read from 18IM internal register  
The host issues the internal register read command by sending an R character followed  
by the registers to be read. The frame is then terminated with a P character.  
Once the command is issued, SC18IM700 will access its internal registers and returns the  
contents of these registers to the host.  
R CHAR.  
REGISTER 0  
REGISTER N  
P CHAR.  
002aac051  
18IM responds  
DATA 0  
DATA N  
Fig 6. Read from 18IM internal register  
7.1.5 Write to GPIO port  
The host issues the output port write command by sending an O character followed by the  
data to be written to the output port. This command enables the host to quickly set any  
GPIO pins programmed as output without having to write to the SC18IM700 internal  
IOState register.  
O CHAR.  
DATA  
P CHAR.  
002aac052  
Fig 7. Write to output port  
7.1.6 Read from GPIO port  
The host issues the input port read command by sending an I character. This command  
enables the host to quickly read any GPIO pins programmed as input without having to  
read the SC18IM700 internal IOState register.  
Once the command is issued, SC18IM700 will read its internal IOState register and  
returns its content to the host.  
I CHAR. P CHAR.  
18IM responds  
DATA  
002aac053  
Fig 8. Read from output port  
7.1.7 Repeated START: read after write  
The SC18IM700 also supports ‘read after write’ command as specified in the Philips’  
I2C-bus specification. This allows a read command to be sent after a write command  
without having to issue a STOP condition between the two commands.  
The host issues a write command as normal, then immediately issues a read command  
without sending a STOP (P) character after the write command.  
SC18IM700_1  
© Koninklijke Philips Electronics N.V. 2006. All rights reserved.  
Product data sheet  
Rev. 01 — 28 February 2006  
6 of 21  
SC18IM700  
Philips Semiconductors  
Master I2C-bus controller with UART interface  
SLAVE ADR.  
+ W  
NUMBER  
DATA 0  
S CHAR.  
OF BYTES  
NUMBER  
OF BYTES  
DATA N  
S CHAR. SLAVE ADR. + R  
P CHAR.  
002aac054  
18IM responds  
DATA 0  
DATA N  
Fig 9. Repeated START: read after write  
7.1.8 Repeated START: write after write  
The SC18IM700 also supports ‘write after write’ command as specified in the Philips’  
I2C-bus specification. This allows a write command to be sent after a write command  
without having to issue a STOP condition between the two commands.  
The host issues a write command as normal, then immediately issues a second write  
command without sending a STOP (P) character after the first write command.  
SLAVE ADR.  
+ W  
NUMBER  
OF BYTES  
S CHAR.  
DATA 0  
NUMBER  
OF BYTES  
DATA N  
S CHAR. SLAVE ADR. + W  
DATA 0  
DATA N  
P CHAR.  
002aac055  
Fig 10. Repeated START: write after write  
7.1.9 Power-down mode  
The SC18IM700 can be placed in a low-power mode. In this mode the internal oscillator is  
stopped and SC18IM700 will no longer respond to the host messages. Enter the  
Power-down mode by sending the power-down character Z (0x5A) followed by the two  
defined bytes, which are 0x5A and followed by 0xA5. If the exact message is not received,  
the device will not enter the power-down state.  
Upon entering the power-down state, SC18IM700 places the WAKEUP pin in a HIGH  
state. To have the device leave the power-down state, the WAKEUP pin should be brought  
LOW. A 1 kresistor must be connected between the WAKEUP pin and VDD  
.
Z CHAR.  
0x5A  
0xA5  
P CHAR.  
002aac056  
Fig 11. Power-down mode  
SC18IM700_1  
© Koninklijke Philips Electronics N.V. 2006. All rights reserved.  
Product data sheet  
Rev. 01 — 28 February 2006  
7 of 21  
SC18IM700  
Philips Semiconductors  
Master I2C-bus controller with UART interface  
8. I2C-bus serial interface  
The I2C-bus uses two wires (SDA and SCL) to transfer information between devices  
connected to the bus, and it has the following features:  
Bidirectional data transfer between masters and slaves  
Multi-master bus (no central master)  
Arbitration between simultaneously transmitting masters without corruption of serial  
data on the bus  
Serial clock synchronization allows devices with different bit rates to communicate via  
one serial bus  
Serial clock synchronization can be used as a handshake mechanism to suspend and  
resume serial transfer.  
A typical I2C-bus configuration is shown in Figure 12. The SC18IM700 device provides a  
byte-oriented I2C-bus interface that supports data transfers up to 400 kHz.  
V
DD  
R
PU  
R
PU  
SDA  
SCL  
2
I C-bus  
2
2
I C-BUS  
DEVICE  
I C-BUS  
SC18IM700  
DEVICE  
002aab801  
Fig 12. I2C-bus configuration  
9. Internal registers available  
9.1 Register summary  
Table 4:  
Internal registers summary  
Register Register  
address  
Bit 7  
Bit 6  
Bit 5  
Bit 4  
Bit 3  
Bit 2  
Bit 1  
Bit 0  
R/W  
General register set  
0x00  
0x01  
0x02  
0x03  
0x04  
0x05  
0x06  
0x07  
0x08  
0x09  
0x0A  
BRG0  
bit 7  
bit 7  
bit 6  
bit 6  
bit 5  
bit 5  
bit 4  
bit 4  
bit 3  
bit 3  
bit 2  
bit 2  
bit 1  
bit 1  
bit 0  
bit 0  
R/W  
R/W  
BRG1  
PortConf1  
PortConf2  
IOState  
reserved  
I2CAdr  
GPIO3.1 GPIO3.0 GPIO2.1 GPIO2.0 GPIO1.1 GPIO1.0 GPIO0.1 GPIO0.0 R/W  
GPIO7.1 GPIO7.0 GPIO6.1 GPIO6.0 GPIO5.1 GPIO5.0 GPIO4.1 GPIO4.0 R/W  
GPIO7  
bit 7  
bit 7  
bit 7  
bit 7  
TO7  
1
GPIO6  
bit 6  
bit 6  
bit 6  
bit 6  
TO6  
1
GPIO5  
bit 5  
bit 5  
bit 5  
bit 5  
TO5  
1
GPIO4  
bit 4  
bit 4  
bit 4  
bit 4  
TO4  
1
GPIO3  
bit 3  
GPIO2  
bit 2  
GPIO1  
bit 1  
GPIO0  
bit 0  
bit 0  
bit 0  
bit 0  
TE  
R/W  
-
bit 3  
bit 2  
bit 1  
R/W  
R/W  
R/W  
R/W  
I2CClkL  
I2CClkH  
I2CTO  
bit 3  
bit 2  
bit 1  
bit 3  
bit 2  
bit 1  
TO3  
TO2  
TO1  
I2CStat  
I2CStat[3] I2CStat[2] I2CStat[1] I2CStat[0] R  
SC18IM700_1  
© Koninklijke Philips Electronics N.V. 2006. All rights reserved.  
Product data sheet  
Rev. 01 — 28 February 2006  
8 of 21  
SC18IM700  
Philips Semiconductors  
Master I2C-bus controller with UART interface  
9.2 Register descriptions  
9.2.1 Baud Rate Generator (BRG)  
The baud rate generator is an 8-bit counter that generates the data rate for the transmitter  
and the receiver. The rate is programmed through the BRG register and the baud rate can  
be calculated as follows:  
7.3728 × 106  
16 + (BRG1, BRG0)  
Baud rate =  
--------------------------------------------------  
Remark: To calculate the baud rate the values in the BRG registers must first be  
converted from hex to decimal.  
Remark: For the new baud rate to take effect, both BRG0 and BRG1 must be written in  
sequence (BRG0, BRG1) with new values. The new baud rate will be in effect once BRG1  
is written.  
9.2.2 Programmable port configuration (PortConf1 and PortConf2)  
GPIO port 0 to port 7 may be configured by software to one of four types. These are:  
quasi-bidirectional, push-pull, open-drain, and input-only. Two bits are used to select the  
desired configuration for each port pin. PortConf1 is used to select the configuration for  
GPIO3 to GPIO0, and PortConf2 is used to select the configuration for GPIO7 to GPIO4.  
A port pin has Schmitt triggered input that also has a glitch suppression circuit.  
Table 5:  
Port configurations  
GPIOx.1  
GPIOx.0  
Port configuration  
0
0
1
1
0
1
0
1
quasi-bidirectional output configuration  
input-only configuration  
push-pull output configuration  
open-drain output configuration  
9.2.2.1 Quasi-bidirectional output configuration  
Quasi-bidirectional output type can be used as both an input and output without the need  
to reconfigure the port. This is possible because when the port outputs a logic HIGH, it is  
weakly driven, allowing an external device to pull the pin LOW. When the pin is driven  
LOW, it is driven strongly and able to sink a fairly large current. These features are  
somewhat similar to an open-drain output except that there are three pull-up transistors in  
the quasi-bidirectional output that serve different purposes.  
The SC18IM700 is a 3 V device, but the pins are 5 V tolerant. In quasi-bidirectional mode,  
if a user applies 5 V on the pin, there will be a current flowing from the pin to VDD, causing  
extra power consumption. Therefore, applying 5 V in quasi-bidirectional mode is  
discouraged.  
A quasi-bidirectional port pin has a Schmitt triggered input that also has a glitch  
suppression circuit.  
SC18IM700_1  
© Koninklijke Philips Electronics N.V. 2006. All rights reserved.  
Product data sheet  
Rev. 01 — 28 February 2006  
9 of 21  
SC18IM700  
Philips Semiconductors  
Master I2C-bus controller with UART interface  
V
DD  
2 SYSTEM  
CLOCK  
CYCLES  
P
P
P
very  
weak  
strong  
weak  
GPIOn  
pin latch data  
V
SS  
input data  
glitch rejection  
002aac076  
Fig 13. Quasi-bidirectional output configuration  
9.2.2.2 Input-only configuration  
The input-only port configuration has no output drivers. It is a Schmitt triggered input that  
also has a glitch suppression circuit.  
input data  
GPIO pin  
002aab884  
glitch rejection  
Fig 14. Input-only configuration  
9.2.2.3 Push-pull output configuration  
The push-pull output configuration has the same pull-down structure as both the  
open-drain and the quasi-bidirectional output modes, but provides a continuous strong  
pull-up when the port latch contains a logic 1. The push-pull mode may be used when  
more source current is needed from a port output. A push-pull port pin has a Schmitt  
triggered input that also has a glitch suppression circuit.  
V
DD  
P
N
strong  
GPIO pin  
pin latch data  
V
SS  
input data  
glitch rejection  
002aab885  
Fig 15. Push-pull output configuration  
SC18IM700_1  
© Koninklijke Philips Electronics N.V. 2006. All rights reserved.  
Product data sheet  
Rev. 01 — 28 February 2006  
10 of 21  
SC18IM700  
Philips Semiconductors  
Master I2C-bus controller with UART interface  
9.2.2.4 Open-drain output configuration  
The open-drain output configuration turns off all pull-ups and only drives the pull-down  
transistor of the port driver when the port latch contains a logic 0. To be used as a logic  
output, a port configured in this manner must have an external pull-up, typically a resistor  
tied to VDD  
.
An open-drain port pin has a Schmitt triggered input that also has a glitch suppression  
circuit.  
GPIO pin  
pin latch data  
V
SS  
input data  
glitch rejection  
002aab883  
Fig 16. Open-drain output configuration  
9.2.3 Programmable I/O pins state register (IOState)  
When read, this register returns the actual state of all I/O pins. When written, each  
register bit will be transferred to the corresponding I/O pin programmed as output.  
Table 6:  
Bit  
IOState - Programmable I/O pins state register (address 0x04h) bit description  
Symbol  
Description  
7:0  
IOLevel  
Set the logic level on the output pins.  
Write to this register:  
logic 0 = set output pin to zero  
logic 1 = set output pin to one  
Read this register returns states of all pins.  
9.2.4 I2C-bus address register (I2CAdr)  
The contents of the register represents the device’s own I2C-bus address. The most  
significant bit corresponds to the first bit received from the I2C-bus after a START  
condition. A logic 1 in I2CAdr corresponds to a HIGH level on the I2C-bus, and a logic 0  
corresponds to a LOW level on the I2C-bus. The least significant bit is not used, but should  
be programmed with a ‘0’.  
I2CAdr is not needed for device operation, but should be configured so that its address  
does not conflict with an I2C-bus device address used by the bus master.  
9.2.5 I2C-bus clock rates (I2CClk)  
This register determines the serial clock frequency. The various serial rates are shown in  
Table 7. The frequency can be determined using the following formula:  
7.3728 × 106  
2 × (I2CClkH + I2CClkL)  
bit frequency =  
---------------------------------------------------------------  
I2CClkH determines the SCL HIGH period, and I2CClkL determines the SCL LOW period.  
SC18IM700_1  
© Koninklijke Philips Electronics N.V. 2006. All rights reserved.  
Product data sheet  
Rev. 01 — 28 February 2006  
11 of 21  
SC18IM700  
Philips Semiconductors  
Master I2C-bus controller with UART interface  
Table 7:  
I2CClk  
I2C-bus clock frequency  
I2C-bus clock frequency  
(I2CClkH + I2CClkL)  
10 (minimum)  
369 kHz  
246 kHz  
147 kHz  
123 kHz  
74 kHz  
15  
25  
30  
50  
60  
100  
61 kHz  
37 kHz  
Remark: The numbers used in the formulas are in decimal, but the numbers to program  
I2CClkH and I2CClkL are in hex.  
9.2.6 I2C-bus time-out (I2CTO)  
The time-out register is used to determine the maximum time that SCL is allowed to be  
LOW before the I2C-bus state machine is reset.  
When the I2C-bus interface is running, I2CTO is loaded after each I2C-bus state transition.  
Table 8:  
I2CTO - I2C-bus time-out register (address 0x09h) bit description  
Bit  
7:1  
0
Symbol  
TO[7:1]  
TE  
Description  
time-out value  
enable/disable time-out function  
logic 0 = disable  
logic 1 = enable  
The least significant bit of I2CTO (TE bit) is used as a time-out enable/disable. A logic 1  
will enable the time-out function. The time-out period can be calculated as follows:  
I2CTO[7:1] × 256  
time-out period =  
seconds  
-------------------------------------------  
57600  
The time-out value may vary, and it is an approximate value.  
9.2.7 I2C-bus status register (I2CStat)  
This register reports the I2C-bus transmit and receive frame status, whether the frame  
transmits correctly or not.  
Table 9:  
Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0 I2C-bus status description  
I2C-bus status  
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
0
0
0
1
0
0
0
0
0
0
1
0
0
1
0
0
I2C_OK  
I2C_NACK_ON_ADDRESS  
I2C_NACK_ON_DATA  
I2C_TIME_OUT  
SC18IM700_1  
© Koninklijke Philips Electronics N.V. 2006. All rights reserved.  
Product data sheet  
Rev. 01 — 28 February 2006  
12 of 21  
SC18IM700  
Philips Semiconductors  
Master I2C-bus controller with UART interface  
10. Limiting values  
Table 10: Limiting values  
In accordance with the Absolute Maximum Rating System (IEC 60134). [1] [2]  
Symbol  
Tamb(bias)  
Tstg  
Parameter  
Conditions  
Min  
55  
65  
0.5  
Max  
Unit  
bias ambient temperature  
storage temperature  
input voltage  
+125 °C  
+150 °C  
VI  
referenced to VSS  
+5.5  
V
IOH(I/O)  
HIGH-level output current  
per input/output pin  
GPIO3 to GPIO7  
all other pins  
-
-
-
20  
8
mA  
mA  
mA  
IOL(I/O)  
LOW-level output current  
per input/output pin  
20  
II/O(tot)(max) maximum total I/O current  
Ptot/pack total power dissipation per package  
-
-
120  
1.5  
mA  
W
[3]  
[1] This product includes circuitry specifically designed for the protection of its internal devices from the  
damaging effects of excessive static charge. Nonetheless, it is suggested that conventional precautions be  
taken to avoid applying greater than the rated maximum.  
[2] Parameters are valid over operating temperature range unless otherwise specified. All voltages are with  
respect to VSS unless otherwise noted.  
[3] Based on package heat transfer, not device power consumption.  
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11. Static characteristics  
Table 11: Static characteristics  
VDD = 2.4 V to 3.6 V; Tamb = 40 °C to +85 °C; unless otherwise specified.  
Symbol  
Parameter  
Conditions  
Min  
Typ [1]  
Max  
Unit  
IDD  
supply current  
VDD = 3.6 V  
Operating mode; f = 7.3728 MHz  
Idle mode; f = 7.3728 MHz  
-
-
-
9
15  
5
mA  
mA  
µA  
3.25  
50  
Power-down mode (sleep);  
GPIO0 to GPIO7 as inputs;  
inputs at VDD  
70  
VPOR  
power-on reset voltage  
-
-
0.2  
-
V
V
Vth(HL)  
negative-going threshold except SCL, SDA  
voltage  
0.22VDD 0.4VDD  
VIL  
LOW-level input voltage SCL, SDA only  
0.5  
-
0.3VDD  
0.7VDD  
V
V
Vth(LH)  
positive-going threshold except SCL, SDA  
voltage  
-
0.6VDD  
VIH  
HIGH-level input voltage SCL, SDA only  
0.7VDD  
-
5.5  
1.0  
0.3  
-
V
V
V
V
[2]  
[2]  
VOL  
LOW-level output  
voltage  
IOL = 20 mA  
IOL = 3.2 mA  
-
0.6  
0.2  
-
-
VOH  
HIGH-level output  
voltage  
IOH = 20 mA; Push-pull mode;  
GPIO3 to GPIO7  
0.8VDD  
IOH = 3.2 mA; Push-pull mode;  
GPIO0 to GPIO2  
V
DD 0.7 VDD 0.4 -  
DD 0.3 VDD 0.2 -  
V
V
IOH = 20 mA; quasi-bidirectional  
V
mode; all GPIOs  
[3]  
[4]  
Cio  
IIL  
input/output capacitance  
-
-
-
-
-
15  
pF  
µA  
µA  
µA  
LOW-level input current logical 0; all ports; VI = 0.4 V  
input leakage current all ports; VI = VIL or VIH  
negative-going transition logical 1-to-0; all ports; VI = 2.0 V  
current at VDD = 3.6 V  
-
80  
[5]  
ILI  
-
10  
[6] [7]  
IT(HL)  
30  
450  
RRESET_N(int) internal pull-up  
resistance on pin  
RESET  
10  
-
30  
kΩ  
[1] Typical ratings are not guaranteed. The values listed are at room temperature, 3 V.  
[2] See Table 10 “Limiting values” for steady state (non-transient) limits on IOL or IOH. If IOL/IOH exceeds the test condition, VOL/VOH may  
exceed the related specification.  
[3] Pin capacitance is characterized but not tested.  
[4] Measured with GPIO in quasi-bidirectional mode.  
[5] Measured with GPIO in high-impedance mode.  
[6] GPIO in quasi-bidirectional mode with weak pull-up (applies to all GPIO pins with pull-ups). Does not apply to open-drain pins.  
[7] GPIO pins source a transition current when used in quasi-bidirectional mode and externally driven from logic 1 to logic 0. This current is  
highest when VI is approximately 2 V.  
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Master I2C-bus controller with UART interface  
12. Dynamic characteristics  
Table 12: I2C-bus timing characteristics  
All the timing limits are valid within the operating supply voltage and ambient temperature range; VDD = 2.4 V to 3.6 V;  
amb = 40 °C to +85 °C; and refer to VIL and VIH with an input voltage of VSS to VDD  
T
.
Symbol  
Parameter  
Conditions  
Standard mode  
I2C-bus  
Fast mode  
I2C-bus  
Unit  
Min  
0
Max  
100  
-
Min  
Max  
fSCL  
tBUF  
SCL clock frequency  
0
400  
-
kHz  
bus free time between a STOP and START  
condition  
4.7  
1.3  
µs  
tHD;STA  
tSU;STA  
tSU;STO  
tHD;DAT  
tVD;ACK  
tVD;DAT  
hold time (repeated) START condition  
set-up time for a repeated START condition  
set-up time for STOP condition  
data hold time  
4.0  
4.7  
4.0  
0
-
-
0.6  
0.6  
0.6  
0
-
-
µs  
µs  
µs  
ns  
µs  
µs  
µs  
ns  
µs  
µs  
µs  
µs  
ns  
-
-
-
-
data valid acknowledge time  
data valid time  
-
0.6  
0.6  
0.6  
-
-
0.6  
0.6  
0.6  
-
LOW-level  
HIGH-level  
-
-
-
-
tSU;DAT  
tLOW  
tHIGH  
tf  
data set-up time  
250  
4.7  
4.0  
-
100  
1.3  
0.6  
-
LOW period of the SCL clock  
HIGH period of the SCL clock  
fall time of both SDA and SCL signals  
rise time of both SDA and SCL signals  
-
-
-
-
0.3  
1
0.3  
0.3  
50  
tr  
-
-
tSP  
pulse width of spikes that must be  
suppressed by the input filter  
-
50  
-
SDA  
t
BUF  
t
t
LOW  
t
t
SU;DAT  
HD;STA  
SP  
t
f
t
r
t
r
t
f
SCL  
t
t
t
SU;STO  
HD;STA  
SU;STA  
t
HIGH  
S
Sr  
P
S
t
HD;DAT  
002aab271  
Fig 17. I2C-bus timing  
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13. Package outline  
TSSOP16: plastic thin shrink small outline package; 16 leads; body width 4.4 mm  
SOT403-1  
D
E
A
X
c
y
H
v
M
A
E
Z
9
16  
Q
(A )  
3
A
2
A
A
1
pin 1 index  
θ
L
p
L
1
8
detail X  
w
M
b
p
e
0
2.5  
5 mm  
scale  
DIMENSIONS (mm are the original dimensions)  
A
(1)  
(2)  
(1)  
UNIT  
A
A
A
b
c
D
E
e
H
L
L
Q
v
w
y
Z
θ
1
2
3
p
E
p
max.  
8o  
0o  
0.15  
0.05  
0.95  
0.80  
0.30  
0.19  
0.2  
0.1  
5.1  
4.9  
4.5  
4.3  
6.6  
6.2  
0.75  
0.50  
0.4  
0.3  
0.40  
0.06  
mm  
1.1  
0.65  
0.25  
1
0.2  
0.13  
0.1  
Notes  
1. Plastic or metal protrusions of 0.15 mm maximum per side are not included.  
2. Plastic interlead protrusions of 0.25 mm maximum per side are not included.  
REFERENCES  
OUTLINE  
EUROPEAN  
PROJECTION  
ISSUE DATE  
VERSION  
IEC  
JEDEC  
JEITA  
99-12-27  
03-02-18  
SOT403-1  
MO-153  
Fig 18. Package outline SOT403-1 (TSSOP16)  
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14. Soldering  
14.1 Introduction to soldering surface mount packages  
This text gives a very brief insight to a complex technology. A more in-depth account of  
soldering ICs can be found in our Data Handbook IC26; Integrated Circuit Packages  
(document order number 9398 652 90011).  
There is no soldering method that is ideal for all surface mount IC packages. Wave  
soldering can still be used for certain surface mount ICs, but it is not suitable for fine pitch  
SMDs. In these situations reflow soldering is recommended.  
14.2 Reflow soldering  
Reflow soldering requires solder paste (a suspension of fine solder particles, flux and  
binding agent) to be applied to the printed-circuit board by screen printing, stencilling or  
pressure-syringe dispensing before package placement. Driven by legislation and  
environmental forces the worldwide use of lead-free solder pastes is increasing.  
Several methods exist for reflowing; for example, convection or convection/infrared  
heating in a conveyor type oven. Throughput times (preheating, soldering and cooling)  
vary between 100 seconds and 200 seconds depending on heating method.  
Typical reflow peak temperatures range from 215 °C to 270 °C depending on solder paste  
material. The top-surface temperature of the packages should preferably be kept:  
below 225 °C (SnPb process) or below 245 °C (Pb-free process)  
for all BGA, HTSSON..T and SSOP..T packages  
for packages with a thickness 2.5 mm  
for packages with a thickness < 2.5 mm and a volume 350 mm3 so called  
thick/large packages.  
below 240 °C (SnPb process) or below 260 °C (Pb-free process) for packages with a  
thickness < 2.5 mm and a volume < 350 mm3 so called small/thin packages.  
Moisture sensitivity precautions, as indicated on packing, must be respected at all times.  
14.3 Wave soldering  
Conventional single wave soldering is not recommended for surface mount devices  
(SMDs) or printed-circuit boards with a high component density, as solder bridging and  
non-wetting can present major problems.  
To overcome these problems the double-wave soldering method was specifically  
developed.  
If wave soldering is used the following conditions must be observed for optimal results:  
Use a double-wave soldering method comprising a turbulent wave with high upward  
pressure followed by a smooth laminar wave.  
For packages with leads on two sides and a pitch (e):  
larger than or equal to 1.27 mm, the footprint longitudinal axis is preferred to be  
parallel to the transport direction of the printed-circuit board;  
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smaller than 1.27 mm, the footprint longitudinal axis must be parallel to the  
transport direction of the printed-circuit board.  
The footprint must incorporate solder thieves at the downstream end.  
For packages with leads on four sides, the footprint must be placed at a 45° angle to  
the transport direction of the printed-circuit board. The footprint must incorporate  
solder thieves downstream and at the side corners.  
During placement and before soldering, the package must be fixed with a droplet of  
adhesive. The adhesive can be applied by screen printing, pin transfer or syringe  
dispensing. The package can be soldered after the adhesive is cured.  
Typical dwell time of the leads in the wave ranges from 3 seconds to 4 seconds at 250 °C  
or 265 °C, depending on solder material applied, SnPb or Pb-free respectively.  
A mildly-activated flux will eliminate the need for removal of corrosive residues in most  
applications.  
14.4 Manual soldering  
Fix the component by first soldering two diagonally-opposite end leads. Use a low voltage  
(24 V or less) soldering iron applied to the flat part of the lead. Contact time must be  
limited to 10 seconds at up to 300 °C.  
When using a dedicated tool, all other leads can be soldered in one operation within  
2 seconds to 5 seconds between 270 °C and 320 °C.  
14.5 Package related soldering information  
Table 13: Suitability of surface mount IC packages for wave and reflow soldering methods  
Package [1]  
Soldering method  
Wave  
Reflow[2]  
BGA, HTSSON..T[3], LBGA, LFBGA, SQFP,  
SSOP..T[3], TFBGA, VFBGA, XSON  
not suitable  
suitable  
DHVQFN, HBCC, HBGA, HLQFP, HSO, HSOP,  
HSQFP, HSSON, HTQFP, HTSSOP, HVQFN,  
HVSON, SMS  
not suitable[4]  
suitable  
PLCC[5], SO, SOJ  
suitable  
suitable  
LQFP, QFP, TQFP  
not recommended[5] [6]  
not recommended[7]  
not suitable  
suitable  
SSOP, TSSOP, VSO, VSSOP  
CWQCCN..L[8], PMFP[9], WQCCN..L[8]  
suitable  
not suitable  
[1] For more detailed information on the BGA packages refer to the (LF)BGA Application Note (AN01026);  
order a copy from your Philips Semiconductors sales office.  
[2] All surface mount (SMD) packages are moisture sensitive. Depending upon the moisture content, the  
maximum temperature (with respect to time) and body size of the package, there is a risk that internal or  
external package cracks may occur due to vaporization of the moisture in them (the so called popcorn  
effect). For details, refer to the Drypack information in the Data Handbook IC26; Integrated Circuit  
Packages; Section: Packing Methods.  
[3] These transparent plastic packages are extremely sensitive to reflow soldering conditions and must on no  
account be processed through more than one soldering cycle or subjected to infrared reflow soldering with  
peak temperature exceeding 217 °C ± 10 °C measured in the atmosphere of the reflow oven. The package  
body peak temperature must be kept as low as possible.  
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[4] These packages are not suitable for wave soldering. On versions with the heatsink on the bottom side, the  
solder cannot penetrate between the printed-circuit board and the heatsink. On versions with the heatsink  
on the top side, the solder might be deposited on the heatsink surface.  
[5] If wave soldering is considered, then the package must be placed at a 45° angle to the solder wave  
direction. The package footprint must incorporate solder thieves downstream and at the side corners.  
[6] Wave soldering is suitable for LQFP, QFP and TQFP packages with a pitch (e) larger than 0.8 mm; it is  
definitely not suitable for packages with a pitch (e) equal to or smaller than 0.65 mm.  
[7] Wave soldering is suitable for SSOP, TSSOP, VSO and VSSOP packages with a pitch (e) equal to or larger  
than 0.65 mm; it is definitely not suitable for packages with a pitch (e) equal to or smaller than 0.5 mm.  
[8] Image sensor packages in principle should not be soldered. They are mounted in sockets or delivered  
pre-mounted on flex foil. However, the image sensor package can be mounted by the client on a flex foil by  
using a hot bar soldering process. The appropriate soldering profile can be provided on request.  
[9] Hot bar soldering or manual soldering is suitable for PMFP packages.  
15. Abbreviations  
Table 14: Abbreviations  
Acronym  
ASCII  
Description  
American Standard Code for Information Interchange  
First In, First Out  
FIFO  
GPIO  
General Purpose Input/Output  
Inter Integrated Circuit bus  
Receive FIFO  
I2C-bus  
RXFIFO  
TXFIFO  
UART  
Transmit FIFO  
Universal Asynchronous Receiver/Transmitter  
16. Revision history  
Table 15: Revision history  
Document ID  
Release date Data sheet status  
20060228 Product data sheet  
Change notice Doc. number  
Supersedes  
SC18IM700_1  
-
-
-
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17. Data sheet status  
Level Data sheet status[1] Product status[2] [3]  
Definition  
I
Objective data  
Development  
This data sheet contains data from the objective specification for product development. Philips  
Semiconductors reserves the right to change the specification in any manner without notice.  
II  
Preliminary data  
Qualification  
This data sheet contains data from the preliminary specification. Supplementary data will be published  
at a later date. Philips Semiconductors reserves the right to change the specification without notice, in  
order to improve the design and supply the best possible product.  
III  
Product data  
Production  
This data sheet contains data from the product specification. Philips Semiconductors reserves the  
right to make changes at any time in order to improve the design, manufacturing and supply. Relevant  
changes will be communicated via a Customer Product/Process Change Notification (CPCN).  
[1]  
[2]  
Please consult the most recently issued data sheet before initiating or completing a design.  
The product status of the device(s) described in this data sheet may have changed since this data sheet was published. The latest information is available on the Internet at  
URL http://www.semiconductors.philips.com.  
[3]  
For data sheets describing multiple type numbers, the highest-level product status determines the data sheet status.  
customers using or selling these products for use in such applications do so  
at their own risk and agree to fully indemnify Philips Semiconductors for any  
damages resulting from such application.  
18. Definitions  
Short-form specification The data in a short-form specification is  
extracted from a full data sheet with the same type number and title. For  
detailed information see the relevant data sheet or data handbook.  
Right to make changes — Philips Semiconductors reserves the right to  
make changes in the products - including circuits, standard cells, and/or  
software - described or contained herein in order to improve design and/or  
performance. When the product is in full production (status ‘Production’),  
relevant changes will be communicated via a Customer Product/Process  
Change Notification (CPCN). Philips Semiconductors assumes no  
responsibility or liability for the use of any of these products, conveys no  
license or title under any patent, copyright, or mask work right to these  
products, and makes no representations or warranties that these products are  
free from patent, copyright, or mask work right infringement, unless otherwise  
specified.  
Limiting values definition Limiting values given are in accordance with  
the Absolute Maximum Rating System (IEC 60134). Stress above one or  
more of the limiting values may cause permanent damage to the device.  
These are stress ratings only and operation of the device at these or at any  
other conditions above those given in the Characteristics sections of the  
specification is not implied. Exposure to limiting values for extended periods  
may affect device reliability.  
Application information Applications that are described herein for any  
of these products are for illustrative purposes only. Philips Semiconductors  
makes no representation or warranty that such applications will be suitable for  
the specified use without further testing or modification.  
20. Trademarks  
Notice — All referenced brands, product names, service names and  
trademarks are the property of their respective owners.  
I2C-bus — logo is a trademark of Koninklijke Philips Electronics N.V.  
19. Disclaimers  
Life support — These products are not designed for use in life support  
appliances, devices, or systems where malfunction of these products can  
reasonably be expected to result in personal injury. Philips Semiconductors  
21. Contact information  
For additional information, please visit: http://www.semiconductors.philips.com  
For sales office addresses, send an email to: sales.addresses@www.semiconductors.philips.com  
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22. Contents  
1
2
3
4
5
General description . . . . . . . . . . . . . . . . . . . . . . 1  
Features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1  
Applications . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1  
Ordering information. . . . . . . . . . . . . . . . . . . . . 2  
Block diagram . . . . . . . . . . . . . . . . . . . . . . . . . . 2  
14.4  
14.5  
Manual soldering . . . . . . . . . . . . . . . . . . . . . . 18  
Package related soldering information. . . . . . 18  
15  
16  
17  
18  
19  
20  
21  
Abbreviations . . . . . . . . . . . . . . . . . . . . . . . . . 19  
Revision history . . . . . . . . . . . . . . . . . . . . . . . 19  
Data sheet status. . . . . . . . . . . . . . . . . . . . . . . 20  
Definitions . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20  
Disclaimers . . . . . . . . . . . . . . . . . . . . . . . . . . . 20  
Trademarks . . . . . . . . . . . . . . . . . . . . . . . . . . . 20  
Contact information . . . . . . . . . . . . . . . . . . . . 20  
6
6.1  
6.2  
Pinning information. . . . . . . . . . . . . . . . . . . . . . 3  
Pinning . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3  
Pin description . . . . . . . . . . . . . . . . . . . . . . . . . 3  
7
7.1  
Functional description . . . . . . . . . . . . . . . . . . . 4  
UART message format . . . . . . . . . . . . . . . . . . . 4  
Write N bytes to slave device . . . . . . . . . . . . . . 4  
Read N byte from slave device. . . . . . . . . . . . . 5  
Write to 18IM internal register . . . . . . . . . . . . . 5  
Read from 18IM internal register . . . . . . . . . . . 6  
Write to GPIO port . . . . . . . . . . . . . . . . . . . . . . 6  
Read from GPIO port . . . . . . . . . . . . . . . . . . . . 6  
Repeated START: read after write . . . . . . . . . . 6  
Repeated START: write after write . . . . . . . . . . 7  
Power-down mode . . . . . . . . . . . . . . . . . . . . . . 7  
7.1.1  
7.1.2  
7.1.3  
7.1.4  
7.1.5  
7.1.6  
7.1.7  
7.1.8  
7.1.9  
8
I2C-bus serial interface . . . . . . . . . . . . . . . . . . . 8  
9
9.1  
9.2  
9.2.1  
9.2.2  
Internal registers available . . . . . . . . . . . . . . . . 8  
Register summary . . . . . . . . . . . . . . . . . . . . . . 8  
Register descriptions . . . . . . . . . . . . . . . . . . . . 9  
Baud Rate Generator (BRG) . . . . . . . . . . . . . . 9  
Programmable port configuration  
(PortConf1 and PortConf2). . . . . . . . . . . . . . . . 9  
Quasi-bidirectional output configuration . . . . . . 9  
Input-only configuration . . . . . . . . . . . . . . . . . 10  
Push-pull output configuration . . . . . . . . . . . . 10  
Open-drain output configuration . . . . . . . . . . . 11  
Programmable I/O pins state register  
9.2.2.1  
9.2.2.2  
9.2.2.3  
9.2.2.4  
9.2.3  
(IOState) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11  
I2C-bus address register (I2CAdr) . . . . . . . . . 11  
I2C-bus clock rates (I2CClk) . . . . . . . . . . . . . . 11  
I2C-bus time-out (I2CTO) . . . . . . . . . . . . . . . . 12  
I2C-bus status register (I2CStat). . . . . . . . . . . 12  
9.2.4  
9.2.5  
9.2.6  
9.2.7  
10  
Limiting values. . . . . . . . . . . . . . . . . . . . . . . . . 13  
Static characteristics. . . . . . . . . . . . . . . . . . . . 14  
Dynamic characteristics . . . . . . . . . . . . . . . . . 15  
Package outline . . . . . . . . . . . . . . . . . . . . . . . . 16  
11  
12  
13  
14  
14.1  
Soldering . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17  
Introduction to soldering surface mount  
packages . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17  
Reflow soldering . . . . . . . . . . . . . . . . . . . . . . . 17  
Wave soldering . . . . . . . . . . . . . . . . . . . . . . . . 17  
14.2  
14.3  
© Koninklijke Philips Electronics N.V. 2006  
All rights are reserved. Reproduction in whole or in part is prohibited without the prior  
written consent of the copyright owner. The information presented in this document does  
not form part of any quotation or contract, is believed to be accurate and reliable and may  
be changed without notice. No liability will be accepted by the publisher for any  
consequence of its use. Publication thereof does not convey nor imply any license under  
patent- or other industrial or intellectual property rights.  
Date of release: 28 February 2006  
Document number: SC18IM700_1  
Published in The Netherlands  

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