SL3S1203_1213 [NXP]

UCODE G2iL and G2iL+; UCODE G2iL和G2iL +的
SL3S1203_1213
型号: SL3S1203_1213
厂家: NXP    NXP
描述:

UCODE G2iL and G2iL+
UCODE G2iL和G2iL +的

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SL3S1203_1213  
UCODE G2iL and G2iL+  
Rev. 3.2 — 9 November 2010  
198732  
Product short data sheet  
PUBLIC  
1. General description  
NXP’s UCODE G2iL series transponder ICs offer leading-edge read range and support  
industry-first features such as a Tag Tamper Alarm, Data Transfer, Digital Switch, and  
advanced privacy-protection modes.  
Very high chip sensitivity (18 dBm) enables longer read ranges with simple, single-port  
antenna designs. When connected to a power supply, the READ as well as the WRITE  
range can be boosted to a sensitivity of 27 dBm. In fashion and retail the UCODE G2iL  
series improve read rates and provide for theft deterrence. In the electronic device  
market, they’re ideally suited for device configuration, activation, production control, and  
PCB tagging. In authentication applications, they protect brands and guard against  
counterfeiting. They can also be used to tag containers, electronic vehicles, airline  
baggage, and more.  
In addition to the EPC specifications the G2iL offers an integrated Product Status Flag  
(PSF) feature and read protection of the memory content.  
On top of the G2iL features the G2iL+ offers an integrated tag tamper alarm, digital switch,  
external supply mode, read range reduction and data transfer mode.  
2. Features and benefits  
2.1 Key features  
„ UHF RFID Gen2 tag chip according EPCglobal v1.2.0 with 128 bit EPC memory  
„ Memory read protection  
„ Integrated Product Status Flag (PSF)  
„ Tag tamper alarm  
„ Digital switch  
„ Data transfer mode  
„ Real Read Range Reduction (Privacy Mode)  
„ External supply mode  
2.1.1 Memory  
„ 128-bit of EPC memory  
„ 64-bit Tag IDentifier (TID) including 32-bit factory locked unique serial number  
„ 32-bit kill password to permanently disable the tag  
„ 32-bit access password to allow a transition into the secured state  
„ Data retention: 20 years  
SL3S1203_1213  
NXP Semiconductors  
UCODE G2iL and G2iL+  
„ Broad international operating frequency: from 840 MHz to 960 MHz  
„ Long read/write ranges due to extremely low power design  
„ Reliable operation of multiple tags due to advanced anti-collision  
„ READ protection  
„ WRITE Lock  
„ Wide specified temperature range: 40 °C up to +85 °C  
2.2 Key benefits  
2.2.1 End user benefit  
„ Prevention of unauthorized memory access through read protection  
„ Indication of tag tampering attempt by use of the tag tamper alarm feature  
„ Electronic device configuration and / or activation by the use of the digital switch / data  
transfer mode  
„ Theft deterrence supported by the PSF feature (PSF alarm or EPC code)  
„ Small label sizes, long read ranges due to high chip sensitivity  
„ Product identification through unalterable extended TID range, including a 32-bit serial  
number  
„ Reliable operation in dense reader and noisy environments through high interference  
suppression  
2.2.2 Antenna design benefits  
„ High sensitivity enables small and cost efficient antenna designs  
„ Low Q-Value eases broad band antenna design for global usage  
2.2.3 Label manufacturer benefit  
„ Consistent performance on different materials due to low Q-factor  
„ Ease of assembly and high assembly yields through large chip input capacitance  
„ Fast first WRITE of the EPC memory for fast label initialization  
2.3 Custom commands  
„ PSF Alarm  
Built-in PSF (Product Status Flag), enables the UHF RFID tag to be used as EAS tag  
(Electronic Article Surveillance) tag without the need for a back-end data base.  
„ Read Protect  
Protects all memory content including CRC16 from unauthorized reading.  
„ ChangeConfig  
Configures the additional features of the chip like external supply mode, tamper alarm,  
digital switch, read range reduction or data transfer.  
The UCODE G2iL is equipped with a number of additional features and custom  
commands. Nevertheless, the chip is designed in a way standard EPCglobal  
READ/WRITE/ACCESS commands can be used to operate the features. No custom  
commands are needed to take advantage of all the features in case of unlocked EPC  
memory.  
SL3S1203_1213_SDS  
All information provided in this document is subject to legal disclaimers.  
© NXP B.V. 2010. All rights reserved.  
Product short data sheet  
PUBLIC  
Rev. 3.2 — 9 November 2010  
198732  
2 of 22  
SL3S1203_1213  
NXP Semiconductors  
UCODE G2iL and G2iL+  
3. Applications  
3.1 Markets  
„ Fashion (Apparel and footwear)  
„ Retail  
„ Electronics  
„ Fast Moving Consumer Goods  
„ Asset management  
„ Electronic Vehicle Identification  
3.2 Applications  
„ Supply chain management  
‹ Item level tagging  
‹ Pallet and case tracking  
„ Container identification  
„ Product authentication  
„ PCB tagging  
„ Cost efficient, low level seals  
„ Wireless firmware download  
„ Wireless product activation  
4. Quick reference data  
Table 1.  
Symbol  
EEPROM characteristics  
Quick reference data  
Parameter  
Conditions  
Min  
Typ  
Max  
Unit  
tret  
retention time  
Tamb 55 °C  
20  
-
-
-
year  
Nendu(W)  
write endurance  
1000  
10000[1]  
cycle  
[1] Tamb 25 °C  
5. Ordering information  
Table 2.  
Ordering information  
Type number  
Package  
Name  
Description  
Version  
SL3S1203FUF  
SL3S1213FUF  
SL3S1203FTB0  
Wafer  
bumped G2iL die on sawn 8” wafer  
bumped G2iL+ die on sawn 8” wafer  
not applicable  
not applicable  
Wafer  
XSON6  
G2iL, plastic extremely thin small outline SOT886F1  
package; no leads; 6 terminals; body 1 x  
1.45 x 0.5 mm  
SL3S1213FTB0  
XSON6  
G2iL+, plastic extremely thin small  
outline package; no leads; 6 terminals;  
body 1 x 1.45 x 0.5 mm  
SOT886F1  
SL3S1203_1213_SDS  
All information provided in this document is subject to legal disclaimers.  
© NXP B.V. 2010. All rights reserved.  
Product short data sheet  
PUBLIC  
Rev. 3.2 — 9 November 2010  
198732  
3 of 22  
SL3S1203_1213  
NXP Semiconductors  
UCODE G2iL and G2iL+  
6. Marking  
Table 3.  
Marking codes  
Type number  
SL3S1203FTB0  
SL3S1213FTB0  
Marking code  
Comment  
Version  
UN  
UQ  
UCODE G2iL  
UCODE G2iL+  
SOT886  
SOT886  
7. Block diagram  
The SL3S12x3 IC consists of three major blocks:  
- Analog Interface  
- Digital Controller  
- EEPROM  
The analog part provides stable supply voltage and demodulates data received from the  
reader for being processed by the digital part. Further, the modulation transistor of the  
analog part transmits data back to the reader.  
The digital section includes the state machines, processes the protocol and handles  
communication with the EEPROM, which contains the EPC and the user data.  
ANALOG  
RF INTERFACE  
DIGITAL CONTROL  
ANTICOLLISION  
EEPROM  
VREG  
PAD  
VDD  
RECT  
DEMOD  
MOD  
READ/WRITE  
CONTROL  
data  
in  
ANTENNA  
ACCESS CONTROL  
MEMORY  
PAD  
data  
out  
R/W  
EEPROM INTERFACE  
CONTROL  
PAD  
PAD  
VDD  
OUT  
I/O  
CONTROL  
RF INTERFACE  
CONTROL  
I/O CONTROL  
SEQUENCER  
CHARGE PUMP  
001aam226  
Fig 1. Block diagram of G2iL IC  
SL3S1203_1213_SDS  
All information provided in this document is subject to legal disclaimers.  
© NXP B.V. 2010. All rights reserved.  
Product short data sheet  
PUBLIC  
Rev. 3.2 — 9 November 2010  
198732  
4 of 22  
SL3S1203_1213  
NXP Semiconductors  
UCODE G2iL and G2iL+  
8. Pinning information  
OUT  
RFN  
SL3S12x3FTB0  
RFP  
n.c.  
1
2
3
6
5
4
VDD  
n.c.  
VDD NXP trademark  
RFP  
RFN  
OUT  
001aan103  
001aam529  
Transparent top view  
Fig 2. Pinning bare die  
Fig 3. Pin configuration for SOT886  
8.1 Pin description  
Table 4.  
Symbol  
OUT  
Pin description bare die  
Description  
output pin  
RFN  
grounded antenna connector  
external supply  
VDD  
RFP  
ungrounded antenna connector  
Table 5.  
Pin description SOT886  
Pin  
1
Symbol  
RFP  
n.c.  
Description  
ungrounded antenna connector  
not connected  
2
3
RFN  
OUT  
n.c.  
grounded antenna connector  
output pin  
4
5
not connected  
6
VDD  
external supply  
SL3S1203_1213_SDS  
All information provided in this document is subject to legal disclaimers.  
© NXP B.V. 2010. All rights reserved.  
Product short data sheet  
PUBLIC  
Rev. 3.2 — 9 November 2010  
198732  
5 of 22  
SL3S1203_1213  
NXP Semiconductors  
UCODE G2iL and G2iL+  
9. Wafer layout  
9.1 Wafer layout  
(1)  
OUT  
Y
RFN  
(5)  
(4)  
(6)  
X
(7)  
VDD  
RFP  
(8)  
(2)  
(3)  
not to scale!  
001aak871  
(1) X-scribe line width: 15 μm  
(2) Y-scribe line width: 15 μm  
(3) Chip step, x-length: 485 μm  
(4) Chip step, y-length: 435 μm  
(5) Bump to bump distance X (OUT - RFN): 383 μm  
(6) Bump to bump distance Y (RFN - RFP): 333 μm  
(7) Distance bump to metal sealring X: 40,3 μm (outer edge - top metal)  
(8) Distance bump to metal sealring Y: 40,3 μm  
Bump size X × Y: 60 μm × 60 μm  
Remark: OUT and VDD are used with G2iL+ only  
Fig 4. G2iL wafer layout  
SL3S1203_1213_SDS  
All information provided in this document is subject to legal disclaimers.  
© NXP B.V. 2010. All rights reserved.  
Product short data sheet  
PUBLIC  
Rev. 3.2 — 9 November 2010  
198732  
6 of 22  
SL3S1203_1213  
NXP Semiconductors  
UCODE G2iL and G2iL+  
10. Mechanical specification  
10.1 Wafer specification  
See Ref. 20 “Data sheet - Delivery type description – General specification for 8” wafer on  
UV-tape with electronic fail die marking, BU-ID document number: 1093**”.  
10.1.1 Wafer  
Table 6.  
Specifications  
Wafer  
Designation  
each wafer is scribed with batch number  
and wafer number  
Diameter  
200 mm (8”)  
Thickness  
75 μm ± 15 μm  
Number of pads  
Pad location  
4
non diagonal/ placed in chip corners  
Distance pad to pad RFN-RFP  
Distance pad to pad OUT-RFN  
Process  
333.0 µm  
383.0 µm  
CMOS 0.14 µm  
25 wafers  
130.000  
Batch size  
Potential good dies per wafer  
Wafer backside  
Material  
Si  
Treatment  
ground and stress release  
Ra max. 0.5 μm, Rt max. 5 μm  
Roughness  
Chip dimensions  
Die size including scribe  
Scribe line width:  
0.485 mm × 0.435 mm = 0.211 mm2  
x-dimension = 15 μm  
y-dimension = 15 μm  
Passivation on front  
Type  
Sandwich structure  
Material  
PE-Nitride (on top)  
Thickness  
1.75 μm total thickness of passivation  
Au bump  
Bump material  
Bump hardness  
Bump shear strength  
Bump height  
> 99.9% pure Au  
35 – 80 HV 0.005  
> 70 MPa  
18 μm  
Bump height uniformity  
within a die  
± 2 μm  
± 3 μm  
± 4 μm  
±1.5 μm  
– within a wafer  
– wafer to wafer  
Bump flatness  
SL3S1203_1213_SDS  
All information provided in this document is subject to legal disclaimers.  
© NXP B.V. 2010. All rights reserved.  
Product short data sheet  
PUBLIC  
Rev. 3.2 — 9 November 2010  
198732  
7 of 22  
SL3S1203_1213  
NXP Semiconductors  
UCODE G2iL and G2iL+  
Table 6.  
Specifications  
Bump size  
60 × 60 μm  
– RFP, RFN  
60 × 60 μm  
± 5 μm  
– OUT, VDD  
Bump size variation  
10.1.2 Fail die identification  
No inkdots are applied to the wafer.  
Electronic wafer mapping (SECS II format) covers the electrical test results and  
additionally the results of mechanical/visual inspection.  
See Ref. 20 “Data sheet - Delivery type description – General specification for 8” wafer on  
UV-tape with electronic fail die marking, BU-ID document number: 1093**”  
10.1.3 Map file distribution  
See Ref. 20 “Data sheet - Delivery type description – General specification for 8” wafer on  
UV-tape with electronic fail die marking, BU-ID document number: 1093**”  
SL3S1203_1213_SDS  
All information provided in this document is subject to legal disclaimers.  
© NXP B.V. 2010. All rights reserved.  
Product short data sheet  
PUBLIC  
Rev. 3.2 — 9 November 2010  
198732  
8 of 22  
SL3S1203_1213  
NXP Semiconductors  
UCODE G2iL and G2iL+  
11. Functional description  
11.1 Air interface standards  
The UCODE G2iL fully supports all parts of the "Specification for RFID Air Interface  
EPCglobal, EPCTM Radio-Frequency Identity Protocols, Class-1 Generation-2 UHF  
RFID, Protocol for Communications at 860 MHz to 960 MHz, Version 1.2.0".  
11.2 Power transfer  
The interrogator provides an RF field that powers the tag, equipped with a UCODE G2iL.  
The antenna transforms the impedance of free space to the chip input impedance in order  
to get the maximum possible power for the G2iL on the tag. The G2iL+ can also be  
supplied externally.  
The RF field, which is oscillating on the operating frequency provided by the interrogator,  
is rectified to provide a smoothed DC voltage to the analog and digital modules of the IC.  
The antenna that is attached to the chip may use a DC connection between the two  
antenna pads. Therefore the G2iL also enables loop antenna design. Possible examples  
of supported antenna structures can be found in the reference antenna design guide.  
11.3 Data transfer  
11.3.1 Reader to tag Link  
An interrogator transmits information to the UCODE G2iL by modulating an UHF RF  
signal. The G2iL receives both information and operating energy from this RF signal. Tags  
are passive, meaning that they receive all of their operating energy from the interrogator's  
RF waveform. In order to further improve the read range the UCODE G2iL can be  
externally supplied as well so the energy to operate the chip does not need to be  
transmitted by the reader.  
An interrogator is using a fixed modulation and data rate for the duration of at least one  
inventory round. It communicates to the G2iL by modulating an RF carrier using DSB-ASK  
with PIE encoding.  
For further details refer to Section 16, Ref. 1. Interrogator-to-tag (R=>T) communications.  
11.3.2 Tag to reader Link  
An interrogator receives information from a G2iL by transmitting an unmodulated RF  
carrier and listening for a backscattered reply. The G2iL backscatters by switching the  
reflection coefficient of its antenna between two states in accordance with the data being  
sent. For further details refer to Section 16, Ref. 1, chapter 6.3.1.3.  
The UCODE G2iL communicates information by backscatter-modulating the amplitude  
and/or phase of the RF carrier. Interrogators shall be capable of demodulating either  
demodulation type.  
The encoding format, selected in response to interrogator commands, is either FM0  
baseband or Miller-modulated subcarrier.  
SL3S1203_1213_SDS  
All information provided in this document is subject to legal disclaimers.  
© NXP B.V. 2010. All rights reserved.  
Product short data sheet  
PUBLIC  
Rev. 3.2 — 9 November 2010  
198732  
9 of 22  
SL3S1203_1213  
NXP Semiconductors  
UCODE G2iL and G2iL+  
11.4 G2iL and G2iL+ differences  
The UCODE G2iL is tailored for application where mainly EPC or TID number space is  
needed. The G2iL+ in addition provides functionality such as tag tamper alarm, external  
supply operation to further boost read/write range (external supply mode), a Privacy mode  
reducing the read range or I/O functionality (data transfer to externally connected devices)  
required.  
The following table provides an overview of G2iL, G2iL+ special features.  
Table 7.  
Overview of G2iL and G2iL+ features  
Features  
G2iL  
G2iL+  
yes  
yes  
yes  
yes  
yes  
yes  
yes  
yes  
Read protection (bankwise)  
PSF (Built-in Product Status Flag)  
Backscatter strength reduction  
Tag tamper alarm  
yes  
yes  
yes  
-
-
-
-
-
Digital switch / Digital input  
External supply mode  
Data transfer  
Real read range reduction  
11.5 Supported commands  
The G2iL supports all mandatory EPCglobal V1.2.0 commands.  
In addition the G2iL supports the following optional commands:  
ACCESS  
The G2iL features the following custom commands described more in detail later:  
ResetReadProtect  
ReadProtect  
ChangeEAS  
EAS_Alarm  
(backward compatible to G2X)  
(backward compatible to G2X)  
(backward compatible to G2X)  
(backward compatible to G2X)  
(new with G2iL)  
ChangeConfig  
11.6 G2iL, G2iL+ memory  
The G2iL, G2iL+ memory is implemented according EPCglobal Class1Gen2 and  
organized in three sections:  
Table 8.  
Name  
G2iL memory sections  
Size  
Bank  
00b  
01b  
01b  
10b  
Reserved memory (32 bit ACCESS and 32 bit KILL password)  
EPC (excluding 16 bit CRC-16 and 16 bit PC)  
G2iL Configuration Word  
64 bit  
128 bit  
16 bit  
64 bit  
TID (including permalocked unique 32 bit serial number)  
The logical address of all memory banks begin at zero (00h).  
SL3S1203_1213_SDS  
All information provided in this document is subject to legal disclaimers.  
© NXP B.V. 2010. All rights reserved.  
Product short data sheet  
PUBLIC  
Rev. 3.2 — 9 November 2010  
198732  
10 of 22  
SL3S1203_1213  
NXP Semiconductors  
UCODE G2iL and G2iL+  
In addition to the three memory banks one configuration word to handle the G2iL specific  
features is available at EPC bank 01 address 200h.  
Memory pages (16 bit words) pre-programmed to zero will not execute an erase cycle  
before writing data to it. This approach accelerates initialization of the chip and enables  
faster programming of the memory.  
12. Limiting values  
Table 9.  
Limiting values[1][2]  
In accordance with the Absolute Maximum Rating System (IEC 60134).  
Voltages are referenced to RFN  
Symbol  
Parameter  
Conditions  
Min  
Max  
Unit  
Bare die and SOT886 limitations  
Tstg  
storage temperature  
ambient temperature  
55  
40  
-
+125  
+85  
± 2  
°C  
°C  
kV  
Tamb  
VESD  
[3]  
electrostatic discharge  
voltage  
Human body  
model  
Pad limitations  
Vi  
input voltage  
absolute limits,  
VDD-OUT pad  
0.5  
0.5  
+2.5  
+0.5  
V
Io  
output current  
input power  
absolute limits  
input/output  
current,VDD-OUT  
pad  
mA  
Pi  
maximum power  
dissipation, RFP  
pad  
-
100  
mW  
[1] Stresses above those listed under Absolute Maximum Ratings may cause permanent damage to the  
device. This is a stress rating only and functional operation of the device at these or any conditions other  
than those described in the Operating Conditions and Electrical Characteristics section of this specification  
is not implied.  
[2] This product includes circuitry specifically designed for the protection of its internal devices from the  
damaging effects of excessive static charge. Nonetheless, it is suggested that conventional precautions be  
taken to avoid applying greater than the rated maxima.  
[3] For ESD measurement, the die chip has been mounted into a CDIP20 package.  
SL3S1203_1213_SDS  
All information provided in this document is subject to legal disclaimers.  
© NXP B.V. 2010. All rights reserved.  
Product short data sheet  
PUBLIC  
Rev. 3.2 — 9 November 2010  
198732  
11 of 22  
SL3S1203_1213  
NXP Semiconductors  
UCODE G2iL and G2iL+  
13. Characteristics  
13.1 UCODE G2iL, G2iL+ bare die characteristics  
Table 10. G2iL, G2iL+ RF interface characteristics (RFN, RFP)  
Symbol  
Parameter  
Conditions  
Min  
Typ  
Max  
Unit  
fi  
input frequency  
840  
-
960  
MHz  
Normal mode - no external supply, read range reduction OFF  
[1][2][7]  
Pi(min)  
Pi(min)  
minimum input power  
minimum input power  
READ sensitivity  
-
-
18  
-
-
dBm  
%
WRITE sensitivity,  
(write range/read  
range - ratio)  
30  
[3]  
[3]  
[3]  
[3]  
[3]  
Ci  
Q
Z
input capacitance  
quality factor  
impedance  
parallel  
-
-
-
-
-
0.77  
9.7  
-
-
pF  
-
915 MHz  
866 MHz  
915 MHz  
953MHz  
25 j237 -  
23 j224 -  
21 j216 -  
Ω
Ω
Ω
External supply mode - VDD pad supplied, read range reduction OFF  
[1][2]  
[2]  
Pi(min)  
minimum input power  
Ext. supplied READ  
Ext. supplied WRITE  
-
-
-
27  
-
-
-
dBm  
dBm  
Ω
27  
[3]  
Z
impedance  
externally supplied,  
915 MHz  
7 j230  
Read range reduction ON - no external supply  
[1][2][4]  
[2][4]  
[3]  
Pi(min)  
minimum input power  
4R on READ  
-
-
-
+12  
-
-
-
dBm  
dBm  
Ω
4R on WRITE  
4R on, 915 MHz  
+12  
Z
impedance  
18 j2  
Modulation resistance  
[5]  
[6]  
R
resistance  
modulation  
resistance, max.  
backscatter = off  
-
-
170  
55  
-
-
Ω
Ω
modulation  
resistance, max.  
backscatter = on  
[1] Power to process a Query command.  
[2] Measured with a 50 Ω source impedance.  
[3] At minimum operating power.  
[4] It has to be assured the reader (system) is capable of providing enough field strength to give +12 dBm at the chip otherwise  
communication with the chip will not be possible.  
[5] Enables tag designs to be within ETSI limits for return link data rates of e.g. 320 kHz/M4.  
[6] Will result in up to 10 dB higher tag backscatter power at high field strength.  
[7] Results in approx. 18.5 dBm tag sensitivity on a 2 dBi gain antenna.  
SL3S1203_1213_SDS  
All information provided in this document is subject to legal disclaimers.  
© NXP B.V. 2010. All rights reserved.  
Product short data sheet  
PUBLIC  
Rev. 3.2 — 9 November 2010  
198732  
12 of 22  
SL3S1203_1213  
NXP Semiconductors  
UCODE G2iL and G2iL+  
Table 11. VDD pin characteristics  
Symbol Parameter  
Conditions  
Min  
Typ  
Max  
Unit  
[1][3][4]  
Minimum supply voltage/current - without assisted EEPROM WRITE  
VDD  
IDD  
input voltage  
minimum voltage  
-
-
-
-
1.8  
7
V
supply current  
minimum current,  
Iout = 0 μA  
μA  
Iout = 100 μA  
-
-
-
110  
μA  
[2][3][4]  
Minimum supply voltage/current - assisted EEPROM READ and WRITE  
VDD  
input voltage  
minimum voltage,  
out = 0 μA  
1.8  
1.85  
V
I
Iout = 100 μA  
-
-
-
-
1.95  
125  
V
IDD  
supply current  
minimum current,  
Iout = 0 μA  
μA  
Iout = 100 μA  
-
-
265  
μA  
[3][5]  
Maximum supply voltage/current  
VDD  
input voltage  
absolute maximum  
voltage  
2.2  
-
-
-
-
V
Ii(max)  
maximum input current  
absolute maximum  
current  
280  
μA  
[1] Activates Digital Output (OUT pin), increases read range (external supplied).  
[2] Activates Digital Output (OUT pin), increases read and write range (external supplied).  
[3] Operating the chip outside the specified voltage range may lead to undefined behaviour.1925.  
[4] Either the voltage or the current needs to be above given values to guarantee specified functionality.  
[5] No proper operation is guaranteed if both, voltage and current, limits are exceeded.  
Table 12. G2iL, G2iL+ VDD and OUT pin characteristics  
Symbol Parameter  
Conditions  
Min  
Typ  
Max  
Unit  
OUT pin characteristics  
VOL  
VOH  
Low-level output voltage  
HIGH-level output voltage  
Isink = 1mA  
-
-
-
100  
-
mV  
V
VDD = 1.8 V; Isource  
1.5  
= 100µA  
VDD/OUT pin characteristics  
[1]  
[2]  
CL  
Vo  
load capacitance  
output voltage  
VDD - OUT pin max.  
-
-
-
-
5
pF  
maximum RF peak  
voltage on VDD-OUT  
pins  
500  
mV  
[3]  
[4]  
[5]  
VDD/OUT pin tamper alarm characteristics  
RL(max)  
RL(min)  
maximum load resistance  
minimum load resistance  
resistance range high  
resistance range low  
-
-
-
<2  
-
MΩ  
MΩ  
>20  
[1] Is the sum of the allowed capacitance of the VDD and OUT pin referenced to RFN.  
[2] Is the maximum allowed RF input voltage coupling to the VDD/OUT pin to guarantee undisturbed chip functionality.  
[3] Resistance between VDD and OUT pin in checked during power up only.  
[4] Resistance range to achieve tamper alarm flag = 1.  
[5] Resistance range to achieve tamper alarm flag = 0:  
SL3S1203_1213_SDS  
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Product short data sheet  
PUBLIC  
Rev. 3.2 — 9 November 2010  
198732  
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For further reading we recommend application note “FAQ UCODE G2iL+“ (Ref. 22)  
describing the output characteristics more in detail. An example schematic is available in  
application note “UCODE G2iL+ Demoboard Manual“ (Ref. 23). The documents are  
available at NXP Document Control or at the website www.nxp.com.  
Table 13. G2iL, G2iL+ memory characteristics  
Symbol  
Parameter  
Conditions  
Min  
Typ  
Max Unit  
EEPROM characteristics  
tret  
retention time  
Tamb 55 °C  
20  
-
-
-
year  
Nendu(W)  
write endurance  
1000 10000[1]  
cycle  
[1] Tamb 25 °C  
13.2 UCODE G2iL, G2iL+ SOT886 characteristics  
Table 14. G2iL, G2iL+ RF interface characteristics (RFN, RFP)  
Symbol  
Parameter  
Conditions  
Min  
Typ  
Max Unit  
Normal mode - no external supply, read range reduction OFF  
[1][2]  
Pi(min)  
minimum input power  
READ  
sensitivity  
-
-
17.6  
-
-
dB  
m
[3]  
Z
impedance  
915 MHz  
21 -j199  
Ω
[1] Power to process a Query command.  
[2] Measured with a 50 Ω source impedance.  
[3] At minimum operating power.  
Remark: For DC and memory characteristics refer to Table 11, Table 12 and Table 13.  
14. Packing information  
14.1 Wafer  
See Ref. 20 “Data sheet - Delivery type description – General specification for 8” wafer on  
UV-tape with electronic fail die marking, BU-ID document number: 1093**”  
14.2 SOT886  
Part orientation T1. For details please refer to  
http://www.standardics.nxp.com/packaging/packing/pdf/sot886.t1.t4.pdf.  
SL3S1203_1213_SDS  
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15. Abbreviations  
Table 15. Abbreviations  
Acronym  
CRC  
Description  
Cyclic Redundancy Check  
Direct Current  
DC  
EAS  
Electronic Article Surveillance  
EEPROM  
EPC  
Electrically Erasable Programmable Read Only Memory  
Electronic Product Code (containing Header, Domain Manager, Object Class  
and Serial Number)  
FM0  
G2  
Bi phase space modulation  
Generation 2  
IC  
Integrated Circuit  
Product Status Flag  
Radio Frequency  
Ultra High Frequency  
Tag IDentifier  
PSF  
RF  
UHF  
TID  
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16. References  
[1] EPCglobal: EPC Radio-Frequency Identity Protocols Class-1 Generation-2 UHF  
RFID Protocol for Communications at 860 MHz – 960 MHz, Version 1.1.0  
(December 17, 2005)  
[2] EPCglobal: EPC Tag Data Standards  
[3] EPCglobal (2004): FMCG RFID Physical Requirements Document (draft)  
[4] EPCglobal (2004): Class-1 Generation-2 UHF RFID Implementation Reference  
(draft)  
[5] European Telecommunications Standards Institute (ETSI), EN 302 208:  
Electromagnetic compatibility and radio spectrum matters (ERM) – Radio-frequency  
identification equipment operating in the band 865 MHz to 868 MHz with power  
levels up to 2 W, Part 1 – Technical characteristics and test methods  
[6] European Telecommunications Standards Institute (ETSI), EN 302 208:  
Electromagnetic compatibility and radio spectrum matters (ERM) – Radio-frequency  
identification equipment operating in the band 865 MHz to 868 MHz with power  
levels up to 2 W, Part 2 – Harmonized EN under article 3.2 of the R&TTE directive  
[7] [CEPT1]: CEPT REC 70-03 Annex 1  
[8] [ETSI1]: ETSI EN 330 220-1, 2  
[9] [ETSI3]: ETSI EN 302 208-1, 2 V<1.1.1> (2004-09-Electromagnetic compatibility  
And Radio spectrum Matters (ERM) Radio Frequency Identification Equipment  
operating in the band 865 - MHz to 868 MHz with power levels up to 2 W Part 1:  
Technical characteristics and test methods.  
[10] [FCC1]: FCC 47 Part 15 Section 247  
[11] ISO/IEC Directives, Part 2: Rules for the structure and drafting of International  
Standards  
[12] ISO/IEC 3309: Information technology – Telecommunications and information  
exchange between systems – High-level data link control (HDLC) procedures –  
Frame structure  
[13] ISO/IEC 15961: Information technology, Automatic identification and data capture –  
Radio frequency identification (RFID) for item management – Data protocol:  
application interface  
[14] ISO/IEC 15962: Information technology, Automatic identification and data capture  
techniques – Radio frequency identification (RFID) for item management – Data  
protocol: data encoding rules and logical memory functions  
[15] ISO/IEC 15963: Information technology — Radio frequency identification for item  
management — Unique identification for RF tags  
[16] ISO/IEC 18000-1: Information technology — Radio frequency identification for item  
management — Part 1: Reference architecture and definition of parameters to be  
standardized  
[17] ISO/IEC 18000-6: Information technology automatic identification and data capture  
techniques — Radio frequency identification for item management air interface —  
Part 6: Parameters for air interface communications at 860–960 MHz  
[18] ISO/IEC 19762: Information technology AIDC techniques – Harmonized vocabulary  
– Part 3: radio-frequency identification (RFID)  
SL3S1203_1213_SDS  
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[19] U.S. Code of Federal Regulations (CFR), Title 47, Chapter I, Part 15:  
Radio-frequency devices, U.S. Federal Communications Commission.  
[20] Data sheet - Delivery type description – General specification for 8” wafer on  
UV-tape with electronic fail die marking, BU-ID document number: 1093**1  
[21] Data sheet - Flip chip strap - FCS2, General packing specification, BU-ID document  
number: 1738**  
[22] Application note - FAQ UCODE G2iL+, BU-ID document number: 1925**  
[23] Application note - UCODE G2iL+ Demoboard Manual, BU-ID document number:  
1915**  
[24] Data sheet - SL3S1203_1213, UCODE G2iL and G2iL+, BU-ID document number:  
1788**  
1. ** ... document version number  
SL3S1203_1213_SDS  
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Product short data sheet  
PUBLIC  
Rev. 3.2 — 9 November 2010  
198732  
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17. Revision history  
Table 16. Revision history  
Document ID  
Release date Data sheet status  
Change notice Supersedes  
- SL3S1203_1213_SDS v.3.1  
SL3S1203_1213_SDS v.3.2 20101109  
Product short data sheet  
Modifications:  
Version SOT886F1 added  
Section 6 “Marking” and Section 14 “Packing information”: added  
SL3S1203_1213_SDS v.3.1 20101006  
Product short data sheet  
-
-
SL3S1203_1213_SDS  
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Product short data sheet  
PUBLIC  
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198732  
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18. Legal information  
18.1 Data sheet status  
Document status[1][2]  
Product status[3]  
Development  
Definition  
Objective [short] data sheet  
This document contains data from the objective specification for product development.  
This document contains data from the preliminary specification.  
This document contains the product specification.  
Preliminary [short] data sheet Qualification  
Product [short] data sheet Production  
[1]  
[2]  
[3]  
Please consult the most recently issued document before initiating or completing a design.  
The term ‘short data sheet’ is explained in section “Definitions”.  
The product status of device(s) described in this document may have changed since this document was published and may differ in case of multiple devices. The latest product status  
information is available on the Internet at URL http://www.nxp.com.  
malfunction of an NXP Semiconductors product can reasonably be expected  
18.2 Definitions  
to result in personal injury, death or severe property or environmental  
damage. NXP Semiconductors accepts no liability for inclusion and/or use of  
NXP Semiconductors products in such equipment or applications and  
therefore such inclusion and/or use is at the customer’s own risk.  
Draft — The document is a draft version only. The content is still under  
internal review and subject to formal approval, which may result in  
modifications or additions. NXP Semiconductors does not give any  
representations or warranties as to the accuracy or completeness of  
information included herein and shall have no liability for the consequences of  
use of such information.  
Applications — Applications that are described herein for any of these  
products are for illustrative purposes only. NXP Semiconductors makes no  
representation or warranty that such applications will be suitable for the  
specified use without further testing or modification.  
Short data sheet — A short data sheet is an extract from a full data sheet  
with the same product type number(s) and title. A short data sheet is intended  
for quick reference only and should not be relied upon to contain detailed and  
full information. For detailed and full information see the relevant full data  
sheet, which is available on request via the local NXP Semiconductors sales  
office. In case of any inconsistency or conflict with the short data sheet, the  
full data sheet shall prevail.  
Customers are responsible for the design and operation of their applications  
and products using NXP Semiconductors products, and NXP Semiconductors  
accepts no liability for any assistance with applications or customer product  
design. It is customer’s sole responsibility to determine whether the NXP  
Semiconductors product is suitable and fit for the customer’s applications and  
products planned, as well as for the planned application and use of  
customer’s third party customer(s). Customers should provide appropriate  
design and operating safeguards to minimize the risks associated with their  
applications and products.  
Product specification — The information and data provided in a Product  
data sheet shall define the specification of the product as agreed between  
NXP Semiconductors and its customer, unless NXP Semiconductors and  
customer have explicitly agreed otherwise in writing. In no event however,  
shall an agreement be valid in which the NXP Semiconductors product is  
deemed to offer functions and qualities beyond those described in the  
Product data sheet.  
NXP Semiconductors does not accept any liability related to any default,  
damage, costs or problem which is based on any weakness or default in the  
customer’s applications or products, or the application or use by customer’s  
third party customer(s). Customer is responsible for doing all necessary  
testing for the customer’s applications and products using NXP  
Semiconductors products in order to avoid a default of the applications and  
the products or of the application or use by customer’s third party  
customer(s). NXP does not accept any liability in this respect.  
18.3 Disclaimers  
Limiting values — Stress above one or more limiting values (as defined in  
the Absolute Maximum Ratings System of IEC 60134) will cause permanent  
damage to the device. Limiting values are stress ratings only and (proper)  
operation of the device at these or any other conditions above those given in  
the Recommended operating conditions section (if present) or the  
Characteristics sections of this document is not warranted. Constant or  
repeated exposure to limiting values will permanently and irreversibly affect  
the quality and reliability of the device.  
Limited warranty and liability — Information in this document is believed to  
be accurate and reliable. However, NXP Semiconductors does not give any  
representations or warranties, expressed or implied, as to the accuracy or  
completeness of such information and shall have no liability for the  
consequences of use of such information.  
In no event shall NXP Semiconductors be liable for any indirect, incidental,  
punitive, special or consequential damages (including - without limitation - lost  
profits, lost savings, business interruption, costs related to the removal or  
replacement of any products or rework charges) whether or not such  
damages are based on tort (including negligence), warranty, breach of  
contract or any other legal theory.  
Terms and conditions of commercial sale — NXP Semiconductors  
products are sold subject to the general terms and conditions of commercial  
sale, as published at http://www.nxp.com/profile/terms, unless otherwise  
agreed in a valid written individual agreement. In case an individual  
agreement is concluded only the terms and conditions of the respective  
agreement shall apply. NXP Semiconductors hereby expressly objects to  
applying the customer’s general terms and conditions with regard to the  
purchase of NXP Semiconductors products by customer.  
Notwithstanding any damages that customer might incur for any reason  
whatsoever, NXP Semiconductors’ aggregate and cumulative liability towards  
customer for the products described herein shall be limited in accordance  
with the Terms and conditions of commercial sale of NXP Semiconductors.  
Right to make changes — NXP Semiconductors reserves the right to make  
changes to information published in this document, including without  
limitation specifications and product descriptions, at any time and without  
notice. This document supersedes and replaces all information supplied prior  
to the publication hereof.  
No offer to sell or license — Nothing in this document may be interpreted or  
construed as an offer to sell products that is open for acceptance or the grant,  
conveyance or implication of any license under any copyrights, patents or  
other industrial or intellectual property rights.  
Export control — This document as well as the item(s) described herein  
may be subject to export control regulations. Export might require a prior  
authorization from national authorities.  
Suitability for use — NXP Semiconductors products are not designed,  
authorized or warranted to be suitable for use in life support, life-critical or  
safety-critical systems or equipment, nor in applications where failure or  
SL3S1203_1213_SDS  
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© NXP B.V. 2010. All rights reserved.  
Product short data sheet  
PUBLIC  
Rev. 3.2 — 9 November 2010  
198732  
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Quick reference data — The Quick reference data is an extract of the  
product data given in the Limiting values and Characteristics sections of this  
document, and as such is not complete, exhaustive or legally binding.  
whenever customer uses the product for automotive applications beyond  
NXP Semiconductors’ specifications such use shall be solely at customer’s  
own risk, and (c) customer fully indemnifies NXP Semiconductors for any  
liability, damages or failed product claims resulting from customer design and  
use of the product for automotive applications beyond NXP Semiconductors’  
standard warranty and NXP Semiconductors’ product specifications.  
Non-automotive qualified products — Unless this data sheet expressly  
states that this specific NXP Semiconductors product is automotive qualified,  
the product is not suitable for automotive use. It is neither qualified nor tested  
in accordance with automotive testing or application requirements. NXP  
Semiconductors accepts no liability for inclusion and/or use of  
18.4 Trademarks  
non-automotive qualified products in automotive equipment or applications.  
In the event that customer uses the product for design-in and use in  
automotive applications to automotive specifications and standards, customer  
(a) shall use the product without NXP Semiconductors’ warranty of the  
product for such automotive applications, use and specifications, and (b)  
Notice: All referenced brands, product names, service names and trademarks  
are the property of their respective owners.  
UCODE — is a trademark of NXP B.V.  
19. Contact information  
For more information, please visit: http://www.nxp.com  
For sales office addresses, please send an email to: salesaddresses@nxp.com  
SL3S1203_1213_SDS  
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Product short data sheet  
PUBLIC  
Rev. 3.2 — 9 November 2010  
198732  
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20. Tables  
Table 1. Quick reference data . . . . . . . . . . . . . . . . . . . . .3  
Table 2. Ordering information. . . . . . . . . . . . . . . . . . . . . .3  
Table 3. Marking codes . . . . . . . . . . . . . . . . . . . . . . . . . .4  
Table 4. Pin description bare die . . . . . . . . . . . . . . . . . . .5  
Table 5. Pin description SOT886 . . . . . . . . . . . . . . . . . . .5  
Table 6. Specifications . . . . . . . . . . . . . . . . . . . . . . . . . . .7  
Table 7. Overview of G2iL and G2iL+ features . . . . . . .10  
Table 8. G2iL memory sections . . . . . . . . . . . . . . . . . . .10  
Table 9. Limiting values[1][2] . . . . . . . . . . . . . . . . . . . . . .11  
Table 10. G2iL, G2iL+ RF interface characteristics  
(RFN, RFP) . . . . . . . . . . . . . . . . . . . . . . . . . . . 12  
Table 11. VDD pin characteristics . . . . . . . . . . . . . . . . . . 13  
Table 12. G2iL, G2iL+ VDD and OUT pin  
characteristics . . . . . . . . . . . . . . . . . . . . . . . . . 13  
Table 13. G2iL, G2iL+ memory characteristics . . . . . . . . 14  
Table 14. G2iL, G2iL+ RF interface characteristics  
(RFN, RFP) . . . . . . . . . . . . . . . . . . . . . . . . . . . 14  
Table 15. Abbreviations . . . . . . . . . . . . . . . . . . . . . . . . . 15  
Table 16. Revision history . . . . . . . . . . . . . . . . . . . . . . . . 18  
21. Figures  
Fig 1. Block diagram of G2iL IC . . . . . . . . . . . . . . . . . . .4  
Fig 2. Pinning bare die. . . . . . . . . . . . . . . . . . . . . . . . . . .5  
Fig 3. Pin configuration for SOT886 . . . . . . . . . . . . . . . .5  
Fig 4. G2iL wafer layout. . . . . . . . . . . . . . . . . . . . . . . . . .6  
SL3S1203_1213_SDS  
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Product short data sheet  
PUBLIC  
Rev. 3.2 — 9 November 2010  
198732  
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22. Contents  
1
General description. . . . . . . . . . . . . . . . . . . . . . 1  
17  
Revision history . . . . . . . . . . . . . . . . . . . . . . . 18  
2
2.1  
Features and benefits . . . . . . . . . . . . . . . . . . . . 1  
Key features . . . . . . . . . . . . . . . . . . . . . . . . . . . 1  
Memory. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1  
Key benefits . . . . . . . . . . . . . . . . . . . . . . . . . . . 2  
End user benefit . . . . . . . . . . . . . . . . . . . . . . . . 2  
Antenna design benefits . . . . . . . . . . . . . . . . . . 2  
Label manufacturer benefit. . . . . . . . . . . . . . . . 2  
Custom commands. . . . . . . . . . . . . . . . . . . . . . 2  
18  
Legal information . . . . . . . . . . . . . . . . . . . . . . 19  
Data sheet status . . . . . . . . . . . . . . . . . . . . . . 19  
Definitions . . . . . . . . . . . . . . . . . . . . . . . . . . . 19  
Disclaimers . . . . . . . . . . . . . . . . . . . . . . . . . . 19  
Trademarks . . . . . . . . . . . . . . . . . . . . . . . . . . 20  
18.1  
18.2  
18.3  
18.4  
2.1.1  
2.2  
2.2.1  
2.2.2  
2.2.3  
2.3  
19  
20  
21  
22  
Contact information . . . . . . . . . . . . . . . . . . . . 20  
Tables. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21  
Figures . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21  
Contents. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22  
3
3.1  
3.2  
Applications . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3  
Markets. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3  
Applications . . . . . . . . . . . . . . . . . . . . . . . . . . . 3  
4
Quick reference data . . . . . . . . . . . . . . . . . . . . . 3  
Ordering information. . . . . . . . . . . . . . . . . . . . . 3  
Marking. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4  
Block diagram . . . . . . . . . . . . . . . . . . . . . . . . . . 4  
Pinning information. . . . . . . . . . . . . . . . . . . . . . 5  
Pin description . . . . . . . . . . . . . . . . . . . . . . . . . 5  
Wafer layout . . . . . . . . . . . . . . . . . . . . . . . . . . . 6  
Wafer layout . . . . . . . . . . . . . . . . . . . . . . . . . . . 6  
5
6
7
8
8.1  
9
9.1  
10  
10.1  
10.1.1  
10.1.2  
10.1.3  
Mechanical specification . . . . . . . . . . . . . . . . . 7  
Wafer specification . . . . . . . . . . . . . . . . . . . . . . 7  
Wafer . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7  
Fail die identification . . . . . . . . . . . . . . . . . . . . 8  
Map file distribution. . . . . . . . . . . . . . . . . . . . . . 8  
11  
Functional description . . . . . . . . . . . . . . . . . . . 9  
Air interface standards . . . . . . . . . . . . . . . . . . . 9  
Power transfer . . . . . . . . . . . . . . . . . . . . . . . . . 9  
Data transfer. . . . . . . . . . . . . . . . . . . . . . . . . . . 9  
Reader to tag Link . . . . . . . . . . . . . . . . . . . . . . 9  
Tag to reader Link. . . . . . . . . . . . . . . . . . . . . . . 9  
G2iL and G2iL+ differences . . . . . . . . . . . . . . 10  
Supported commands . . . . . . . . . . . . . . . . . . 10  
G2iL, G2iL+ memory . . . . . . . . . . . . . . . . . . . 10  
11.1  
11.2  
11.3  
11.3.1  
11.3.2  
11.4  
11.5  
11.6  
12  
Limiting values. . . . . . . . . . . . . . . . . . . . . . . . . 11  
13  
13.1  
Characteristics. . . . . . . . . . . . . . . . . . . . . . . . . 12  
UCODE G2iL, G2iL+ bare die  
characteristics. . . . . . . . . . . . . . . . . . . . . . . . . 12  
UCODE G2iL, G2iL+ SOT886  
13.2  
characteristics. . . . . . . . . . . . . . . . . . . . . . . . . 14  
14  
14.1  
14.2  
Packing information . . . . . . . . . . . . . . . . . . . . 14  
Wafer . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14  
SOT886 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14  
15  
16  
Abbreviations. . . . . . . . . . . . . . . . . . . . . . . . . . 15  
References . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16  
Please be aware that important notices concerning this document and the product(s)  
described herein, have been included in section ‘Legal information’.  
© NXP B.V. 2010.  
All rights reserved.  
For more information, please visit: http://www.nxp.com  
For sales office addresses, please send an email to: salesaddresses@nxp.com  
Date of release: 9 November 2010  
198732  

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