TDA1386TD-T [NXP]
IC SERIAL INPUT LOADING, 20-BIT DAC, PDSO24, 7.50 MM, PLASTIC, MS-013AD, SOT-137-1, SOP-24, Digital to Analog Converter;
| 型号： | TDA1386TD-T |
| 厂家： | 
NXP |
| 描述： | IC SERIAL INPUT LOADING, 20-BIT DAC, PDSO24, 7.50 MM, PLASTIC, MS-013AD, SOT-137-1, SOP-24, Digital to Analog Converter |
| 文件： | 总24页 (文件大小：167K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
INTEGRATED CIRCUITS
DATA SHEET
TDA1386T
Noise shaping filter DAC
1998 Jan 06
Product specification
Supersedes data of 1995 Dec 11
File under Integrated Circuits, IC01
Philips Semiconductors
Productspecification
Noise shaping filter DAC
TDA1386T
FEATURES
General
GENERAL DESCRIPTION
The TDA1386T is a dual CMOS digital-to-analog converter
with up-sampling filter and noise shaper. The combination
of oversampling up to 4fs, noise shaping and continuous
calibration conversion ensures that only simple 1st order
analog post filtering is required.
• Double-speed mode
• Digital volume control
• Soft mute function
• 12 dB attenuation
The TDA1386T supports the I2S-bus data input mode with
word lengths of up to 20 bits and the LSB fixed serial data
input format with word lengths of 16, 18 or 20 bits.
Two cascaded IIR filters increase the sampling rate
4 times.
• Low power dissipation
• Digital de-emphasis.
Easy application
The DACs are of the continuous calibration type and
incorporate a special data coding. This ensures a high
signal-to-noise ratio, wide dynamic range and immunity to
process variation and component ageing.
• Voltage output
• Only 1st-order analog post-filtering required
• Operational amplifiers and digital filter integrated
• 256fs system clock (fsys
• I2S-bus or 16, 18 or 20 bits LSB fixed serial input format
)
Two on-board operational amplifiers convert the
digital-to-analog current to an output voltage.
• Single rail supply.
High performance
• Superior signal-to-noise ratio
• Wide dynamic range
• No zero crossing distortion
• Inherently monotonic
• Continuous calibration digital-to-analog conversion
combined with noise shaping technique.
ORDERING INFORMATION
PACKAGE
TYPE NUMBER
NAME
DESCRIPTION
plastic small outline package; 24 leads; body width 7.5 mm
VERSION
TDA1386T
SO24
SOT137-1
1998 Jan 06
2
Philips Semiconductors
Productspecification
Noise shaping filter DAC
TDA1386T
QUICK REFERENCE DATA
All power supply pins VDD and GND must be connected to the same external supply unit.
SYMBOL
Supply
PARAMETER
CONDITIONS
MIN.
TYP.
MAX.
UNIT
VDDD
VDDA
VDDO
digital supply voltage
analog supply voltage
4.5
5.0
5.5
V
4.5
4.5
5.0
5.0
5.5
5.5
V
V
operational amplifier supply
voltage
IDDD
IDDA
IDDO
digital supply current
VDDD = 5 V;
at code 00000H
−
−
−
5
3
2
8
5
4
mA
mA
mA
analog supply current
VDDA = 5 V;
at code 00000H
operational amplifier supply VDDO = 5 V;
current
at code 00000H
Analog signals
VFS(rms)
full-scale output voltage
(RMS value)
VDDD = VDDA = VDDO = 5 V;
ROL > 5 kΩ
0.935
5
1.1
1.265
V
RL
output load resistance
−
−
kΩ
DAC performance
(THD + N)/S
total harmonic distortion
plus noise-to-signal ratio
at 0 dB signal level;
fi = 1 kHz
−
−70
0.032
−42
0.8
−108
−
−
dB
%
−
−
at −60 dB signal level;
fi = 1 kHz
−
−32
2.5
dB
%
−
S/N
BR
signal-to-noise ratio
no signal; A-weighted
−
−96
2.822
5.645
dB
bits
bits
input bit rate at data input
fs = 44.1 kHz; normal speed
fs = 44.1 kHz; double speed
−
−
−
fsys
clock frequency
6.4
−40
−
18.432 MHz
+85
Tamb
operating ambient
temperature
−
°C
1998 Jan 06
3
Philips Semiconductors
Productspecification
Noise shaping filter DAC
TDA1386T
BLOCK DIAGRAM
Fig.1 Block diagram.
4
1998 Jan 06
Philips Semiconductors
Productspecification
Noise shaping filter DAC
TDA1386T
PINNING
SYMBOL PIN
DESCRIPTION
VDDA
1
2
3
analog supply voltage
analog ground
AGND
TEST1
test input 1; pin should be
connected to DGND
BCK
4
5
bit clock input
WS
word select input
data input
DATA
CKSL1
CKSL2
DGND
VDDD
6
7
format selection 1
format selection 2
digital ground
8
9
10
11
digital supply voltage
TEST2
test input 2; pin should be
connected to DGND
SYSCLK
APP3
APPL
APP2
APP1
APP0
VOL
12
13
14
15
16
17
18
19
system clock 256fs
application mode 3 input
application mode selection input
application mode 2 input
application mode 1 input
application mode 0 input
left channel output
FILTCL
capacitor for left channel 1st-order
filter function, should be connected
between pins 19 and 18
FILTCR
20
capacitor for right channel 1st-order
filter function, should be connected
between pins 20 and 21
VOR
Vref
21
22
right channel output
internal reference voltage for output
channels (0.5VDDO typ.)
OGND
VDDO
23
24
operational amplifier ground
Fig.2 Pin configuration.
operational amplifier supply voltage
1998 Jan 06
5
Philips Semiconductors
Productspecification
Noise shaping filter DAC
TDA1386T
The TDA1386T supports the following data input modes:
FUNCTIONAL DESCRIPTION
• I2S-bus with data word length of up to 20 bits.
The TDA1386T CMOS DAC incorporates an up-sampling
filter, a noise shaper, continuous calibrated current
sources and operational amplifiers.
• LSB fixed serial format with data word length of 16, 18
or 20 bits. As this format idles on the MSB it is necessary
to know how many bits are being transmitted.
System clock and data input format
The data input formats are illustrated in Fig.7. Left and
right data-channel words are time multiplexed.
The TDA1386T accommodates slave mode only
consequently, in all applications, the system devices must
provide the 256fs system clock.
Table 1 Data input format and system clock
SYSTEM CLOCK
CKSL1
CKSL2
DATA INPUT FORMAT
NORMAL SPEED
DOUBLE SPEED
128fs
0
0
1
1
0
1
0
1
I2S-bus
256fs
256fs
256fs
256fs
LSB fixed 16 bits
LSB fixed 18 bits
LSB fixed 20 bits
128fs
128fs
128fs
In the pseudo-static application mode the TDA1386T is pin
compatible with the TDA1305T slave mode. The
correspondence between TDA1386T pin number,
TDA1386T pin name, TDA1305T pin name and a
description of the effects is given in Table 2.
Device operation
When the APPL pin is held HIGH and APP3 is held LOW,
pins APP0, APP1 and APP2 form a microcontroller
interface. When the APPL pin is held LOW, pins APP0,
APP1, APP2 and APP3 form pseudo-static application
pins (TDA1305T pin compatible).
PSEUDO-STATIC APPLICATION MODE (APPL = LOGIC 0)
In this mode, the device operation is controlled by
pseudo-static application pins (APP0: attenuation mode
control; APP1: double-speed mode control; APP2: mute
mode control and APP3: de-emphasis mode control).
Table 2 Pseudo-static application mode
TDA1305T
FUNCTION
LOGIC
VALUE
PIN NAME
PIN NUMBER
DESCRIPTION
APP0
17
ATSB
0
12 dB attenuation (from full scale) activated
(only if MUSB = 1)
1
0
1
0
1
0
1
full scale (only if MUSB = 1)
double-speed mode
APP1
APP2
APP3
16
15
13
DSMB
MUSB
DEEM1
normal-speed mode
samples decrease to mute level
level in accordance with ATSB
de-emphasis OFF (44.1 kHz)
de-emphasis ON (44.1 kHz)
1998 Jan 06
6
Philips Semiconductors
Productspecification
Noise shaping filter DAC
TDA1386T
MICROCONTROLLER APPLICATION MODE
(APPL = LOGIC 1, APP3 = LOGIC 0)
MICROCONTROLLER WRITE OPERATION SEQUENCE
• APP2 is held LOW by the microcontroller.
In this mode, the device operation is controlled by a set of
flags in an 8-bit mode control register. The 8-bit mode
control register is written by a microprocessor interface
(pin APPL = 1, APP0 = Data, APP1 = Clock, APP2 = RAB
and APP3 = 0).
• Microprocessor data is clocked into the internal shift
register on the LOW-to-HIGH transition at pin APP1.
• Data D(7 to 0) is latched into the appropriate control
register on the LOW-to-HIGH transition of pin APP2
(with APP1 HIGH).
The correspondence between serial to parallel conversion,
mode control flags and a summary of the effect of the
control flags is given in Table 3. Figures 3 and 4 illustrate
the mode set timing.
• If more data is clocked into the TDA1386T before the
LOW-to-HIGH transition on pin APP2 then only the last
8 bits are used.
• If less data is clocked into the TDA1386T unpredictable
operation will result.
• If the LOW-to-HIGH transition of pin APP2 occurs with
APP1 LOW, the command will be disregarded.
Fig.3 Microcontroller timing.
1998 Jan 06
7
Philips Semiconductors
Productspecification
Noise shaping filter DAC
TDA1386T
MICROCONTROLLER WRITE OPERATION SEQUENCE;
REPEAT MODE
It should be noted that APP1 must stay HIGH between
APP2 pulses. A minimum pause of 22 µs is necessary
between any two step-up or step-down commands.
The same command can be repeated several times
(e.g. for fade function) by applying APP2 pulses as shown
in Fig.4.
Fig.4 Microcontroller timing; repeat mode.
Table 3 Microcontroller mode control register
BIT POSITION
FUNCTION
DESCRIPTION
ACTIVE LEVEL
D7
D6
D5
D4
D3
D2
D1
D0
ATSB
DSMB
MUSB
DEEM
FS
12 dB attenuation (from full scale)
double speed
mute
LOW
LOW
LOW
HIGH
HIGH
HIGH
HIGH
−
de-emphasis
full scale
INCR
DECR
−
increment
decrement
reserved
1998 Jan 06
8
Philips Semiconductors
Productspecification
Noise shaping filter DAC
TDA1386T
Volume control
VOLUME CONTROL IN PSEUDO-STATIC APPLICATION MODE
A digital level control is incorporated on the TDA1386T
which performs the function of soft mute and attenuation
(pseudo-static application mode) or soft mute, attenuation,
fade, increment and decrement (microcontroller
application mode). The volume control of both channels
can be varied in small step changes, determined by the
value of the internal fade counter according to:
In the pseudo-static application mode (APPL = logic 0) the
digital audio output level is controlled by APP0
(attenuation) and APP2 (mute) so only the final volume
levels full scale, 12 dB (attenuate) and mute (−infin dB)
can be selected. The mute function has priority over the
attenuation function. Accordingly, if MUSB is LOW, the
state of ATSB has no effect. An example of volume control
in this application mode is illustrated in Fig.5.
Audio level = counter × maximum level/120.
Where the counter is a 7-bit binary number between
0 and 120. The time taken for mute to vary from 120 to 0
is 120/fs. For example, when fs = 44.1 kHz, the time taken
is approximately 3 ms.
Fig.5 Volume control; pseudo-static application mode.
1998 Jan 06
9
Philips Semiconductors
Productspecification
Noise shaping filter DAC
TDA1386T
To control the fade counter in a continuous way, the
VOLUME CONTROL IN MICROCONTROLLER APPLICATION MODE
INCREMENT and DECREMENT commands are available
(fade control registers D1 and D2). They will increment and
decrement the counter by 1 for each register write
operation. When issuing more than 1 step-up or
step-down command in sequence, the write repeat mode
may be used (see microprocessor application mode). An
example of volume control in this application mode is
illustrated in Fig.6.
In the microcontroller application mode (APPL = logic 1,
APP3 = logic 0) the audio output level is controlled by
volume control bits ATSB, MUSB, FS, INCR and DECR.
Mute is activated by sending the MUSB command to the
mode control register via the microcontroller interface. The
audio output level will be reduced to zero in a maximum
120 steps (depending on the current position of the fade
counter) and taking a maximum of 3 ms. Mute, attenuation
and full scale are synchronized to prevent operation in the
middle of a word.
• The counter is preset to 120 by the full scale command.
• The counter is preset to 30 by the attenuate command
when its value is more then 30. If the value of the
counter is less than 30 dB the ATSB command has no
effect.
• The counter is preset to 0 by the mute command MUSB.
• Attenuation (−12 dB) is activated by sending the ATSB
command to the fade control register (D7).
• Attenuation and mute are cancelled by sending the full
scale command to the fade control register (D3).
(1) INCR and DECR in repeat mode.
Fig.6 Volume control; microcontroller application mode.
1998 Jan 06
10
Philips Semiconductors
Productspecification
Noise shaping filter DAC
TDA1386T
There are two recommended application situations within
the microcontroller mode:
Double-speed mode
The double-speed mode is controlled by the DSMB bit at
register D6 (microcontroller application mode) or by
activating the APP1 pin (pseudo static application mode).
When the control bit is active LOW the device operates in
the double-speed mode.
• The customer wants to use the microcontroller interface
without the volume setting facility. In this event the
operation is as follows:
– Mute ON; by sending the MUSB command
– Mute OFF; by sending the FS command
Oversampling filter and noise shaper
– Attenuation ON; by sending the ATSB command
– Attenuation OFF; by sending the FS command.
The digital filter is a four times oversampling filter. It
consists of two sections which each increase the sample
rate by 2. The noise-shaper operates on 4fs and reduces
the in-band noise density.
It is possible to switch from ‘Attenuation ON’ to
‘Mute ON’ but not vice-versa.
• Incorporating the volume control feature operates as
follows:
DAC and operational amplifiers
– Mute ON; by sending the MUSB command the
microcontroller has to store the previous volume
setting.
In this noise shaping DAC a special data code and
bidirectional current sources are used in order to achieve
true low-noise performance. The special data code
guarantees that only small values of current flow to the
output during small signal passages while larger positive
or negative values are generated using the bidirectional
current sources. The noise shaping DAC uses the
continuous calibration conversion technique. The DAC
currents are repeatedly generated from one single
reference current.
– Mute OFF; by sending succeeding INCR commands
until the previous volume is reached.
– Attenuation ON; by sending succeeding DECR
commands until a relative downstep of −12 dB is
reached. The microcontroller has to store the
previous volume.
– Attenuation OFF; by sending the succeeding INCR
commands until the previous volume is reached.
The operational amplifiers and the internal conversion
resistors RCONV1 and RCONV2 convert the DAC current to
an output voltage available at VOL and VOR. Connecting
an external capacitor between FILTCL and VOL, FILTCR
and VOR respectively provides the required first-order
post filtering.
– Volume UP; by sending successive INCR
commands.
– Volume DOWN; by sending successive DECR
commands.
De-emphasis
A digital de-emphasis is implemented in the TDA1386T.
By selecting the DEEM bit at register D4 (microcontroller
application mode) or activating the APP0 pin
(pseudo-static application mode), de-emphasis can be
applied by means of an IIR filter. De-emphasis is
synchronized to prevent operation in the middle of a word.
1998 Jan 06
11
Philips Semiconductors
Productspecification
Noise shaping filter DAC
TDA1386T
LIMITING VALUES
In accordance with the Absolute Maximum Rating System (IEC 134).
SYMBOL
VDDD
PARAMETER
digital supply voltage
CONDITIONS
note 1
MIN.
MAX
7.0
UNIT
−
−
−
−
V
VDDA
VDDO
Txtal
Tstg
analog supply voltage
note 1
note 1
7.0
V
operational amplifiers supply voltage
maximum crystal temperature
storage temperature
7.0
V
+150
+125
+85
°C
°C
°C
V
−65
Tamb
Ves
operating ambient temperature
electrostatic handling
−40
note 2
note 3
−2000
−200
+2000
+200
V
Notes
1. All VDD and GND connections must be made to the same power supply.
2. Equivalent to discharging a 100 pF capacitor via a 1.5 kΩ series resistor.
3. Equivalent to discharging a 200 pF capacitor via a 2.5 µH series inductor.
THERMAL CHARACTERISTICS
SYMBOL
Rth j-a
PARAMETER
VALUE
69
UNIT
thermal resistance from junction to ambient in free air
K/W
QUALITY SPECIFICATION
In accordance with “UZW-BO/FQ-0601”.
1998 Jan 06
12
Philips Semiconductors
Productspecification
Noise shaping filter DAC
TDA1386T
DC CHARACTERISTICS
VDDD = VDDA = VDDO = 5 V; Tamb = 5 °C; all voltages referenced to ground (pins 2, 9 and 23); unless otherwise
specified.
SYMBOL
PARAMETER
CONDITIONS
note 1
MIN.
TYP.
MAX
UNIT
VDDD
VDDA
VDDO
digital supply voltage (pin 10)
analog supply voltage (pin 1)
4.5
4.5
4.5
5.0
5.0
5.0
5.5
5.5
5.5
V
note 1
note 1
V
V
operational amplifier supply
voltage (pin 24)
IDDD
IDDA
IDDO
digital supply current
analog supply current
fsys = 11.28 MHz
at digital silence
−
−
−
5
3
2
8
6
4
mA
mA
mA
operational amplifier supply
current
no operational
amplifier load resistor
Ptot
total power dissipation
fsys = 11.28 MHz;
digital silence;
−
50
90
mW
no operational
amplifier load resistor
VIH
VIL
HIGH level digital input voltage
(pins 3 to 8 and 11 to 17)
0.7VDDD
−0.5
−
−
−
VDDD + 0.5 V
LOW level digital input voltage
(pins 3 to 8 and 11 to 17)
0.3VDDD
134
V
Rpd
internal pull-down resistor to
VSSD (pins 3 and 11)
17
kΩ
ILI
input leakage current
input capacitance
−
−
−
−
10
µA
pF
V
CI
10
Vref
RCONV
reference voltage (pin 22)
with respect to OGND
0.45VDDO 0.5VDDO
0.55VDDO
3.6
current-to-voltage conversion
resistor
2.4
0.935
5
3.0
1.1
−
kΩ
VFS(rms)
full scale output voltage
(RMS value)
RL > 5 kΩ; note 2
1.265
V
RL
output load resistance
−
kΩ
Notes
1. All power supply pins (VDD and GND) must be connected to the same external power supply unit.
2. RL is the AC impedance of the external circuitry connected to the audio outputs of the application circuit.
1998 Jan 06
13
Philips Semiconductors
Productspecification
Noise shaping filter DAC
TDA1386T
AC CHARACTERISTICS (ANALOG)
VDDD = VDDA = VDDO = 5 V; Tamb = 25 °C; all voltages referenced to ground (pins 2, 9 and 23);
unless otherwise specified.
SYMBOL PARAMETER
DACs
CONDITIONS
MIN.
TYP.
MAX
UNIT
SVRR
supply voltage ripple rejection
pins 9 and 16
fripple = 1 kHz;
ripple(p-p) = 100 mV;
C22 = 10 µF
−
40
−
dB
V
∆Vo(DAC)
unbalance between the 2 DAC maximum volume
voltage outputs (pins 18 and 21)
−
−
−
0.5
dB
dB
α
crosstalk between the 2 DAC
one output digital silence
−110
−85
DAC
voltage outputs (pins 18 and 21) the other maximum volume
(THD + N)/S total harmonic distortion plus
noise as a function of signal
at 0 dB signal; fi = 1 kHz
−
−
−
−
−
−70
−
dB
%
0.032
−42
−
at −60 dB signal; fi = 1 kHz
−32
2.5
−96
dB
%
0.8
S/N
signal-to-noise ratio
fi = 20 Hz to 17 kHz;
A-weighted; no signal
−108
dB
Operational amplifiers
Gv
open-loop voltage gain
power supply rejection ratio
−
−
85
90
−
−
dB
dB
PSRR
fripple = 3 kHz;
Vripple(p-p) = 100 mV;
A-weighted
(THD + N)/S total harmonic distortion plus
noise as a function of signal
RL > 5 kΩ;
Vo = 2.8 V (p-p);
fi = 1 kHz
−
−100
−
dB
fug
Zo
unity gain frequency
AC output impedance
open loop
−
−
4.5
1.5
−
MHz
RL > 5 kΩ
150
Ω
1998 Jan 06
14
Philips Semiconductors
Productspecification
Noise shaping filter DAC
TDA1386T
AC CHARACTERISTICS (DIGITAL)
VDDD = VDDA = VDDO = 4.5 to 5.5 V; Tamb = −40 to +85 °C; all voltages referenced to ground (pins 2, 9 and 23);
unless otherwise specified.
SYMBOL
PARAMETER
CONDITIONS
MIN.
TYP.
88.6
MAX
156
UNIT
ns
tW
clock cycle
fsys = 256fs; normal speed 81.3
f
sys = 128fs; double speed 81.3
88.6
−
156
−
ns
ns
ns
tCWL
tCWH
fsys LOW level pulse width
fsys HIGH level pulse width
22
22
−
−
Serial input data timing (see Fig.8)
fs
word selection input audio sample
frequency
normal speed
double speed
25
50
−
44.1
88.2
−
48
kHz
kHz
kHz
kHz
96
fBCK
clock input frequency (data input rate) fsys = 256fs; normal speed
sys = 128fs; double speed;
note 1
64fs
48fs
f
−
−
tr
rise time
−
−
−
−
−
−
−
−
−
20
20
−
ns
ns
ns
ns
ns
ns
ns
ns
tf
fall time
−
tHB
bit clock HIGH time
bit clock LOW time
data set-up time
data hold time
55
55
20
10
20
10
tLB
−
tSU;DAT
tHD;DAT
tSU;WS
tHD;WS
−
−
word select set-up time
word select hold time
−
−
Microcontroller interface timing (see Fig.9)
tL
input LOW time
2
2
1
1
1
−
−
−
−
−
−
−
−
−
−
µs
µs
µs
µs
µs
tH
Input HIGH time
tSU;DC
tHD;CD
tSU;CR
set-up time DATA to CLOCK
hold time CLOCK to DATA
set-up time CLOCK to RAB
Note
1. A clock frequency of up to 96fs is possible in the event that a rising edge of BCK occurs while SYSCLK is LOW.
1998 Jan 06
15
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Fig.7 Data input formats.
Philips Semiconductors
Productspecification
Noise shaping filter DAC
TDA1386T
Fig.8 Timing of input signals.
Fig.9 Microcontroller timing.
17
1998 Jan 06
Philips Semiconductors
Productspecification
Noise shaping filter DAC
TDA1386T
TEST AND APPLICATION INFORMATION
Filter characteristics
Table 4 Digital filter specification, fs = 44.1 kHz
BAND
ATTENUATION
0 to 19 kHz
19 to 20 kHz
24 kHz
<0.001 dB
<0.03 dB
>25 dB
>40 dB
>50 dB
>31 dB
>35 dB
>40 dB
25 to 35 kHz
35 to 64 kHz
64 to 68 kHz
68 kHz
69 to 88 kHz
Table 5 Digital filter phase distortion, fs = 44.1 kHz
BAND
PHASE DISTORTION
0 to 16 kHz
<±1 deg
1998 Jan 06
18
Philips Semiconductors
Productspecification
Noise shaping filter DAC
TDA1386T
PACKAGE OUTLINE
SO24: plastic small outline package; 24 leads; body width 7.5 mm
SOT137-1
D
E
A
X
c
H
v
M
A
E
y
Z
24
13
Q
A
2
A
(A )
3
A
1
pin 1 index
θ
L
p
L
1
12
w
detail X
e
M
b
p
0
5
10 mm
scale
DIMENSIONS (inch dimensions are derived from the original mm dimensions)
A
max.
(1)
(1)
(1)
UNIT
A
A
A
b
c
D
E
e
H
L
L
Q
v
w
y
θ
1
2
3
p
E
p
Z
0.30
0.10
2.45
2.25
0.49
0.36
0.32
0.23
15.6
15.2
7.6
7.4
10.65
10.00
1.1
0.4
1.1
1.0
0.9
0.4
mm
2.65
0.25
0.01
1.27
0.050
1.4
0.25 0.25
0.01
0.1
8o
0o
0.012 0.096
0.004 0.089
0.019 0.013 0.61
0.014 0.009 0.60
0.30
0.29
0.419
0.394
0.043 0.043
0.016 0.039
0.035
0.016
inches 0.10
0.055
0.01 0.004
Note
1. Plastic or metal protrusions of 0.15 mm maximum per side are not included.
REFERENCES
OUTLINE
EUROPEAN
PROJECTION
ISSUE DATE
VERSION
IEC
JEDEC
EIAJ
95-01-24
97-05-22
SOT137-1
075E05
MS-013AD
1998 Jan 06
19
Philips Semiconductors
Productspecification
Noise shaping filter DAC
TDA1386T
SOLDERING
Introduction
Wave soldering
Wave soldering techniques can be used for all SO
packages if the following conditions are observed:
There is no soldering method that is ideal for all IC
packages. Wave soldering is often preferred when
through-hole and surface mounted components are mixed
on one printed-circuit board. However, wave soldering is
not always suitable for surface mounted ICs, or for
printed-circuits with high population densities. In these
situations reflow soldering is often used.
• A double-wave (a turbulent wave with high upward
pressure followed by a smooth laminar wave) soldering
technique should be used.
• The longitudinal axis of the package footprint must be
parallel to the solder flow.
• The package footprint must incorporate solder thieves at
the downstream end.
This text gives a very brief insight to a complex technology.
A more in-depth account of soldering ICs can be found in
our “IC Package Databook” (order code 9398 652 90011).
During placement and before soldering, the package must
be fixed with a droplet of adhesive. The adhesive can be
applied by screen printing, pin transfer or syringe
dispensing. The package can be soldered after the
adhesive is cured.
Reflow soldering
Reflow soldering techniques are suitable for all SO
packages.
Maximum permissible solder temperature is 260 °C, and
maximum duration of package immersion in solder is
10 seconds, if cooled to less than 150 °C within
Reflow soldering requires solder paste (a suspension of
fine solder particles, flux and binding agent) to be applied
to the printed-circuit board by screen printing, stencilling or
pressure-syringe dispensing before package placement.
6 seconds. Typical dwell time is 4 seconds at 250 °C.
A mildly-activated flux will eliminate the need for removal
of corrosive residues in most applications.
Several techniques exist for reflowing; for example,
thermal conduction by heated belt. Dwell times vary
between 50 and 300 seconds depending on heating
method. Typical reflow temperatures range from
215 to 250 °C.
Repairing soldered joints
Fix the component by first soldering two diagonally-
opposite end leads. Use only a low voltage soldering iron
(less than 24 V) applied to the flat part of the lead. Contact
time must be limited to 10 seconds at up to 300 °C. When
using a dedicated tool, all other leads can be soldered in
one operation within 2 to 5 seconds between
270 and 320 °C.
Preheating is necessary to dry the paste and evaporate
the binding agent. Preheating duration: 45 minutes at
45 °C.
1998 Jan 06
20
Philips Semiconductors
Productspecification
Noise shaping filter DAC
TDA1386T
DEFINITIONS
Data sheet status
Objective specification
Preliminary specification
Product specification
This data sheet contains target or goal specifications for product development.
This data sheet contains preliminary data; supplementary data may be published later.
This data sheet contains final product specifications.
Limiting values
Limiting values given are in accordance with the Absolute Maximum Rating System (IEC 134). Stress above one or
more of the limiting values may cause permanent damage to the device. These are stress ratings only and operation
of the device at these or at any other conditions above those given in the Characteristics sections of the specification
is not implied. Exposure to limiting values for extended periods may affect device reliability.
Application information
Where application information is given, it is advisory and does not form part of the specification.
LIFE SUPPORT APPLICATIONS
These products are not designed for use in life support appliances, devices, or systems where malfunction of these
products can reasonably be expected to result in personal injury. Philips customers using or selling these products for
use in such applications do so at their own risk and agree to fully indemnify Philips for any damages resulting from such
improper use or sale.
1998 Jan 06
21
Philips Semiconductors
Productspecification
Noise shaping filter DAC
TDA1386T
NOTES
1998 Jan 06
22
Philips Semiconductors
Productspecification
Noise shaping filter DAC
TDA1386T
NOTES
1998 Jan 06
23
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© Philips Electronics N.V. 1998
SCA57
All rights are reserved. Reproduction in whole or in part is prohibited without the prior written consent of the copyright owner.
The information presented in this document does not form part of any quotation or contract, is believed to be accurate and reliable and may be changed
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under patent- or other industrial or intellectual property rights.
Printed in The Netherlands
547027/1200/03/pp24
Date of release: 1998 Jan 06
Document order number: 9397 750 03169
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