TDA4671 [NXP]
Picture Signal Improvement PSI circuit; 图像信号PSI改进电路型号: | TDA4671 |
厂家: | NXP |
描述: | Picture Signal Improvement PSI circuit |
文件: | 总16页 (文件大小:155K) |
中文: | 中文翻译 | 下载: | 下载PDF数据表文档文件 |
INTEGRATED CIRCUITS
DATA SHEET
TDA4671
Picture Signal Improvement (PSI)
circuit
1996 Dec 11
Product specification
Supersedes data of June 1993
File under Integrated Circuits, IC02
Philips Semiconductors
Product specification
Picture Signal Improvement (PSI) circuit
TDA4671
FEATURES
• Luminance signal delay from 20 to 1100 ns (minimum
step 45 ns)
• Luminance signal peaking with symmetrical overshoots
selectable
• Selectable 2.6 or 5 MHz peaking centre frequency and
degree of peaking (−3, 0, +3 and +6 dB)
GENERAL DESCRIPTION
• Selectable noise reduction by coring
The TDA4671 delays the luminance signal and improves
colour-difference signal transients. The luminance signal
can also be improved by peaking and noise reduction
(coring).
• Handles negative as well as positive colour-difference
signals
• Selectable Colour Transient Improvement (CTI) to
decrease the colour-difference signal transient times to
those of the high frequency luminance signals
• Selectable 5 or 12 V sandcastle input voltage
• All controls selected via the I2C-bus
• Timing pulse generation for clamping and delay time
control synchronized by sandcastle pulse
• Automatic luminance signal delay correction using a
control loop
• Luminance and colour-difference input signal clamping
with coupling capacitor
• 4.5 to 8.8 V supply voltage range
• Minimum of external components.
QUICK REFERENCE DATA
SYMBOL
VP
PARAMETER
MIN.
TYP.
MAX.
UNIT
supply voltage (pins 1 and 5)
total supply current
4.5
31
20
−
5
8.8
52
V
IP(tot)
41
−
mA
ns
td(Y)
Y signal delay time
1130
640
Vi(VBS)(p-p)
composite Y input signal (peak-to-peak value,
pin 16)
450
mV
Vi(CD)(p-p)
colour-difference input signal
(peak-to-peak value)
±(R − Y) on pin 3
−
−
−
−
0
1.05
1.33
−1
1.48
1.88
−
V
±(R − Y) on pin 7
V
GY
gain of Y channel
dB
dB
°C
GCD
Tamb
gain of colour-difference channel
operating ambient temperature
0
−
−
70
ORDERING INFORMATION
TYPE
PACKAGE
NUMBER
NAME
DESCRIPTION
VERSION
TDA4671
DIP18
plastic dual in-line package; 18 leads (300 mil)
SOT102-1
1996 Dec 11
2
Philips Semiconductors
Product specification
Picture Signal Improvement (PSI) circuit
TDA4671
BLOCK DIAGRAM
EM7D46
o o k , f u l l p a g e w i d t h
1996 Dec 11
3
Philips Semiconductors
Product specification
Picture Signal Improvement (PSI) circuit
TDA4671
PINNING
SYMBOL PIN
DESCRIPTION
VP1
1
2
3
positive supply voltage 1
CDL
capacitor of delay time control
±(R − Y) colour-difference input signal
Vi(R − Y)
Vo(R − Y)
handbook, halfpage
±(R − Y) colour-difference output
signal
V
C
GND1
SAND
1
2
3
4
5
6
7
8
9
18
17
16
15
14
13
12
11
10
P1
4
5
6
DL
i(R − Y)
o(R − Y)
VP2
positive supply voltage 2
V
V
iY
Vo(B − Y)
±(B − Y) colour-difference output
signal
V
C
ref
Vi(B − Y)
GND2
SDA
7
8
9
±(B − Y) colour-difference input signal
C
V
TDA4671
CLP2
P2
ground 2 (0 V)
I2C-bus serial data input/output
C
V
CLP1
o(B − Y)
V
V
i(B − Y)
oY
SCL
10 I2C-bus serial clock input
C
GND2
COR
CCOR
VoY
11 coring capacitor
SDA
SCL
12 delayed luminance output signal
13 black level clamping capacitor 1
14 black level clamping capacitor 2
15 capacitor of reference voltage
16 luminance input signal
MED747
CCLP1
CCLP2
Cref
ViY
SAND
GND1
17 sandcastle pulse input
Fig.2 Pin configuration.
18 ground 1 (0 V)
1996 Dec 11
4
Philips Semiconductors
Product specification
Picture Signal Improvement (PSI) circuit
TDA4671
The output buffer stage ensures a low-ohmic VBS output
signal on pin 12 (<160 Ω). The gain of the luminance
signal path from pin 16 to pin 12 is unity.
FUNCTIONAL DESCRIPTION
The TDA4671 contains luminance signal processing and
colour-difference signal processing. The luminance signal
section comprises a variable, integrated luminance delay
line with luminance signal peaking and a noise reduction
by coring.
An oscillation signal of the delay time control loop is
present on output pin 12 instead of the VBS signal. It is
present during the vertical blanking interval of the burst key
pulses in lines 16 (330) to 18 (332). This sync should not
be applied for synchronization.
The colour-difference section consists of a transient
improvement circuit to decrease the rise and fall times of
the colour-difference signal transients. All functions and
parameters are controlled via the I2C-bus.
Colour-difference signal paths
The colour-difference input signals (on pins 3 and 7) are
clamped to a reference voltage.
Y-signal path
Each colour-difference signal is fed to a transient detector
and to an analog signal switch with an attached voltage
storage stage.
The video and blanking signal is AC-coupled to the input
pin 16. Its black porch is clamped to a DC reference
voltage to ensure the correct operating range of the
luminance delay stage.
The transient detectors consist of differentiators and
full-wave rectifiers. The output voltages of both transient
detectors are added and then compared. The comparator
controls both following analog signal switches
simultaneously.
The luminance delay line consists of all-pass filter sections
with delay times of 45, 90, 100, 180 and 450 ns
(see Fig.1). The luminance signal delay is controlled via
the I2C-bus in steps of 45 ns in the range of 20 to 1100 ns,
this ensures that the maximum delay difference between
the luminance and colour-difference signals is ±22.5 ns.
The analog signal switches are in open position at a
certain value of transient time; the held value (held by
capacitors) is then applied to the outputs. The switches
close to rapidly accept the actual signal levels at the end
of these transients. The improved transient time is
approximately 100 ns long independent of the input
transient time.
An automatic luminance delay time adjustment in an
internal control loop (with the horizontal frequency as a
reference) is used to correct changes in the delay time,
due to component tolerances. The control loop is
automatically enabled between the burst key pulses of
lines 16 (330) and 17 (331) during the vertical blanking
interval. The control voltage is stored in capacitor CDL
connected to pin 2.
Colour-difference paths are independent of the input
signal polarity and have a nominal unity gain.
The CTI functions are switched on and off via the I2C-bus.
The peaking section is using a transversal filter circuit with
selectable centre frequencies of 2.6 and 5.0 MHz.
It provides selectable degrees of peaking of −3, 0, +3 and
+6 dB and noise reduction by coring, which attenuates the
high-frequency noise introduced by peaking.
1996 Dec 11
5
Philips Semiconductors
Product specification
Picture Signal Improvement (PSI) circuit
TDA4671
LIMITING VALUES
In accordance with the Absolute Maximum Rating System (IEC 134). VP1 and VP2 as well as GND1 and GND2
connected together.
SYMBOL
VP1
PARAMETER
supply voltage (pin 1)
supply voltage (pin 5)
total power dissipation
storage temperature
CONDITIONS
MIN.
MAX.
8.8
UNIT
0
0
0
V
VP2
8.8
V
Ptot
0.97
+150
70
W
Tstg
−25
°C
°C
Tamb
VESD
operating ambient temperature
electrostatic handling
for pins 9 and 10
0
note 1
−
−
−
+300
−500
±500
V
V
V
for other pins
Note
1. Equivalent to discharging a 200 pF capacitor through a 0 Ω series resistor.
THERMAL CHARACTERISTICS
SYMBOL
Rth j-a
PARAMETER
VALUE
UNIT
thermal resistance from junction to ambient in free air
82
K/W
CHARACTERISTICS
P1 = VP2 = 5 V; nominal video amplitude VVB = 315 mV; tH = 64 µs; tBK = 4 µs (burst key); Tamb = 25 °C and
measurements taken in Fig.4; unless otherwise specified.
V
SYMBOL
VP1
PARAMETER
CONDITIONS
MIN.
4.5
TYP. MAX. UNIT
supply voltage (pin 1)
supply voltage (pin 5)
total supply current
5
8.8
8.8
52
V
VP2
4.5
31
5
V
IP(tot)
41
mA
Y-signal path
Vi(Y)(p-p)
VBS input signal on pin 16
(peak-to-peak value)
−
450
640
mV
V16
I16
black level clamping voltage
input current
−
3.1
−
−
V
during clamping
±95
−
±190
±0.1
−
µA
µA
MΩ
pF
outside clamping
outside clamping
−
R16
input resistance
5
−
C16
input capacitance
−
3
10
td(Y)(max)
td(Y)(min)
maximum Y delay time
minimum Y delay time
set via I2C-bus
set via I2C-bus
1070 1100 1130 ns
20 ns
−
−
1996 Dec 11
6
Philips Semiconductors
Product specification
Picture Signal Improvement (PSI) circuit
TDA4671
SYMBOL
∆ td(Y)
PARAMETER
minimum delay step
CONDITIONS
set via I2C-bus
MIN.
40
TYP. MAX. UNIT
45
0
50
ns
ns
group delay time difference
f = 0.5 to 5 MHz;
maximum delay
−
±25
delay time difference between Y
and colour-difference signals
Y delay;
CTI and peaking off
70
100
130
ns
td(peak)
GY
minimum delay time for peaking
185
215
245
0
ns
VBS signal gain measured on
output pin 12 (composite signal,
peak-to-peak value)
Vo/Vi; f = 500 kHz;
maximum delay
−2
−1
dB
I12
output current (emitter-follower with source current
−1
0.4
−
−
−
−
−
mA
mA
Ω
constant current source)
sink current
−
R12
fres
output resistance
160
frequency response for
maximum delay
f = 0.5 to 3 MHz
f = 0.5 to 5 MHz
−2
−4
−1
−3
0
dB
dB
−1
LIN
signal linearity for
αmin/αmax;
video contents of 315 mV (p-p)
video contents of 450 mV (p-p)
VVBS = 450 mV (p-p)
VVBS = 640 mV (p-p)
0.85
0.60
−
−
−
−
−
−
Luminance peaking, selected via I2C-bus
fpeak
peaking frequency
fC1; LCF-bit = 0
fC2; LCF-bit = 1
4.5
2.3
5
5.5
2.9
MHz
MHz
2.6
Vpeak
peaking amplitude for grade of
peaking (fC amplitude over 0.5 MHz
amplitude)
selectable values
−
−
−
−
−
−3
0
−
−
−
−
−
dB
dB
dB
dB
%
+3
+6
20
limitation of peaking (positive
amplitude of correction signal
referred to 315 mV)
Vn(rms)
COR
noise voltage on pin 12
(RMS value)
without peaking;
f = 0 to 5 MHz
−
−
−
1
mV
%
coring of peaking
COR-bit = 1
20
−
(coring part referred to 315 mV)
1996 Dec 11
7
Philips Semiconductors
Product specification
Picture Signal Improvement (PSI) circuit
TDA4671
SYMBOL
PARAMETER
CONDITIONS
MIN. TYP. MAX. UNIT
Colour-difference paths measured with transient times tr = tf = 1 µs; tp H ≥ 1 µs; Vi = 1.33 V (p-p) on
pins 3 and 7 and with burst key pulse tBK = 4 µs
Vi(CD)(p-p)
±(R − Y) input signal
(peak-to-peak value; pin 3)
75% colour bar
75% colour bar
V3,7/δt
−
1.05
1.48
V
V
±(B − Y) input signal
(peak-to-peak value; pin 7)
−
1.33
1.88
input transient sensitivity
internal clamping voltage level
input current
0.22
−
−
V/µs
V
V3,7
I3,7
−
2.45
−
−
outside clamping
during clamping
−
±1
µA
±100
−
±190 µA
C3,7
V4,6
input capacitance
DC output voltage
output offset voltage
−
−
−
−
−
6
12
−
pF
V
2
∆V4,6
RS ≤ 300 Ω; note 1
−
±5
mV
mV
mV
during and after storage time
RS ≤ 300 Ω; note 1
−
±18
±30
Vspike
I4,6
spurious spike signals on pins 4
and 6
−
output current (emitter-follower with source current
constant current source)
−1
0.4
−
−
−
−
0
0
−
mA
mA
Ω
sink current
−
R4,6
Gv
output resistance
100
+1
±0.3
signal gain in each path
gain difference −(R − Y)/−(B − Y)
signal linearity for
Vo/Vi
−1
−
dB
dB
∆Gv
LIN
αmin/αmax
;
nominal signal
Vi = 1.33 V (p-p)
Vi = 1.88 V (p-p)
0.90
0.65
−1.5
−
−
−
−
−
−
−
+3 dB signal
−
∆Vo
signal reduction at higher frequency signal with tp H = 50 ns;
(output signal ratio Vi/Vo) tr = tf = 1 µs
dB
Sandcastle pulse, input voltage selectable via I2C-bus
V17 input voltage threshold for H and V SC5-bit = 0 (12 V)
1.1
1.5
1.9
V
sync
input voltage threshold for burst
SC5-bit = 0 (12 V)
5.5
1.1
6.5
1.5
7.5
1.9
V
V
input voltage threshold for H and V SC5-bit = 1 (5 V)
sync
input voltage threshold for burst
input resistance
SC5-bit = 1 (5 V)
+12 V input level
+5 V input level
3.0
30
15
−
3.5
40
20
4
4.0
50
25
8
V
R17
kΩ
kΩ
pF
µs
µs
C17
tBK
td
input capacitance
burst key pulse width
3.0
−
4.0
1
4.6
−
leading edge delay for clamping
pulse
referred to tBK
np
number of required burst key pulses note 2
vertical blanking interval
4
−
31
−
1996 Dec 11
8
Philips Semiconductors
Product specification
Picture Signal Improvement (PSI) circuit
TDA4671
SYMBOL
PARAMETER
CONDITIONS
MIN.
TYP. MAX. UNIT
I2C-bus control, SDA and SCL
VIH
HIGH level input voltage on pins 9
3
−
5
V
and 10
VIL
LOW level input voltage
input current
0
−
−
−
−
−
1.5
±10
0.4
V
I9,10
µA
V
Vo(ACK)
output voltage at acknowledge on
pin 9
Io(ACK) = 3 mA
sink current
Io(ACK)
output current at acknowledge on
pin 9
3
−
−
mA
Notes
1. Crosstalk on output, measured in the unused channel when the other channel is provided with a nominal input signal
(CTI active).
2. A number of more than 31 burst key pulses repeats the counter cycle of delay time control.
I2C-BUS FORMAT
S(1)
SLAVE ADDRESS(2)
ACK(3)
SUBADDRESS(4)
ACK(3)
DATA(5)
P(6)
Notes
1. S = START condition.
2. SLAVE ADDRESS = 1000 100X.
3. ACK = acknowledge, generated by the slave.
4. SUBADDRESS = subaddress byte, see Table 1.
5. DATA = data byte, see Table 1.
6. P = STOP condition.
7. X = read/write control bit.
X = 0, order to write (the circuit is slave receiver).
X = 1, order to read (the circuit is slave transmitter).
If more than 1 byte of DATA is transmitted, then auto-increment of the subaddress is performed.
Table 1 I2C-bus transmission; see Table 2
DATA
FUNCTION
SUBADDRESS
D7
0
D6
D5
CTI
LCF
D4
DL4
0
D3
DL3
0
D2
DL2
0
D1
DL1
D0
Y delay/CTI/SC
00010000
SC5
DL0
Peaking and coring 00010001
COR
PEAK
PCON1 PCON0
1996 Dec 11
9
Philips Semiconductors
Product specification
Picture Signal Improvement (PSI) circuit
TDA4671
Table 2 Function of the bits
DATA
FUNCTION
set delay in luminance channel
LOGIC 1
LOGIC 0
DL0
DL1
DL2
DL3
DL4
CTI
45 ns
90 ns
0 ns
0 ns
180 ns
180 ns
450 ns
active
+5 V
0 ns
0 ns
0 ns
set colour transient improvement
select sandcastle pulse voltage
set peaking frequency response
set peaking delay
inactive
+12 V
5.0 MHz
inactive
inactive
SC5
LCF
2.6 MHz
active
active
PEAK
COR
set coring control
PCONx
set peaking amplification
see Table 3
Table 3 Peaking amplification
GRADE OF PEAKING
PCON1
PCON0
(dB)
−3
0
0
0
1
1
0
1
0
1
+3
+6
Remarks to the subaddress bytes
Subaddresses 00H to 0FH are reserved for colour decoders and RGB processors.
Subaddresses 10 and 11 only are acknowledged.
General call address is not acknowledged.
Power-on-reset: D7 to D1 bits of data bytes are set to logic 0, D0 bit is set to logic 1.
1996 Dec 11
10
Philips Semiconductors
Product specification
Picture Signal Improvement (PSI) circuit
TDA4671
INTERNAL CIRCUITRY
EM7D49
o k , f u l l p a g e w i d t h
1996 Dec 11
11
Philips Semiconductors
Product specification
Picture Signal Improvement (PSI) circuit
TDA4671
TEST AND APPLICATION INFORMATION
SDA
2
I C-bus
SDA
SCL
10
9
8
7
6
5
4
3
2
C
COR
GND2
11
0.1 µF
V
V
oY
i(B − Y)
(VBS)
12
13
14
15
16
17
18
10 nF
C
V
V
CLP1
CLP2
o(B − Y)
0.1 µF
C
P2
TDA4671
0.1 µF
C
V
V
ref
o(R − Y)
i(R − Y)
0.1 µF
V
iY
(VBS)
0.1 µF
10 nF
C
SAND
GND1
DL
sandcastle
pulse input
47 µF
15 Ω
0.1 µF
+5 V
V
P1
1
MED748
V
B
Fig.4 Test and application circuit.
12
1996 Dec 11
Philips Semiconductors
Product specification
Picture Signal Improvement (PSI) circuit
TDA4671
PACKAGE OUTLINE
DIP18: plastic dual in-line package; 18 leads (300 mil)
SOT102-1
D
M
E
A
2
A
A
1
L
c
e
w M
Z
b
1
(e )
1
b
b
2
18
10
M
H
pin 1 index
E
1
9
0
5
10 mm
scale
DIMENSIONS (inch dimensions are derived from the original mm dimensions)
(1)
Z
A
A
A
2
(1)
(1)
1
w
UNIT
mm
b
b
b
c
D
E
e
e
L
M
M
H
1
2
1
E
max.
min.
max.
max.
1.40
1.14
0.53
0.38
1.40
1.14
0.32
0.23
21.8
21.4
6.48
6.20
3.9
3.4
8.25
7.80
9.5
8.3
4.7
0.51
3.7
2.54
0.10
7.62
0.30
0.254
0.01
0.85
0.055 0.021 0.055 0.013
0.044 0.015 0.044 0.009
0.86
0.84
0.26
0.24
0.15
0.13
0.32
0.31
0.37
0.33
inches
0.19
0.020
0.15
0.033
Note
1. Plastic or metal protrusions of 0.25 mm maximum per side are not included.
REFERENCES
OUTLINE
EUROPEAN
PROJECTION
ISSUE DATE
VERSION
IEC
JEDEC
EIAJ
93-10-14
95-01-23
SOT102-1
1996 Dec 11
13
Philips Semiconductors
Product specification
Picture Signal Improvement (PSI) circuit
TDA4671
with the joint for more than 5 seconds. The total contact
time of successive solder waves must not exceed
5 seconds.
SOLDERING
Introduction
There is no soldering method that is ideal for all IC
packages. Wave soldering is often preferred when
through-hole and surface mounted components are mixed
on one printed-circuit board. However, wave soldering is
not always suitable for surface mounted ICs, or for
printed-circuits with high population densities. In these
situations reflow soldering is often used.
The device may be mounted up to the seating plane, but
the temperature of the plastic body must not exceed the
specified maximum storage temperature (Tstg max). If the
printed-circuit board has been pre-heated, forced cooling
may be necessary immediately after soldering to keep the
temperature within the permissible limit.
Repairing soldered joints
This text gives a very brief insight to a complex technology.
A more in-depth account of soldering ICs can be found in
our “IC Package Databook” (order code 9398 652 90011).
Apply a low voltage soldering iron (less than 24 V) to the
lead(s) of the package, below the seating plane or not
more than 2 mm above it. If the temperature of the
soldering iron bit is less than 300 °C it may remain in
contact for up to 10 seconds. If the bit temperature is
between 300 and 400 °C, contact may be up to 5 seconds.
Soldering by dipping or by wave
The maximum permissible temperature of the solder is
260 °C; solder at this temperature must not be in contact
DEFINITIONS
Data sheet status
Objective specification
Preliminary specification
Product specification
This data sheet contains target or goal specifications for product development.
This data sheet contains preliminary data; supplementary data may be published later.
This data sheet contains final product specifications.
Limiting values
Limiting values given are in accordance with the Absolute Maximum Rating System (IEC 134). Stress above one or
more of the limiting values may cause permanent damage to the device. These are stress ratings only and operation
of the device at these or at any other conditions above those given in the Characteristics sections of the specification
is not implied. Exposure to limiting values for extended periods may affect device reliability.
Application information
Where application information is given, it is advisory and does not form part of the specification.
LIFE SUPPORT APPLICATIONS
These products are not designed for use in life support appliances, devices, or systems where malfunction of these
products can reasonably be expected to result in personal injury. Philips customers using or selling these products for
use in such applications do so at their own risk and agree to fully indemnify Philips for any damages resulting from such
improper use or sale.
PURCHASE OF PHILIPS I2C COMPONENTS
Purchase of Philips I2C components conveys a license under the Philips’ I2C patent to use the
components in the I2C system provided the system conforms to the I2C specification defined by
Philips. This specification can be ordered using the code 9398 393 40011.
1996 Dec 11
14
Philips Semiconductors
Product specification
Picture Signal Improvement (PSI) circuit
TDA4671
NOTES
1996 Dec 11
15
Philips Semiconductors – a worldwide company
Argentina: see South America
Netherlands: Postbus 90050, 5600 PB EINDHOVEN, Bldg. VB,
Tel. +31 40 27 82785, Fax. +31 40 27 88399
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Tel. +43 1 60 101, Fax. +43 1 60 101 1210
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Tel. +47 22 74 8000, Fax. +47 22 74 8341
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220050 MINSK, Tel. +375 172 200 733, Fax. +375 172 200 773
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106 Valero St. Salcedo Village, P.O. Box 2108 MCC, MAKATI,
Metro MANILA, Tel. +63 2 816 6380, Fax. +63 2 817 3474
Belgium: see The Netherlands
Brazil: see South America
Poland: Ul. Lukiska 10, PL 04-123 WARSZAWA,
Tel. +48 22 612 2831, Fax. +48 22 612 2327
Bulgaria: Philips Bulgaria Ltd., Energoproject, 15th floor,
51 James Bourchier Blvd., 1407 SOFIA,
Tel. +359 2 689 211, Fax. +359 2 689 102
Portugal: see Spain
Romania: see Italy
Canada: PHILIPS SEMICONDUCTORS/COMPONENTS,
Tel. +1 800 234 7381
Russia: Philips Russia, Ul. Usatcheva 35A, 119048 MOSCOW,
Tel. +7 095 247 9145, Fax. +7 095 247 9144
China/Hong Kong: 501 Hong Kong Industrial Technology Centre,
72 Tat Chee Avenue, Kowloon Tong, HONG KONG,
Tel. +852 2319 7888, Fax. +852 2319 7700
Singapore: Lorong 1, Toa Payoh, SINGAPORE 1231,
Tel. +65 350 2538, Fax. +65 251 6500
Colombia: see South America
Czech Republic: see Austria
Slovakia: see Austria
Slovenia: see Italy
Denmark: Prags Boulevard 80, PB 1919, DK-2300 COPENHAGEN S,
Tel. +45 32 88 2636, Fax. +45 31 57 1949
South Africa: S.A. PHILIPS Pty Ltd., 195-215 Main Road Martindale,
2092 JOHANNESBURG, P.O. Box 7430 Johannesburg 2000,
Tel. +27 11 470 5911, Fax. +27 11 470 5494
Finland: Sinikalliontie 3, FIN-02630 ESPOO,
Tel. +358 9 615800, Fax. +358 9 61580/xxx
South America: Rua do Rocio 220, 5th floor, Suite 51,
04552-903 São Paulo, SÃO PAULO - SP, Brazil,
Tel. +55 11 821 2333, Fax. +55 11 829 1849
France: 4 Rue du Port-aux-Vins, BP317, 92156 SURESNES Cedex,
Tel. +33 1 40 99 6161, Fax. +33 1 40 99 6427
Spain: Balmes 22, 08007 BARCELONA,
Tel. +34 3 301 6312, Fax. +34 3 301 4107
Germany: Hammerbrookstraße 69, D-20097 HAMBURG,
Tel. +49 40 23 53 60, Fax. +49 40 23 536 300
Sweden: Kottbygatan 7, Akalla, S-16485 STOCKHOLM,
Tel. +46 8 632 2000, Fax. +46 8 632 2745
Greece: No. 15, 25th March Street, GR 17778 TAVROS/ATHENS,
Tel. +30 1 4894 339/239, Fax. +30 1 4814 240
Switzerland: Allmendstrasse 140, CH-8027 ZÜRICH,
Tel. +41 1 488 2686, Fax. +41 1 481 7730
Hungary: see Austria
India: Philips INDIA Ltd, Shivsagar Estate, A Block, Dr. Annie Besant Rd.
Worli, MUMBAI 400 018, Tel. +91 22 4938 541, Fax. +91 22 4938 722
Taiwan: PHILIPS TAIWAN Ltd., 23-30F, 66,
Chung Hsiao West Road, Sec. 1, P.O. Box 22978,
TAIPEI 100, Tel. +886 2 382 4443, Fax. +886 2 382 4444
Indonesia: see Singapore
Ireland: Newstead, Clonskeagh, DUBLIN 14,
Tel. +353 1 7640 000, Fax. +353 1 7640 200
Thailand: PHILIPS ELECTRONICS (THAILAND) Ltd.,
209/2 Sanpavuth-Bangna Road Prakanong, BANGKOK 10260,
Tel. +66 2 745 4090, Fax. +66 2 398 0793
Israel: RAPAC Electronics, 7 Kehilat Saloniki St, TEL AVIV 61180,
Tel. +972 3 645 0444, Fax. +972 3 649 1007
Turkey: Talatpasa Cad. No. 5, 80640 GÜLTEPE/ISTANBUL,
Tel. +90 212 279 2770, Fax. +90 212 282 6707
Italy: PHILIPS SEMICONDUCTORS, Piazza IV Novembre 3,
20124 MILANO, Tel. +39 2 6752 2531, Fax. +39 2 6752 2557
Ukraine: PHILIPS UKRAINE, 4 Patrice Lumumba str., Building B, Floor 7,
252042 KIEV, Tel. +380 44 264 2776, Fax. +380 44 268 0461
Japan: Philips Bldg 13-37, Kohnan 2-chome, Minato-ku, TOKYO 108,
Tel. +81 3 3740 5130, Fax. +81 3 3740 5077
United Kingdom: Philips Semiconductors Ltd., 276 Bath Road, Hayes,
MIDDLESEX UB3 5BX, Tel. +44 181 730 5000, Fax. +44 181 754 8421
Korea: Philips House, 260-199 Itaewon-dong, Yongsan-ku, SEOUL,
Tel. +82 2 709 1412, Fax. +82 2 709 1415
United States: 811 East Arques Avenue, SUNNYVALE, CA 94088-3409,
Tel. +1 800 234 7381
Malaysia: No. 76 Jalan Universiti, 46200 PETALING JAYA, SELANGOR,
Tel. +60 3 750 5214, Fax. +60 3 757 4880
Uruguay: see South America
Vietnam: see Singapore
Mexico: 5900 Gateway East, Suite 200, EL PASO, TEXAS 79905,
Tel. +9-5 800 234 7381
Yugoslavia: PHILIPS, Trg N. Pasica 5/v, 11000 BEOGRAD,
Tel. +381 11 625 344, Fax.+381 11 635 777
Middle East: see Italy
For all other countries apply to: Philips Semiconductors, Marketing & Sales Communications,
Internet: http://www.semiconductors.philips.com
Building BE-p, P.O. Box 218, 5600 MD EINDHOVEN, The Netherlands, Fax. +31 40 27 24825
© Philips Electronics N.V. 1996
SCA52
All rights are reserved. Reproduction in whole or in part is prohibited without the prior written consent of the copyright owner.
The information presented in this document does not form part of any quotation or contract, is believed to be accurate and reliable and may be changed
without notice. No liability will be accepted by the publisher for any consequence of its use. Publication thereof does not convey nor imply any license
under patent- or other industrial or intellectual property rights.
Printed in The Netherlands
537021/1200/03/pp16
Date of release: 1996 Dec 11
Document order number: 9397 750 01472
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