TDA8580J [NXP]
Multi-purpose power amplifier; 多功能电源放大器器
| 型号： | TDA8580J |
| 厂家： | 
NXP |
| 描述： | Multi-purpose power amplifier |
| 文件： | 总28页 (文件大小：185K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
INTEGRATED CIRCUITS
DATA SHEET
TDA8580J
Multi-purpose power amplifier
Preliminary specification
2000 Apr 18
Supersedes data of 1998 Feb 25
File under Integrated Circuits, IC01
Philips Semiconductors
Preliminary specification
Multi-purpose power amplifier
TDA8580J
FEATURES
General
Protection
• Short-circuit proof to ground, positive supply voltage and
across load; the supply voltage ranges where the
different short circuit conditions are guaranteed are
given in Chapter “Limiting values”
• Supply voltage range from 8 to 24 V
• Low distortion
• Few external components, fixed gain
• High output power
• ESD protected on all pins
• Thermal protection against temperatures exceeding
150 °C.
• Can be used as a stereo amplifier in Bridge-Tied Load
(BTL) or quad Single-Ended (SE) amplifiers
• Single-ended mode without loudspeaker capacitor
• Mute and standby mode with one- or two-pin operation
GENERAL DESCRIPTION
The TDA8580J is a stereo Bridge-Tied Load (BTL) or a
quad Single-Ended (SE) amplifier that operates over a
wide supply voltage range from 8 to 24 V. This makes it
suitable for applications such as television, home-sound
systems and active speakers.
• Diagnostic information for Dynamic Distortion Detector
(DDD), high temperature (145 °C) and short-circuit
• No switch on/off plops when switching between standby
and mute or mute and on; an external RC-network is
prescribed to ensure plop-free operation
Because of an internal voltage buffer, this device can be
used without a capacitor connected in series with the load
(SE application). A combined BTL and 2 × SE application
can also be configured (one chip stereo and subwoofer
application).
• Low offset variation at outputs between mute and on
• Fast mute on supply voltage drops.
ORDERING INFORMATION
TYPE
PACKAGE
NUMBER
NAME
DESCRIPTION
plastic DIL-bent-SIL power package; 17 leads (lead length 12 mm)
VERSION
TDA8580J
DBS17P
SOT243-1
2000 Apr 18
2
Philips Semiconductors
Preliminary specification
Multi-purpose power amplifier
TDA8580J
QUICK REFERENCE DATA
SYMBOL
PARAMETER
CONDITIONS
MIN.
8.0
TYP. MAX. UNIT
VP
operating supply voltage
total quiescent current
standby supply current
14.4
140
1
24
V
Iq(tot)
Istb
VP = 14.4 V
VP = 14.4 V
−
−
170
50
mA
µA
Bridge-tied load application
Gv
Po
voltage gain
output power
31
14
21
−
32
33
−
dB
W
W
%
THD = 0.5%; VP = 14.4 V; RL = 4 Ω
THD = 0.5%; VP = 24 V; RL = 8 Ω
15
23
−
THD
total harmonic distortion
fi = 1 kHz; Po = 1 W; VP = 14.4 V;
0.05
0.1
RL = 4 Ω
fi = 1 kHz; Po = 10 W; VP = 24 V;
−
0.02
0.05
%
RL = 8 Ω
Voffset(DC) DC output offset voltage
VP = 14.4 V; mute condition; RL = 4 Ω
VP = 14.4 V; on condition
−
−
−
10
0
20
mV
mV
µV
dB
140
150
−
Vno
noise output voltage
Rs = 1 kΩ; VP = 14.4 V
100
60
SVRR
supply voltage ripple rejection fi = 1 kHz; Vripple(p-p) = 2 V; on or mute 50
condition; Rs = 0 Ω
Single-ended application
Gv
Po
voltage gain
output power
25
3.8
10.5
−
26
4.0
11.5
10
0
27
−
dB
W
THD = 0.5%; VP = 14.4 V; RL = 4 Ω
THD = 0.5%; VP = 24 V; RL = 4 Ω
VP = 14.4 V; mute condition; RL = 4 Ω
VP = 14.4 V; on condition
−
W
Voffset(DC) DC output offset voltage
20
100
120
−
mV
mV
µV
dB
−
Vno
noise output voltage
Rs = 1 kΩ; VP = 14.4 V
−
80
45
SVRR
supply voltage ripple rejection fi = 1 kHz; Vripple(p-p) = 2 V; on or mute 40
condition; Rs = 0 Ω
2000 Apr 18
3
Philips Semiconductors
Preliminary specification
Multi-purpose power amplifier
TDA8580J
BLOCK DIAGRAM
V
V
P1
3
P2
15
7
IN1
45 kΩ
−
V/I
60
kΩ
−
1
4
OUT1+
OUT2−
+
OA
+
TDA8580J
8
IN2
+
−
+
−
OA
60
kΩ
V/I
45 kΩ
V
V
px
45
px
kΩ
30 kΩ
9
BUFFER
45
kΩ
BUFFER
BUFFER
45 kΩ
−
V/I
60
kΩ
−
14
17
OUT3−
OUT4+
+
OA
+
10
12
IN3
IN5
+
+
−
OA
−
60
kΩ
V/I
11
45 kΩ
IN4
13
5
MUTE
6
DIAG
DIAGNOSTIC
INTERFACE
STANDBY
2
16
MGE010
PGND1
PGND2
Fig.1 Block diagram.
4
2000 Apr 18
Philips Semiconductors
Preliminary specification
Multi-purpose power amplifier
TDA8580J
PINNING
SYMBOL
PIN
DESCRIPTION
OUT1+
PGND1
VP1
1
2
non-inverting output 1
power ground 1
supply voltage 1
inverting output 2
standby/mute/on selection input
diagnostic output
input 1
handbook, halfpage
1
2
OUT1+
PGND1
3
3
V
OUT2−
STANDBY
DIAG
IN1
4
P1
4
5
OUT2−
6
5
STANDBY
DIAG
IN1
7
6
IN2
8
input 2
7
BUFFER
IN3
9
single-ended buffer output
input 3
8
IN2
10
11
12
9
BUFFER
IN3
TDA8580J
IN4
input 4
10
11
12
13
14
15
16
17
IN5
input 5; signal ground capacitor
connection
IN4
MUTE
OUT3−
VP2
13
14
15
16
17
mute/on selection input
inverting output 3
supply voltage 2
IN5
MUTE
OUT3−
PGND2
OUT4+
power ground 2
V
P2
non-inverting output 4
PGND2
OUT4+
MGE009
Fig.2 Pin configuration.
2000 Apr 18
5
Philips Semiconductors
Preliminary specification
Multi-purpose power amplifier
TDA8580J
FUNCTIONAL DESCRIPTION
• Low noise levels, which are independent of the supply
voltage.
The TDA8580J is a multi-purpose power amplifier with four
amplifiers which can be connected in the following
configurations with high output power and low distortion (at
minimum quiescent current):
Protections are included to avoid the IC being damaged at:
• Over temperature: Tj > 150 °C
• Short-circuit of the output pin(s) to ground or supply rail;
when short-circuited, the power dissipation is limited
• Dual bridge-tied load amplifiers
• Quad single-ended amplifiers
• ESD protection (Human Body Model 3000 V, Machine
• Dual single-ended amplifiers and one bridge-tied load
Model 300 V)
amplifier.
• Energy handling. A DC voltage of 6 V can be connected
to the output of any amplifier while the supply pins are
short-circuited to ground.
The amplifier can be switched in on, mute and off
(standby) by the MUTE and STANDBY pins (for interfacing
directly with a microcontroller). One-pin operation is also
possible by applying a voltage greater than 8 V to the
STANDBY pin to switch the amplifier in on mode.
Diagnostics are available for the following conditions
(see Figs 3, 4 and 5):
• Chip temperature above 145 °C
• Distortion over 2% due to clipping
• Short-circuit protection active.
Special attention is given to the dynamic behaviour as
follows:
• Slow offset change between mute and on (controlled by
MUTE and STANDBY pins)
LIMITING VALUES
In accordance with the Absolute Maximum Rating System (IEC 60134).
SYMBOL PARAMETER CONDITIONS
VP operating
no signal condition
MIN. MAX. UNIT
supply voltage
−
−
−
−
−
−
−
24
28
18
6
V
V
V
A
A
V
V
VDIAG
IOSM
voltage on pin DIAG
non-repetitive peak output current
repetitive peak output current
supply voltage with short-circuit across load
IORM
4.5
28
26
VP(scol)
VP(scg)
supply voltage with short-circuit from output
to ground
VP(scs)
supply voltage with short-circuit from output
to supply
−
16
V
VP(rp)
Ptot
reverse polarity
−
6
V
total power dissipation
junction temperature
storage temperature
ambient temperature
−
75
150
W
°C
Tj
−
Tstg
Tamb
−55
−40
+150 °C
+85
°C
THERMAL CHARACTERISTICS
SYMBOL
PARAMETER
thermal resistance from junction to ambient in free air
thermal resistance from junction to case
CONDITIONS
VALUE
UNIT
K/W
K/W
Rth(j-a)
Rth(j-c)
40
1.5
2000 Apr 18
6
Philips Semiconductors
Preliminary specification
Multi-purpose power amplifier
TDA8580J
CHARACTERISTICS
VP = 14.4 V; Tamb = 25 °C; fi = 1 kHz; RL = ∞; measured in test circuit of Fig.28; unless otherwise specified.
SYMBOL
Supplies
PARAMETER
CONDITIONS
MIN. TYP. MAX. UNIT
VP
operating supply voltage
total quiescent current
standby current
8.0
−
14.4
140
1
24
170
50
−
V
Iq(tot)
Istb
mA
µA
V
−
VO
DC output voltage
−
7.0
7.0
4.0
VP(mute)
VI
low supply voltage mute
DC input voltage
6.0
−
8.0
−
V
V
Control pins
STANDBY PIN (see Table 1)
V5(stb)
voltage at STANDBY pin for standby
condition
0
−
0.8
−
V
V
V
V
Vhys(5)(stb) hysteresis voltage at STANDBY pin note 1
for standby condition
−
0.2
−
V5(mute)
voltage at STANDBY pin for mute
condition
V13 < 0.8 V
2.0
8.0
5.3
18
V5(on)
voltage at STANDBY pin for on
condition
VP > 9 V; note 2
V5 = 5 V
−
MUTE PIN (see Table 1)
V13(mute) voltage at MUTE pin for mute
condition
voltage at MUTE pin for on condition V5 = 5 V
Diagnostic; output buffer (open-collector); see Figs 3, 4 and 5
0
−
−
0.8
5.3
V
V
V13(on)
2.5
VOL
ILI
LOW-level output voltage
leakage current
Isink = 1 mA
−
−
1
−
0.2
−
0.8
1
V
VDIAG = 14.4 V
µA
%
CD
clip detector
VDIAG < 0.8 V
2
4
Tj(diag)
junction temperature for high
temperature warning
VDIAG < 0.8 V
145
−
°C
Stereo BTL application; see Figs 6, 7, 10, 11, 14, 15, 18, 19, 21, 22, 23, 24, 26 and 28
THD
total harmonic distortion
fi = 10 kHz; Po = 1 W; RL = 4 Ω;
filter: 22 Hz < f < 30 kHz
−
−
−
0.2
0.3
%
%
%
fi = 1 kHz; Po = 1 W; VP = 14.4 V;
RL = 4 Ω
0.05
0.02
0.1
fi = 1 kHz; Po = 10 W; VP = 24 V;
0.05
RL = 8 Ω
Po
output power
voltage gain
THD = 0.5%; VP = 14.4 V; RL = 4 Ω 14
THD = 0.5%; VP = 24 V; RL = 8 Ω 21
THD = 10%; VP = 14.4 V; RL = 4 Ω 18
15
23
20
30
32
−
W
W
W
W
dB
−
−
THD = 10%; VP = 24 V; RL = 8 Ω
28
31
−
Gv
Vo(rms) = 3 V
33
2000 Apr 18
7
Philips Semiconductors
Preliminary specification
Multi-purpose power amplifier
TDA8580J
SYMBOL
αcs
PARAMETER
channel separation
channel unbalance
CONDITIONS
MIN. TYP. MAX. UNIT
Po = 2 W; fi = 1 kHz; RL = 4 Ω
60
−
65
−
−
dB
dB
mV
mV
µV
µV
µV
dB
∆Gv
1
Voffset(DC) DC output offset voltage
on condition
−
0
140
20
150
20
500
−
mute condition; RL = 4 Ω
Rs = 1 kΩ; VP = 14.4 V; note 3
note 3
−
10
100
0
Vno
noise output voltage
−
Vno(mute)
Vo(mute)
SVRR
noise output voltage mute
output voltage mute
−
Vi(rms) = 1 V
−
3
supply voltage ripple rejection
Rs = 0 Ω; fi = 1 kHz;
Vripple(p-p) = 2 V; on or mute
condition
50
60
Zi
input impedance
23
30
60
37
kΩ
CMRR
common mode rejection ratio
Rs = 0 Ω; Vi(rms) = 0.5 V; fi = 1 kHz
−
−
dB
Quad SE application; see Figs 8, 9, 12, 13, 16, 17, 20, 25, 27 and 29
THD
total harmonic distortion
fi = 1 kHz; Po = 1 W; RL = 4 Ω
−
−
0.05
0.2
0.1
0.3
%
%
fi = 10 kHz; Po = 1 W; RL = 4 Ω;
filter: 22 Hz < f < 30 kHz
fi = 1 kHz; Po = 1 W; VP = 24 V,
−
0.05
0.1
%
RL = 4 Ω; filter: 22 Hz < f < 30 kHz
Po
output power
THD = 0.5%; VP = 14.4 V; RL = 4 Ω 3.8
4.0
11.5
5.2
15
26
46
−
−
W
THD = 0.5%; VP = 24 V; RL = 4 Ω
10.5
−
W
THD = 10%; VP = 14.4 V; RL = 4 Ω 4.9
−
W
THD = 10%; VP = 24 V; RL = 4 Ω
Vo(rms) = 3 V
14
25
40
−
−
W
Gv
voltage gain
27
−
dB
dB
dB
mV
mV
αcs
∆Gv
channel separation
channel unbalance
Po = 2 W; fi = 1 kHz; RL = 4 Ω
1
Voffset(DC) DC output offset voltage
VP = 14.4 V; on condition
−
0
100
20
VP = 14.4 V; mute condition;
−
10
RL = 4 Ω
Vno
noise output voltage
Rs = 1 kΩ; VP = 14.4 V; note 3
note 3
−
80
0
120
20
µV
µV
µV
dB
Vno(mute)
Vo(mute)
SVRR
noise output voltage mute
output voltage mute
−
Vi(rms) = 1 V
−
3
500
−
supply voltage ripple rejection
fi = 1 kHz; Vripple(p-p) = 2 V, on or
40
45
mute condition; Rs = 0 Ω
Zi
input impedance
46
60
60
74
kΩ
CMRR
common mode rejection ratio
Vi(rms) = 0.5 V; fi = 1 kHz; Rs = 0 Ω
−
−
dB
Notes
1. Hysteresis between the rise and fall voltage when pin STANDBY is controlled with low ohmic voltage source.
2. At lower VP the voltage at the STANDBY pin for on condition will be adjusted automatically to maintain an
on condition at low battery voltage (down to 8 V) when using one-pin operation.
3. The noise output is measured in a bandwidth of 20 Hz to 20 kHz.
2000 Apr 18
8
Philips Semiconductors
Preliminary specification
Multi-purpose power amplifier
TDA8580J
Table 1 Selection of standby, mute and on
VOLTAGE AT PIN STANDBY
VOLTAGE AT PIN MUTE
don’t care
< 0.8 V
FUNCTION
< 0.8 V
standby (off)
2 to 5.3 V
2 to 5.3 V
≥ 8.0 V
mute (DC settled)
on (AC operating)
on (AC operating)
2.5 to 5.3 V
don’t care
temperature
overload
handbook, halfpage
handbook, halfpage
DIAG
active
DDD
normal
normal
DIAG
amplifier
output
amplifier
output
MGE021
MGE020
Fig.3 Diagnostic waveform: temperature overload.
Fig.4 Diagnostic waveform: DDD function.
2000 Apr 18
9
Philips Semiconductors
Preliminary specification
Multi-purpose power amplifier
TDA8580J
MGS700
1
handbook, halfpage
THD
(%)
short-circuit to
handbook, halfpage
V
GND
P
(1)
(2)
−1
10
DIAG
amplifier
output
−2
10
MGE022
2
3
4
5
10
10
10
10
10
f (Hz)
i
RL = 4 Ω; VP = 14.4 V; 2 channel driven.
(1) Po = 1 W.
(2) Po = 10 W.
Fig.5 Diagnostic waveform: short-circuit to GND
or VP.
Fig.6 Total harmonic distortion as a function of
frequency; BTL mode.
MGS701
MGS702
1
1
handbook, halfpage
handbook, halfpage
THD
(%)
THD
(%)
−1
−1
10
10
(1)
(2)
−2
−2
10
10
2
3
4
5
2
3
4
5
10
10
10
10
10
10
10
10
10
10
f (Hz)
f (Hz)
i
i
RL = 8 Ω; VP = 24 V; 2 channel driven.
(1) Po = 1 W.
(2) Po = 10 W.
Po = 1 W; RL = 4 Ω; VP = 14.4 V; 4 channel driven.
Fig.7 Total harmonic distortion as a function of
frequency; BTL mode.
Fig.8 Total harmonic distortion as a function of
frequency; SE mode.
2000 Apr 18
10
Philips Semiconductors
Preliminary specification
Multi-purpose power amplifier
TDA8580J
MGS703
MGS704
2
1
10
handbook, halfpage
handbook, halfpage
THD
(%)
THD
(%)
(2)
(1)
(3)
10
−1
1
10
(1)
(1)
(2)
(3)
(2)
−1
10
−2
−2
10
10
2
3
4
5
−1
2
10
10
10
10
10
10
1
10
10
f (Hz)
P
(W)
i
o
RL = 4 Ω; VP = 14.4 V; 2 channel driven.
(1) fi = 10 kHz.
RL = 4 Ω; VP = 24 V; 4 channel driven.
(1) Po = 5 W.
(2) fi = 1 kHz.
(2) Po = 1 W.
(3) fi = 100 Hz.
Fig.9 Total harmonic distortion as a function of
frequency; SE mode.
Fig.10 Total harmonic distortion as a function of
output power; BTL mode.
MGS705
MGS706
2
2
10
10
handbook, halfpage
handbook, halfpage
THD
(%)
THD
(%)
(2)
(3)
(2)
(1)
(3)
10
10
(1)
1
1
(1)
(1)
−1
−1
10
10
(2)
(3)
(2)
(3)
−2
−2
10
10
−1
−1
2
10
10
1
10
1
10
10
P
(W)
P
(W)
o
o
RL = 8 Ω; VP = 24 V; 2 channel driven.
(1) fi = 10 kHz.
RL = 4 Ω; VP = 14.4 V; 4 channel driven
(1) fi = 10 kHz.
(2) fi = 1 kHz.
(2) fi = 1 kHz.
(3) fi = 100 Hz.
(3) fi = 100 Hz.
Fig.11 Total harmonic distortion as a function of
output power; BTL mode.
Fig.12 Total harmonic distortion as a function of
output power; SE mode.
2000 Apr 18
11
Philips Semiconductors
Preliminary specification
Multi-purpose power amplifier
TDA8580J
MGS708
MGS707
2
10
30
handbook, halfpage
handbook, halfpage
THD
(%)
P
d
(W)
(2)
(3)
10
1
(1)
20
(1)
10
−1
10
(2)
(3)
−2
0
0
10
−1
2
10
20
30
10
1
10
10
P
(W)
P
(W)
o
o
RL = 4 Ω; VP = 24 V; 4 channel driven.
(1) fi = 10 kHz.
(2) fi = 1 kHz.
fi = 1 kHz; RL = 4 Ω; VP = 14.4 V; 2 channel driven.
(3) fi = 100 Hz.
Fig.13 Total harmonic distortion as a function of
output power; SE mode.
Fig.14 Power dissipation as a function of output
power; BTL mode.
MGS709
MGS710
40
16
handbook, halfpage
handbook, halfpage
P
P
d
d
(W)
30
(W)
12
20
10
0
8
4
0
0
2
4
6
0
10
20
30
40
P
(W)
P
(W)
o
o
fi = 1 kHz; RL = 8 Ω; VP = 24 V; 2 channel driven.
fi = 1 kHz; RL = 4 Ω; VP = 14.4 V; 4 channel driven.
Fig.15 Power dissipation as a function of output
power; BTL mode.
Fig.16 Power dissipation as a function of output
power; SE mode.
2000 Apr 18
12
Philips Semiconductors
Preliminary specification
Multi-purpose power amplifier
TDA8580J
MGS712
MGS711
40
40
handbook, halfpage
handbook, halfpage
P
P
d
o
(W)
30
(W)
30
20
10
0
20
10
(1)
(2)
0
8
0
4
8
12
16
12
16
20
V
(V)
P
(W)
P
o
fi = 1 kHz; RL = 4 Ω; 2 channel driven.
(1) THD = 10%.
fi = 1 kHz; RL = 4 Ω; VP = 24 V; 4 channel driven.
(2) THD = 0.5%.
Fig.17 Power dissipation as a function of output
power; SE mode.
Fig.18 Output power as a function of supply
voltage; BTL mode.
MGS714
MGS713
40
16
handbook, halfpage
handbook, halfpage
P
P
o
o
(W)
30
(W)
12
20
8
(1)
(1)
(2)
10
4
(2)
0
0
8
12
16
20
24
8
12
16
20
24
V
(V)
V
(V)
P
P
fi = 1 kHz; RL = 8 Ω; 2 channel driven.
(1) THD = 10%.
fi = 1 kHz; RL = 4 Ω; 2 channel driven.
(1) THD = 0.5%.
(2) THD = 0.5%
(2) THD = 10%
Fig.19 Output power as a function of supply
voltage; BTL mode.
Fig.20 Output power as a function of supply
voltage; SE mode.
2000 Apr 18
13
Philips Semiconductors
Preliminary specification
Multi-purpose power amplifier
TDA8580J
MGS717
MGS715
34
0.8
∆P
handbook, halfpage
G
v
o
(dB)
(W)
33
0.4
32
31
0
−0.4
−0.8
30
10
2
3
4
5
2
3
4
5
10
10
10
10
10
10
10
10
10
f (Hz)
f (Hz)
i
i
Ci = 470 nF.
THD = 0.5%; RL = 4 Ω; VP = 14.4 V.
Fig.21 Gain as a function of input frequency;
BTL mode.
Fig.22 Power bandwidth as a function of
frequency; BTL mode.
MGS716
MGS718
0.8
−50
handbook, halfpage
handbook, halfpage
α
cs
(dB)
∆P
o
(W)
−54
0.4
−58
−62
−66
0
−0.4
−0.8
(1)
(2)
−70
2
3
4
5
2
3
4
5
10
10
10
10
10
10
10
10
10
10
f (Hz)
f (Hz)
i
i
Po = 2 W; RL = 4 Ω; VP = 14.4 V.
(1) Channels 3 and 4 to channels 1 and 2.
(2) Channels 1 and 2 to channels 3 and 4.
THD = 0.5%; RL = 8 Ω; VP = 24 V.
Fig.23 Power bandwidth as a function of
frequency; BTL mode.
Fig.24 Channel separation as a function of
frequency; BTL mode.
2000 Apr 18
14
Philips Semiconductors
Preliminary specification
Multi-purpose power amplifier
TDA8580J
MGS719
MGS720
−20
−20
handbook, halfpage
handbook, halfpage
α
cs
SVRR
(dB)
(dB)
−30
−40
−60
−40
(1)
(1)
(2)
(2)
(3)
−50
−60
−80
2
3
4
5
2
3
4
5
10
10
10
10
10
10
10
10
10
10
f (Hz)
f (Hz)
i
i
Po = 2 W; RS = 0 Ω; RL = 4 Ω; VP = 14.4 V.
(1) Channel 1 to channel 2.
Rs = 0 Ω; Vripple(p-p) = 2 V.
(1) Vp = 14.4 V.
(2) Channel 1 to channel 3.
(2) Vp = 24 V.
(3) Channel 1 to channel 4.
Fig.25 Channel separation as a function of
frequency; SE mode.
Fig.26 SVRR as a function of frequency;
BTL mode.
MGS721
−20
handbook, halfpage
SVRR
(dB)
−30
−40
−50
(1)
(2)
−60
2
3
4
5
10
10
10
10
10
f (Hz)
i
Rs = 0 Ω; Vripple(p-p) = 2 V.
(1) Vp = 14.4 V.
(2) Vp = 24 V.
Fig.27 SVRR as a function of frequency; SE mode.
2000 Apr 18
15
Philips Semiconductors
Preliminary specification
Multi-purpose power amplifier
TDA8580J
APPLICATION INFORMATION
• The 4.7 µF capacitor and the 10 kΩ resistor connected
to pin 5 or to pin 13 are used to:
The application circuit depends on the supply voltage
used. For supply voltages below 18 V the application
circuits are shown in Figs 28, 29 and 30.
– provide a stable loop
– control the switch on/off behaviour
– minimize the effect due to clip detection.
The typical application circuits for the different supply
voltage ranges are shown in Figs 31, 32 and 33.
Use of common buffer
Additional information for the applications shown in
Figs 28, 29 and 30
In SE applications the buffer output is used in place of a
SE capacitor. To minimize the crosstalk (high channel
separation) and distortion it is advised to connect the
speaker wires as closely as possible to pin 9 without using
a shared wire. Internally in the IC all the efforts have been
taken to minimize the crosstalk by locating the feedback
loops as close as possible to pin 9.
The RC-network connected to pin 5 determines the
amplifier switch on/off behaviour as follows;
• Switched from STANDBY to MUTE when Vswitching
(typically 9 V) is enabled and the switch SW1 is closed.
During MUTE there is no output noise and no offset.
If a common wire is shared by all the speakers, the series
resistance of this shared wire will introduce added signal
voltages resulting from the currents flowing through this
wire when a connected amplifier is driven by a signal.
• Switched from MUTE to ON when the switch SW1 is
opened. During switching ON the offset and noise are
gradually built up. The time constant is fixed by R1 × C1.
The inputs can be tied together and connected to one input
capacitor. Because the input resistance is decreased by a
factor of 2, the low frequency roll-off is shifted to a higher
frequency when Ci is kept the same value.
Optimize the THD performance
The TDA8580J application can be optimized to gain the
lowest THD possible by applying the following guidelines:
The low frequency cut-off is determined by;
• SE application: minimize the shared wires to pin 9 (see
section “Use of common buffer”).
f–3dB = 1 ⁄ (2π × Ri × Ci )
• Because the inputs are quasi differential, ground loops
can be avoided by connecting the negative terminal of
the 100 µF signal ground capacitor (connected to
pin 12) to the ground pin of the signal processor.
1
=
= 12 Hz.
---------------------------------------------------------------------
2π × 60 × 103 × 220 × 10–9
The Boucherot network connected to the buffer (pin 9) is
necessary to guarantee a low output resistance at high
frequencies when the buffer is loaded (only in SE
applications).
Note: do not leave the inputs in the open condition to
prevent HF oscillation.
• Increase the value of electrolytic supply capacitor
(typical value 1000 µF) to the maximum possible to
minimize cross talk and distortion at low signal
frequencies, due to the PSRR (power supply rejection
ratio). For suppressing high frequency transients on the
supply line a capacitor (typical value 100 nF) with a low
ESR is required to be connected in parallel with the
electrolytic capacitor. The capacitor combination must
be placed as close as possible to the IC (using short
interconnection tracks).
Additional information for the applications shown in
Figs 31, 32 and 33
Short circuit behaviour at high supply voltages (Vp > 18 V):
• When Vp > 18 V it is advisable to use the applications
given in Figs 32 and 33. In these applications the
diagnostics output is tied to pin 5 (one pin operation) or
pin 13 (two pin operation). During a fault condition the
amplifier is soft-muted and the amplitude of the output
signal is reduced at:
Headroom
– over temperature (still large dynamic range)
A typical CD requires at least 12 dB dynamic headroom
(a factor of 15.85), compared with the average power
output, for passing the loudest parts without distortion.
– short to ground and over load (output current
reduced)
2000 Apr 18
16
Philips Semiconductors
Preliminary specification
Multi-purpose power amplifier
TDA8580J
For BTL application at Vp = 24 V, RL = 8 Ω and Po at
THD = 0.5% (see Fig.15), the Average Listening
Level (ALL) for music power without distortion yields:
EXAMPLE
Measured or given values:
Vp = 24 V
23
Po(ALL)
=
= 1.45 W.
--------------
RL = 8 Ω (2 × BTL)
15.85
Measured worst case Pd (sine wave) = 32 W
Tj(max) = 150oC
Tamb(max) = 60oC
Table 2 Pd as a function of headroom (music signals) for
Po = 2 × 23 W (THD = 0.5%).
HEADROOM
Pd
Rth(j-c) = 1.5 K/W
0 dB
32 W
16 W
Tj(max) – T
Rth(hs)
=
amb(max) – R
--------------------------------------------------
th(j – c)
12 dB
Pd
150 – 60
----------------------
32
=
– 1.5 = 1.3 K/W
So for the average music listening level a total power
dissipation of 16 W can be used for calculating the
optimum heat sink thermal resistance.
Table 3 Heatsink thermal resistance as a function of
headroom for Po = 2 × 23 W (THD = 0.5%).
Heatsink calculation
HEAD ROOM
Pd
32 W
16 W
Rth(hs)
The measured thermal resistance of this package Rth(j-c) is
a maximum of 1.5 K/W. For a maximum ambient
temperature of 60oC the required heatsink thermal
resistance can be calculated as shown in the following
example.
0 dB
1.3 K/W
12 dB
4.12 K/W
2000 Apr 18
17
Philips Semiconductors
Preliminary specification
Multi-purpose power amplifier
TDA8580J
V
P
1000 µF
16/40 V
100 nF
V
3
V
P1
P2
15
220 nF
7
8
IN1
IN2
45 kΩ
−
V/I
60
kΩ
−
1
4
OUT1+
OUT2−
V
inL
+
OA
+
TDA8580J
+
−
4 or 8 Ω
+
−
+
−
OA
60
kΩ
V/I
45 kΩ
V
V
px
45
px
kΩ
30 kΩ
9
BUFFER
45
kΩ
BUFFER
BUFFER
100 µF
10 V
45 kΩ
IN5 12
−
60
kΩ
−
OA
V/I
14
17
OUT3−
OUT4+
+
10
IN3
+
+
−
4 or 8 Ω
+
OA
−
+
−
60
V/I
kΩ
220 nF
IN4 11
45 kΩ
+5 V
V
10
kΩ
inR
MUTE
13
5
6
DIAG
DIAGNOSTIC
INTERFACE
STANDBY
V
switching
(9 V typical)
2
16
PGND2
MGU075
PGND1
R1
(1)
R2
4.7 µF
SW1
(1) R1 and R2 values depend on Vswitching applied; the value of R1 and R2 connected in parallel should be minimum 10 kΩ.
Fig.28 Stereo bridge-tied load application; VP ≤ 18 V.
2000 Apr 18
18
Philips Semiconductors
Preliminary specification
Multi-purpose power amplifier
TDA8580J
V
P
1000 µF
16/40 V
100 nF
V
3
V
P1
P2
15
220 nF
IN1
IN2
7
8
45 kΩ
−
V/I
V
60
kΩ
inR
−
OUT1+
1
4
+
OA
+
TDA8580J
+
4 or 8 Ω
FRONT
220 nF
−
+
−
OUT2−
+
−
OA
60
kΩ
V
inL
V/I
45 kΩ
−
+
V
V
4 or 8 Ω
px
45
px
kΩ
30 kΩ
2 Ω
9
BUFFER
220 nF
45
kΩ
BUFFER
BUFFER
+
−
100 µF
4 or 8 Ω
10 V
45 kΩ
IN5 12
−
60
kΩ
−
OA
V/I
14
17
OUT3−
220 nF
+
10
IN3
+
−
V
inR
4 or 8 Ω
+
+
OA
−
OUT4+
+
−
60
kΩ
V/I
REAR
220 nF
IN4 11
45 kΩ
+5 V
V
inL
10
kΩ
MUTE
13
5
6
DIAG
DIAGNOSTIC
INTERFACE
STANDBY
V
switching
(9 V typical)
2
16
PGND2
MGU077
PGND1
R1
(1)
R2
4.7 µF
SW1
(1) R1 and R2 values depend on Vswitching applied; the value of R1 and R2 connected in parallel should be minimum 10 kΩ.
Fig.29 Quad single-ended application; VP ≤ 18 V.
2000 Apr 18
19
Philips Semiconductors
Preliminary specification
Multi-purpose power amplifier
TDA8580J
V
P
1000 µF
16/40 V
100 nF
V
3
V
P1
P2
15
220 nF
IN1
IN2
7
8
45 kΩ
−
V/I
60
kΩ
V
inR
−
1
OUT1+
+
OA
+
TDA8580J
+
4 or 8 Ω
−
+
−
4
OUT2−
+
−
OA
60
kΩ
V/I
45 kΩ
V
V
px
px
45
kΩ
30 kΩ
2 Ω
BUFFER
9
220 nF
45
kΩ
BUFFER
BUFFER
+
−
100 µF
10 V
4 or 8 Ω
45 kΩ
IN5 12
−
60
kΩ
−
OA
V/I
OUT3−
14
17
220 nF
+
10
IN3
+
−
V
4 or 8 Ω
inR
+
+
OA
−
OUT4+
+
−
60
kΩ
V/I
220 nF
IN4 11
45 kΩ
+5 V
V
inL
V
10
kΩ
MUTE 13
6
DIAG
DIAGNOSTIC
INTERFACE
STANDBY
5
switching
(9 V typical)
2
16
PGND2
MGU076
PGND1
R1
(1)
R2
4.7 µF
SW1
(1) R1 and R2 values depend on Vswitching applied; the value of R1 and R2 connected in parallel should be minimum 10 kΩ.
Fig.30 Dual single-ended and one bridge-tied load application; VP ≤ 18 V.
2000 Apr 18
20
Philips Semiconductors
Preliminary specification
Multi-purpose power amplifier
TDA8580J
V
P
V
V
P2
P1
100 nF
1000 µF
3
15
IN1
IN2
IN3
IN4
IN5
OUT1+
OUT2−
OUT3−
OUT4+
1
4
7
8
inputs
(1)
14
17
10
11
12
V
switching
TDA8580J
(2)
(9 V typical)
2 Ω
BUFFER
9
(2)
220 nF
100 µF
STANDBY
R1
(3)
45 kΩ
10 kΩ
DIAG
+5 V
6
5
2
16
PGND1 PGND2
R2
(3)
MGS699
15 kΩ
4.7 µF
SW1
(1) Load conditions: quad SE (4 x 4 Ω), or dual BTL (2 x 8 Ω), or dual SE (2 x 4 Ω) and one BTL (1 x 8 Ω).
(2) RC combination not required in BTL mode.
(3) R1 and R2 values depend on Vswitching applied; the value of R1 and R2 connected in parallel should be minimum 10 kΩ.
Fig.31 Application 1; supply voltage range 8 V < VP ≤ 18 V; 1-pin and 2-pin operation.
V
P
V
V
P2
P1
100 nF
1000 µF
3
15
IN1
IN2
OUT1+
OUT2−
OUT3−
OUT4+
1
4
7
8
inputs
IN3
(1)
14
17
10
11
12
13
5
IN4
V
switching
TDA8580J
(2)
(9 V typical)
2 Ω
IN5
BUFFER
9
(2)
220 nF
100 µF
4.7 µF
MUTE
STANDBY
R1
(3)
45 kΩ
DIAG
6
2
16
PGND1 PGND2
R2
(3)
15 kΩ
3.6 V
SW1
MGS697
(1) Load conditions: quad SE (4 x 4 Ω), or dual BTL (2 x 8 Ω), or dual SE (2 x 4 Ω) and one BTL (1 x 8 Ω).
(2) RC combination not required in BTL mode.
(3) R1 and R2 values depend on Vswitching applied; the value of R1 and R2 connected in parallel should be minimum 10 kΩ.
Fig.32 Application 2; supply voltage range 18 V < VP ≤ 24 V; 1-pin operation.
2000 Apr 18
21
Philips Semiconductors
Preliminary specification
Multi-purpose power amplifier
TDA8580J
V
P
V
V
P2
P1
100 nF
1000 µF
3
15
IN1
IN2
IN3
IN4
IN5
OUT1+
OUT2−
OUT3−
OUT4+
1
4
7
8
inputs
(1)
14
17
10
11
12
TDA8580J
(2)
2 Ω
BUFFER
MUTE
DIAG
9
(2)
220 nF
100 µF
STANDBY
13
6
5
10 kΩ
2
16
PGND1 PGND2
10 kΩ
4.7 µF
MUTE
4.7 µF
MSB
MGS698
(1) Load conditions: quad SE (4 x 4 Ω), or dual BTL (2 x 8 Ω), or dual SE (2 x 4 Ω) and one BTL (1 x 8 Ω)
(2) RC combination not required in BTL mode.
Fig.33 Application 3; supply voltage range 18 V < VP ≤ 24 V; 2-pin operation.
INTERNAL PIN CONFIGURATION
PIN
NAME
EQUIVALENT CIRCUIT
7, 8, 10, 11
and 12
Inputs
V
V
int
int
12
7, 8, 10 and 11
MGS723
1, 4, 9, 14
and 17
Outputs
V
P
1, 4, 9, 14, and 17
MGL849
0.5 V
P
2000 Apr 18
22
Philips Semiconductors
Preliminary specification
Multi-purpose power amplifier
TDA8580J
PIN
NAME
EQUIVALENT CIRCUIT
5
STANDBY
V
P
5
MGL848
13
MUTE
V
int
13
4 V
MGS724
6
DIAG
6
MGS722
2000 Apr 18
23
Philips Semiconductors
Preliminary specification
Multi-purpose power amplifier
TDA8580J
PACKAGE OUTLINE
DBS17P: plastic DIL-bent-SIL power package; 17 leads (lead length 12 mm)
SOT243-1
non-concave
D
h
x
D
E
h
view B: mounting base side
d
A
2
B
j
E
A
L
3
L
Q
c
2
v
M
1
17
e
e
m
w
M
1
Z
b
p
e
0
5
10 mm
scale
DIMENSIONS (mm are the original dimensions)
(1)
(1)
(1)
UNIT
A
A
b
c
D
d
D
E
e
e
e
E
j
L
L
3
m
Q
v
w
x
Z
2
p
h
1
2
h
17.0 4.6 0.75 0.48 24.0 20.0
15.5 4.4 0.60 0.38 23.6 19.6
12.2
11.8
3.4 12.4 2.4
3.1 11.0 1.6
2.00
1.45
2.1
1.8
6
mm
10
2.54 1.27 5.08
0.8
4.3
0.4 0.03
Note
1. Plastic or metal protrusions of 0.25 mm maximum per side are not included.
REFERENCES
OUTLINE
EUROPEAN
PROJECTION
ISSUE DATE
VERSION
IEC
JEDEC
EIAJ
97-12-16
99-12-17
SOT243-1
2000 Apr 18
24
Philips Semiconductors
Preliminary specification
Multi-purpose power amplifier
TDA8580J
SOLDERING
The total contact time of successive solder waves must not
exceed 5 seconds.
Introduction to soldering through-hole mount
packages
The device may be mounted up to the seating plane, but
the temperature of the plastic body must not exceed the
specified maximum storage temperature (Tstg(max)). If the
printed-circuit board has been pre-heated, forced cooling
may be necessary immediately after soldering to keep the
temperature within the permissible limit.
This text gives a brief insight to wave, dip and manual
soldering. A more in-depth account of soldering ICs can be
found in our “Data Handbook IC26; Integrated Circuit
Packages” (document order number 9398 652 90011).
Wave soldering is the preferred method for mounting of
through-hole mount IC packages on a printed-circuit
board.
Manual soldering
Apply the soldering iron (24 V or less) to the lead(s) of the
package, either below the seating plane or not more than
2 mm above it. If the temperature of the soldering iron bit
is less than 300 °C it may remain in contact for up to
10 seconds. If the bit temperature is between
Soldering by dipping or by solder wave
The maximum permissible temperature of the solder is
260 °C; solder at this temperature must not be in contact
with the joints for more than 5 seconds.
300 and 400 °C, contact may be up to 5 seconds.
Suitability of through-hole mount IC packages for dipping and wave soldering methods
SOLDERING METHOD
PACKAGE
DIPPING
WAVE
DBS, DIP, HDIP, SDIP, SIL
suitable
suitable(1)
Note
1. For SDIP packages, the longitudinal axis must be parallel to the transport direction of the printed-circuit board.
2000 Apr 18
25
Philips Semiconductors
Preliminary specification
Multi-purpose power amplifier
TDA8580J
DATA SHEET STATUS
PRODUCT
DATA SHEET STATUS
STATUS
DEFINITIONS (1)
Objective specification
Development This data sheet contains the design target or goal specifications for
product development. Specification may change in any manner without
notice.
Preliminary specification Qualification
This data sheet contains preliminary data, and supplementary data will be
published at a later date. Philips Semiconductors reserves the right to
make changes at any time without notice in order to improve design and
supply the best possible product.
Product specification
Production
This data sheet contains final specifications. Philips Semiconductors
reserves the right to make changes at any time without notice in order to
improve design and supply the best possible product.
Note
1. Please consult the most recently issued data sheet before initiating or completing a design.
DEFINITIONS
DISCLAIMERS
Short-form specification
The data in a short-form
Life support applications
These products are not
specification is extracted from a full data sheet with the
same type number and title. For detailed information see
the relevant data sheet or data handbook.
designed for use in life support appliances, devices, or
systems where malfunction of these products can
reasonably be expected to result in personal injury. Philips
Semiconductors customers using or selling these products
for use in such applications do so at their own risk and
agree to fully indemnify Philips Semiconductors for any
damages resulting from such application.
Limiting values definition Limiting values given are in
accordance with the Absolute Maximum Rating System
(IEC 60134). Stress above one or more of the limiting
values may cause permanent damage to the device.
These are stress ratings only and operation of the device
at these or at any other conditions above those given in the
Characteristics sections of the specification is not implied.
Exposure to limiting values for extended periods may
affect device reliability.
Right to make changes
Philips Semiconductors
reserves the right to make changes, without notice, in the
products, including circuits, standard cells, and/or
software, described or contained herein in order to
improve design and/or performance. Philips
Semiconductors assumes no responsibility or liability for
the use of any of these products, conveys no licence or title
under any patent, copyright, or mask work right to these
products, and makes no representations or warranties that
these products are free from patent, copyright, or mask
work right infringement, unless otherwise specified.
Application information
Applications that are
described herein for any of these products are for
illustrative purposes only. Philips Semiconductors make
no representation or warranty that such applications will be
suitable for the specified use without further testing or
modification.
2000 Apr 18
26
Philips Semiconductors
Preliminary specification
Multi-purpose power amplifier
TDA8580J
NOTES
2000 Apr 18
27
Philips Semiconductors – a worldwide company
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India: Philips INDIA Ltd, Band Box Building, 2nd floor,
254-D, Dr. Annie Besant Road, Worli, MUMBAI 400 025,
Tel. +91 22 493 8541, Fax. +91 22 493 0966
Switzerland: Allmendstrasse 140, CH-8027 ZÜRICH,
Tel. +41 1 488 2741 Fax. +41 1 488 3263
Indonesia: PT Philips Development Corporation, Semiconductors Division,
Gedung Philips, Jl. Buncit Raya Kav.99-100, JAKARTA 12510,
Tel. +62 21 794 0040 ext. 2501, Fax. +62 21 794 0080
Taiwan: Philips Semiconductors, 6F, No. 96, Chien Kuo N. Rd., Sec. 1,
TAIPEI, Taiwan Tel. +886 2 2134 2886, Fax. +886 2 2134 2874
Ireland: Newstead, Clonskeagh, DUBLIN 14,
Tel. +353 1 7640 000, Fax. +353 1 7640 200
Thailand: PHILIPS ELECTRONICS (THAILAND) Ltd.,
209/2 Sanpavuth-Bangna Road Prakanong, BANGKOK 10260,
Tel. +66 2 745 4090, Fax. +66 2 398 0793
Israel: RAPAC Electronics, 7 Kehilat Saloniki St, PO Box 18053,
TEL AVIV 61180, Tel. +972 3 645 0444, Fax. +972 3 649 1007
Turkey: Yukari Dudullu, Org. San. Blg., 2.Cad. Nr. 28 81260 Umraniye,
ISTANBUL, Tel. +90 216 522 1500, Fax. +90 216 522 1813
Italy: PHILIPS SEMICONDUCTORS, Via Casati, 23 - 20052 MONZA (MI),
Tel. +39 039 203 6838, Fax +39 039 203 6800
Ukraine: PHILIPS UKRAINE, 4 Patrice Lumumba str., Building B, Floor 7,
252042 KIEV, Tel. +380 44 264 2776, Fax. +380 44 268 0461
Japan: Philips Bldg 13-37, Kohnan 2-chome, Minato-ku,
TOKYO 108-8507, Tel. +81 3 3740 5130, Fax. +81 3 3740 5057
United Kingdom: Philips Semiconductors Ltd., 276 Bath Road, Hayes,
MIDDLESEX UB3 5BX, Tel. +44 208 730 5000, Fax. +44 208 754 8421
Korea: Philips House, 260-199 Itaewon-dong, Yongsan-ku, SEOUL,
Tel. +82 2 709 1412, Fax. +82 2 709 1415
United States: 811 East Arques Avenue, SUNNYVALE, CA 94088-3409,
Tel. +1 800 234 7381, Fax. +1 800 943 0087
Malaysia: No. 76 Jalan Universiti, 46200 PETALING JAYA, SELANGOR,
Tel. +60 3 750 5214, Fax. +60 3 757 4880
Uruguay: see South America
Vietnam: see Singapore
Mexico: 5900 Gateway East, Suite 200, EL PASO, TEXAS 79905,
Tel. +9-5 800 234 7381, Fax +9-5 800 943 0087
Yugoslavia: PHILIPS, Trg N. Pasica 5/v, 11000 BEOGRAD,
Middle East: see Italy
Tel. +381 11 3341 299, Fax.+381 11 3342 553
For all other countries apply to: Philips Semiconductors,
Internet: http://www.semiconductors.philips.com
International Marketing & Sales Communications, Building BE-p, P.O. Box 218,
5600 MD EINDHOVEN, The Netherlands, Fax. +31 40 27 24825
69
SCA
© Philips Electronics N.V. 2000
All rights are reserved. Reproduction in whole or in part is prohibited without the prior written consent of the copyright owner.
The information presented in this document does not form part of any quotation or contract, is believed to be accurate and reliable and may be changed
without notice. No liability will be accepted by the publisher for any consequence of its use. Publication thereof does not convey nor imply any license
under patent- or other industrial or intellectual property rights.
Printed in The Netherlands
753503/25/03/pp28
Date of release: 2000 Apr 18
Document order number: 9397 750 05478
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