TDA8706TD-T [NXP]
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| 型号： | TDA8706TD-T |
| 厂家： | 
NXP |
| 描述： | 暂无描述 转换器 模数转换器 光电二极管 |
| 文件： | 总16页 (文件大小：76K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
INTEGRATED CIRCUITS
DATA SHEET
TDA8706
6-bit analog-to-digital converter
with multiplexer and clamp
1996 Aug 20
Preliminary specification
Supersedes data of February 1992
File under Integrated Circuits, IC02
Philips Semiconductors
Preliminary specification
6-bit analog-to-digital converter with
multiplexer and clamp
TDA8706
FEATURES
GENERAL DESCRIPTION
• 6-bit resolution
The TDA8706 is a monolithic bipolar 6-bit
Analog-to-Digital Converter (ADC) with a 3 analog input
multiplexer and a clamp. All digital inputs and outputs are
TTL compatible. Regulator with good temperature
compensation.
• Binary 3-state TTL outputs
• TTL compatible digital inputs
• 3 multiplexed video inputs
• Luminance and colour difference clamps
• Internal reference
FUNCTIONAL DESCRIPTION
• 300 mW power dissipation
• 20-pin plastic package.
The TDA8706 is a ‘like-flash’ converter which produces an
output code in one clock period. The device can withstand
a duty clock cycle of 50 to 66.6% (clock HIGH).
Luminance clamping level is fitted with 00H code (output
000000). Chrominance clamping level is fitted with 20H
code (output 100000).
APPLICATIONS
• General purpose video applications
• Y, U and V signals
• Colour Picture-in-Picture (PIPCO) for TV
• Videophone
• Frame grabber.
QUICK REFERENCE DATA
Measured over full voltage and temperature ranges.
SYMBOL
VCCA
PARAMETER
analog supply voltage (pin 2)
MIN.
TYP.
MAX.
5.5
UNIT
4.5
4.5
−
5.0
5.0
32
28
−
V
V
VCCD
ICCA
ICCD
ILE
digital supply voltage (pin 10)
analog supply current (pin 20)
digital supply current (pin 10)
integral linearity error
5.5
39
mA
−
37
mA
−
±0.75
±0.5
−
LSB
LSB
MHz
mW
°C
DLE
fCLK
Ptot
DC differential linearity error
maximum clock frequency
total power dissipation
−
−
20
−
−
300
418
+70
Tamb
operating ambient temperature range
0
−
ORDERING INFORMATION
TYPE
PACKAGE
NUMBER
NAME
DESCRIPTION
plastic dual in-line package; 20 leads (300 mil)
plastic small outline package; 20 leads; body width 7.5 mm
VERSION
TDA8706
DIP20
SO20
SOT146-1
SOT163-1
TDA8706T
1996 Aug 20
2
Philips Semiconductors
Preliminary specification
6-bit analog-to-digital converter with
multiplexer and clamp
TDA8706
BLOCK DIAGRAM
CM2D67
k , f u l l p a g e w i d t h
1996 Aug 20
3
Philips Semiconductors
Preliminary specification
6-bit analog-to-digital converter with
multiplexer and clamp
TDA8706
PINNING
SYMBOL PIN
DESCRIPTION
GND
VCCA
VRT
1
2
3
4
ground
analog positive supply (+5 V)
reference voltage TOP decoupling
VRB
reference voltage BOTTOM
decoupling
handbook, halfpage
1
GND
CCA
20 D0
19 D1
V
INC
INB
INA
C
5
6
7
8
9
chrominance input
chrominance input
luminance input
select input
2
3
V
18
D2
17 D3
16
RT
V
4
RB
INC
INB
INA
C
5
D4
15 D5
14
B
select input
TDA8706
6
A
10 select input
7
CE
VCCD
CLAMP
CLK
CE
11 digital positive supply voltage (+5 V)
12 damp pulse input (positive pulse)
13 clock input
8
13 CLK
B
9
12 CLAMP
14 chip enable (active LOW)
V
11
A
10
CCD
D5
15 digital voltage output: most significant
bit (MSB)
MCD266
D4
D3
D2
D1
D0
16 digital voltage output
17 digital voltage output
18 digital voltage output
19 digital voltage output
20 digital voltage output: significant bit
(LSB)
Fig.2 Pin configuration.
1996 Aug 20
4
Philips Semiconductors
Preliminary specification
6-bit analog-to-digital converter with
multiplexer and clamp
TDA8706
LIMITING VALUES
In accordance with the Absolute Maximum System (IEC 134).
SYMBOL
VCCA
VCCD
PARAMETER
MIN.
−0.3
MAX.
+7.0
UNIT
analog supply voltage range (pin 2)
digital supply voltage range (pin 10)
supply voltage difference
V
V
V
V
−0.3
1.0
−0.3
−
+7.0
−
VCCA − VCCD
VI
input voltage range
+7.0
10
IO
output current
mA
°C
Tstg
Tamb
storage temperature range
operating ambient temperature range
−55
0
+150
+70
°C
HANDLING
Inputs and outputs are protected against electrostatic discharges in normal handling. However, to be totally safe, it is
desirable to take normal precautions appropriate to handling integrated circuits.
1996 Aug 20
5
Philips Semiconductors
Preliminary specification
6-bit analog-to-digital converter with
multiplexer and clamp
TDA8706
CHARACTERISTICS (see Tables 1 and 2)
VCCA = 4.5 to 5.5 V; VCCD = 4.5 to 5.5 V = VCCD; Tamb = 0 to +70 °C; CVRB = CVR1 = 100 nF; Typical values measured
at VCCA = VCCD = 5 V and Tamb = 25 °C; unless otherwise specified.
SYMBOL
PARAMETER
CONDITIONS
MIN.
TYP. MAX. UNIT
Supply
VCCA
VCCD
ICCA
analog supply voltage (pin 2)
digital supply voltage (pin 10)
analog supply current (pin 2)
digital supply current (pin 10)
4.5
5.0
5.0
32
5.5
5.5
39
V
4.5
V
−
mA
mA
ICCD
all outputs at LOW level −
28
37
Inputs
CLOCK INPUT (PIN 13)
VIL
VIH
IIL
LOW level input voltage
0
−
−
−
−
4
2
0.8
VCCD
−
V
HIGH level input voltage
LOW level input current
HIGH level input current
input impedance
2.0
V
VCLK = 0.4 V
VCLK = 2.7 V
fCLK = 20 MHz
fCLK = 20 MHz
−400
µA
µA
kΩ
pF
IIH
ZI
−
−
−
100
−
Ci
input capacitance
−
A, B, C, CLAMP AND CEN INPUTS (PINS 8, 9, 10, 12 AND 14)
VIL
VIH
IIL
LOW level input voltage
HIGH level input voltage
LOW level input current
HIGH level input current
0
−
−
−
−
0.8
VCCD
−
V
2
V
VCLK = 0.4 V
VCLK = 2.7 V
−400
µA
µA
IIH
−
20
Reference voltage (pins 3 and 4)
VRT
VRB
reference voltage TOP decoupling
reference voltage BOTTOM decoupling
3.22
1.84
1.36
3.35
1.9
3.44
1.96
V
V
V
VRT − VRB reference voltage TOP − BOTTOM decoupling
1.435 1.48
Analog inputs INA, INB, INC (pins 7, 6 and 5)
VI(p-p)
ZI
input voltage amplitude (peak-to-peak value)
input impedance
840
100
1
900
−
940
mV
fi = 4.43 MHz
−
kΩ
Cclamp
coupling clamp capacitance
10
1000 nF
Analog signal processing (pins 5, 6 and 7) (fCLK = 20 MHz)
f1
fundamental harmonics (full scale)
harmonics (full scale); all components
differential gain
fi = 4.43 MHz
fi = 4.43 MHz
note 1
−
−
−
−
−
−
0
−
−
−
−
dB
dB
%
fall
−45
0.4
1.0
−30
Gdiff
φdiff
SVRR
differential phase
note 1
deg
dB
supply voltage ripple rejection
note 2
1996 Aug 20
6
Philips Semiconductors
Preliminary specification
6-bit analog-to-digital converter with
multiplexer and clamp
TDA8706
SYMBOL
Outputs
PARAMETER
CONDITIONS
MIN.
TYP. MAX. UNIT
DIGITAL VOLTAGE OUTPUTS (PINS 15 TO 20) (see Table 2)
VOL
VOH
IOZ
LOW level input voltage
IO = 1 mA
0
−
−
−
0.4
V
HIGH level output voltage
output current in 3-state mode
IO = 0.5 mA
2.7
VCCD
+20
V
0.4 V < VO < VCCD
−20
µA
Switching characteristics
CLOCK TIMING (see Fig.3)
fCLK
fmux
tCLK
maximum clock frequency
20
10
50
45
16
22.5
4
−
−
MHz
MHZ
ns
maximum multiplexing frequency
−
−
period
−
−
duty cycle
LOW time
HIGH time
rise time
fall time
CLK = VIH
at 50%
50
−
66.6
−
%
tLOW
tHIGH
tCLR
tCLF
ns
at 50%
−
−
ns
at 10 to 90%
at 90 to 10%
6
−
ns
4
6
−
ns
Select signals, Clamp, Data (see Figs 4 and 5)
tS
set-up time select A, B and C
rise time A, B and band C
fall time A, B and band C
set-up time clamp asynchronous
hold time clamp asynchronous
clamp pulse
35
4
−
−
ns
ns
ns
tr
at 10 to 90%
at 90 to 10%
6
−
tf
4
6
−
tCLPS
tCLPH
tCLPP
td
0
−
−
0
−
−
CCLP = 10 nF
−
3
−
µs
ns
ns
data output delay time
data hold time
−
15
−
24
−
tDH
12
Transfer function
ILE
DC integral linearity error
−
−
−
−
−
±0.75 LSB
DLE
AILE
EB
DC differential linearity error
AC integral linearity error
effective bits
−
±0.5
±2
−
LSB
LSB
bits
note 3
note 3
−
5.7
Timing
DIGITAL OUTPUTS
Tdt
3-state delay time
sampling time offset
see Fig.6
−
−
16
2
25
ns
ns
Tsto
−
1996 Aug 20
7
Philips Semiconductors
Preliminary specification
6-bit analog-to-digital converter with
multiplexer and clamp
TDA8706
Notes to the characteristics
1. Low frequency ramp signal (VVI(p-p) = 1.8 V and fi = 15 kHz) combined with a sinewave input voltage (VVI(p-p) = 0.5 V
and fi = 4.43 MHz) at the input.
2. Supply voltage ripple rejection (SVRR): variation of the input voltage produces output code 31 for a supply voltage
variation of 1 V.
∆VVi (31)
SVRR = 20 log
----------------------
∆VCCA
3. Full-scale sinewave; fi = 4.43 MHz, fCLK = 20 MHz.
Table 1 Output coding
Table 3 Clamp input A
BINARY
VI(1)
DIGITAL
OUTPUTS
A
CLAMP
VinA
OUTPUTS
STEP
0
1
1
1
X(1)
0
2.2
2.2
(TYP. VALUE)
<2.2 V
D5 TO D0
Underflow
000000
000000
000001
......
0
2.2 V
Note
1
2.215 V
1. X = don’t care.
.
Table 4 Clamp input B and C
.
......
.
62
......
DIGITAL
OUTPUTS
B/C
CLAMP
VinB/VinC
3.072 V
3.086 V
>3.1 V
111110
111111
111111
63
0
1
1
1
X(1)
32
2.65
2.65
Overflow
Note
Note
1. X = don’t care.
1. With clamping capacitance.
Table 2 Mode selection
CEN
D0 TO D5
high impedance
active; binary
1
0
1996 Aug 20
8
Philips Semiconductors
Preliminary specification
6-bit analog-to-digital converter with
multiplexer and clamp
TDA8706
V
IH
90%
50%
10%
V
IL
t
t
CLR
CLF
t
t
MCD268
CLH
CLL
t
CLP
Fig.3 AC clock characteristics.
CLK
t
S
A
B
C
t
t
t
CLPS
CLPH
DH
CLAMP
t
CLPP
t
d
OUTPUT
DATA
DATA C
DATA A
DATA B
DATA C
MCD269 - 1
Fig.4 AC characteristics select signals; Clamp, Data.
9
1996 Aug 20
Philips Semiconductors
Preliminary specification
6-bit analog-to-digital converter with
multiplexer and clamp
TDA8706
h
– (B –Y)
(C input)
digital outputs
= 100000
digital outputs
= 100000
– (R –Y)
(B input)
Y
digital outputs
= 000000
(A input)
1
0
CLAMP
input
MCD270
Fig.5 AC characteristics select signals; Clamp, Data.
Table 5 Clamp characteristic related to TV signals
PARAMETER
MIN.
2.2
TYP.
MAX.
3.3
10
UNIT
µs
lines
Clamping time per line (signal active)
3.0
3
Input signals clamped to correct level after
−
1996 Aug 20
10
Philips Semiconductors
Preliminary specification
6-bit analog-to-digital converter with
multiplexer and clamp
TDA8706
reference
level
(1.3 V)
CE
input
2.4 V
data
outputs
0.4 V
t
t
dHZ
dZH
dZL
t
t
dLZ
MGD690
Fig.6 Timing diagram of 3-state delay.
1996 Aug 20
11
Philips Semiconductors
Preliminary specification
6-bit analog-to-digital converter with
multiplexer and clamp
TDA8706
APPLICATION INFORMATION
Additional application information will be supplied upon request (please quote reference number FTV/9112).
1
2
3
4
5
6
7
8
9
10
20
19
18
17
16
15
14
13
12
11
22 nF
22 nF
INC
INB
INA
TDA8706
C
B
A
clock signal
C
C
C
C
MGA230
(1) ‘C’ capacitors must be determined on the output capacitance of the circuits driving A, B and C or CLK pins.
(2) VRB and VRT are decoupling pins for the internal reference ladder. Do not draw current from these pins in order to achieve good linearity.
(3) Analog and digital supplies should be separated and decoupled.
Fig.7 Application diagram.
1996 Aug 20
12
Philips Semiconductors
Preliminary specification
6-bit analog-to-digital converter with
multiplexer and clamp
TDA8706
PACKAGE OUTLINES
DIP20: plastic dual in-line package; 20 leads (300 mil)
SOT146-1
D
M
E
A
2
A
A
1
L
c
e
w M
Z
b
1
(e )
1
b
M
H
20
11
pin 1 index
E
1
10
0
5
10 mm
scale
DIMENSIONS (inch dimensions are derived from the original mm dimensions)
(1)
A
A
A
(1)
(1)
Z
1
2
UNIT
mm
b
b
c
D
E
e
e
1
L
M
M
H
w
1
E
max.
min.
max.
max.
1.73
1.30
0.53
0.38
0.36
0.23
26.92
26.54
6.40
6.22
3.60
3.05
8.25
7.80
10.0
8.3
4.2
0.51
3.2
2.54
0.10
7.62
0.30
0.254
0.01
2.0
0.068
0.051
0.021
0.015
0.014
0.009
1.060
1.045
0.25
0.24
0.14
0.12
0.32
0.31
0.39
0.33
inches
0.17
0.020
0.13
0.078
Note
1. Plastic or metal protrusions of 0.25 mm maximum per side are not included.
REFERENCES
OUTLINE
EUROPEAN
PROJECTION
ISSUE DATE
VERSION
IEC
JEDEC
EIAJ
92-11-17
95-05-24
SOT146-1
SC603
1996 Aug 20
13
Philips Semiconductors
Preliminary specification
6-bit analog-to-digital converter with
multiplexer and clamp
TDA8706
SO20: plastic small outline package; 20 leads; body width 7.5 mm
SOT163-1
D
E
A
X
c
y
H
E
v
M
A
Z
20
11
Q
A
2
A
(A )
3
A
1
pin 1 index
θ
L
p
L
1
10
w
detail X
e
M
b
p
0
5
10 mm
scale
DIMENSIONS (inch dimensions are derived from the original mm dimensions)
A
max.
(1)
(1)
(1)
UNIT
A
A
A
b
c
D
E
e
H
L
L
Q
v
w
y
θ
1
2
3
p
E
p
Z
0.30
0.10
2.45
2.25
0.49
0.36
0.32
0.23
13.0
12.6
7.6
7.4
10.65
10.00
1.1
0.4
1.1
1.0
0.9
0.4
mm
2.65
0.25
0.01
1.27
0.050
1.4
0.25 0.25
0.01
0.1
8o
0o
0.012 0.096
0.004 0.089
0.019 0.013 0.51
0.014 0.009 0.49
0.30
0.29
0.42
0.39
0.043 0.043
0.016 0.039
0.035
0.016
inches 0.10
0.055
0.01 0.004
Note
1. Plastic or metal protrusions of 0.15 mm maximum per side are not included.
REFERENCES
OUTLINE
EUROPEAN
PROJECTION
ISSUE DATE
VERSION
IEC
JEDEC
EIAJ
92-11-17
95-01-24
SOT163-1
075E04
MS-013AC
1996 Aug 20
14
Philips Semiconductors
Preliminary specification
6-bit analog-to-digital converter with
multiplexer and clamp
TDA8706
Several techniques exist for reflowing; for example,
SOLDERING
Introduction
thermal conduction by heated belt. Dwell times vary
between 50 and 300 seconds depending on heating
method. Typical reflow temperatures range from
215 to 250 °C.
There is no soldering method that is ideal for all IC
packages. Wave soldering is often preferred when
through-hole and surface mounted components are mixed
on one printed-circuit board. However, wave soldering is
not always suitable for surface mounted ICs, or for
printed-circuits with high population densities. In these
situations reflow soldering is often used.
Preheating is necessary to dry the paste and evaporate
the binding agent. Preheating duration: 45 minutes at
45 °C.
WAVE SOLDERING
This text gives a very brief insight to a complex technology.
A more in-depth account of soldering ICs can be found in
our “IC Package Databook” (order code 9398 652 90011).
Wave soldering techniques can be used for all SO
packages if the following conditions are observed:
• A double-wave (a turbulent wave with high upward
pressure followed by a smooth laminar wave) soldering
technique should be used.
DIP
SOLDERING BY DIPPING OR BY WAVE
• The longitudinal axis of the package footprint must be
parallel to the solder flow.
The maximum permissible temperature of the solder is
260 °C; solder at this temperature must not be in contact
with the joint for more than 5 seconds. The total contact
time of successive solder waves must not exceed
5 seconds.
• The package footprint must incorporate solder thieves at
the downstream end.
During placement and before soldering, the package must
be fixed with a droplet of adhesive. The adhesive can be
applied by screen printing, pin transfer or syringe
dispensing. The package can be soldered after the
adhesive is cured.
The device may be mounted up to the seating plane, but
the temperature of the plastic body must not exceed the
specified maximum storage temperature (Tstg max). If the
printed-circuit board has been pre-heated, forced cooling
may be necessary immediately after soldering to keep the
temperature within the permissible limit.
Maximum permissible solder temperature is 260 °C, and
maximum duration of package immersion in solder is
10 seconds, if cooled to less than 150 °C within
6 seconds. Typical dwell time is 4 seconds at 250 °C.
REPAIRING SOLDERED JOINTS
A mildly-activated flux will eliminate the need for removal
of corrosive residues in most applications.
Apply a low voltage soldering iron (less than 24 V) to the
lead(s) of the package, below the seating plane or not
more than 2 mm above it. If the temperature of the
soldering iron bit is less than 300 °C it may remain in
contact for up to 10 seconds. If the bit temperature is
between 300 and 400 °C, contact may be up to 5 seconds.
REPAIRING SOLDERED JOINTS
Fix the component by first soldering two diagonally-
opposite end leads. Use only a low voltage soldering iron
(less than 24 V) applied to the flat part of the lead. Contact
time must be limited to 10 seconds at up to 300 °C. When
using a dedicated tool, all other leads can be soldered in
one operation within 2 to 5 seconds between
270 and 320 °C.
SO
REFLOW SOLDERING
Reflow soldering techniques are suitable for all SO
packages.
Reflow soldering requires solder paste (a suspension of
fine solder particles, flux and binding agent) to be applied
to the printed-circuit board by screen printing, stencilling or
pressure-syringe dispensing before package placement.
1996 Aug 20
15
Philips Semiconductors
Preliminary specification
6-bit analog-to-digital converter with
multiplexer and clamp
TDA8706
DEFINITIONS
Data sheet status
Objective specification
Preliminary specification
Product specification
This data sheet contains target or goal specifications for product development.
This data sheet contains preliminary data; supplementary data may be published later.
This data sheet contains final product specifications.
Limiting values
Limiting values given are in accordance with the Absolute Maximum Rating System (IEC 134). Stress above one or
more of the limiting values may cause permanent damage to the device. These are stress ratings only and operation
of the device at these or at any other conditions above those given in the Characteristics sections of the specification
is not implied. Exposure to limiting values for extended periods may affect device reliability.
Application information
Where application information is given, it is advisory and does not form part of the specification.
LIFE SUPPORT APPLICATIONS
These products are not designed for use in life support appliances, devices, or systems where malfunction of these
products can reasonably be expected to result in personal injury. Philips customers using or selling these products for
use in such applications do so at their own risk and agree to fully indemnify Philips for any damages resulting from such
improper use or sale.
1996 Aug 20
16
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