TDA8792M [NXP]

3.3 V, 25 MHz 8-bit analog-to-digital converter ADC; 3.3V, 25MHz的8位模 - 数转换器ADC
TDA8792M
型号: TDA8792M
厂家: NXP    NXP
描述:

3.3 V, 25 MHz 8-bit analog-to-digital converter ADC
3.3V, 25MHz的8位模 - 数转换器ADC

转换器
文件: 总20页 (文件大小:151K)
中文:  中文翻译
下载:  下载PDF数据表文档文件
INTEGRATED CIRCUITS  
DATA SHEET  
TDA8792  
3.3 V, 25 MHz 8-bit  
analog-to-digital converter (ADC)  
1996 Feb 21  
Product specification  
Supersedes data of 1995 Apr 26  
File under Integrated Circuits, IC02  
Philips Semiconductors  
Product specification  
3.3 V, 25 MHz 8-bit  
analog-to-digital converter (ADC)  
TDA8792  
FEATURES  
APPLICATIONS  
8-bit resolution  
Analog-to-digital conversion for:  
General purpose  
Sampling rate up to 25 MHz  
30 MHz input signal bandwidth (full scale)  
Hand-held equipment  
Mobile telecommunication  
Instrumentation  
High signal-to-noise ratio over a large analog input  
frequency range (7.3 effective bits at 4.43 MHz  
full-scale input at fclk = 25 MHz)  
Video.  
CMOS compatible digital inputs  
External reference voltage regulator  
Power dissipation only 53 mW (typical)  
Standby mode (only 1.2 mW typical)  
GENERAL DESCRIPTION  
The TDA8792 is a 8-bit analog-to-digital converter (ADC)  
for low-voltage, portable applications. It operates at 3.3 V  
and converts the analog input signal into 8-bit  
binary-coded digital words at a maximum sampling rate of  
25 MHz. The output data is valid after a delay of 6 clock  
cycles.  
Low analog input capacitance, no buffer amplifier  
required  
No sample-and-hold circuit required.  
QUICK REFERENCE DATA  
SYMBOL  
VDDA  
PARAMETER  
analog supply voltage  
digital supply voltage  
CONDITIONS  
MIN.  
2.85  
TYP.  
3.3  
MAX.  
3.6  
UNIT  
V
VDDD  
VDDO  
IDDA  
2.70  
2.5  
3.3  
3.3  
12  
3
3.6  
3.6  
20  
6
V
output stages supply voltage  
analog supply current  
digital supply current  
V
mA  
mA  
mA  
IDDD  
IDDO  
output stages supply current  
fclk = 25 MHz; CL = 15 pF;  
ramp input  
1
2
INL  
integral non-linearity  
f
clk = 25 MHz; ramp input  
±0.4  
±0.3  
±0.8  
±0.75  
LSB  
LSB  
MHz  
mW  
DNL  
fclk(max)  
Ptot  
differential non-linearity  
maximum clock frequency  
total power dissipation  
fclk = 25 MHz; ramp input  
25  
fclk = 25 MHz; CL = 15 pF;  
ramp input  
53  
100  
ORDERING INFORMATION  
TYPE  
PACKAGE  
NUMBER  
NAME  
DESCRIPTION  
VERSION  
TDA8792M  
SSOP24  
plastic shrink small outline package; 24 leads; body width 5.3 mm  
SOT340-1  
1996 Feb 21  
2
Philips Semiconductors  
Product specification  
3.3 V, 25 MHz 8-bit  
analog-to-digital converter (ADC)  
TDA8792  
BLOCK DIAGRAM  
n
STDBY  
1
2
24  
23  
CLK  
V
SSO  
V
DDD  
TDA8792  
22  
V
DDO  
V
SSD2  
3
MSB  
V
21 D7  
20 D6  
SSA1  
4
V
I
5
7 x 8  
OFFSET  
COMPENSATED  
COMPARATORS  
8
DECODER  
LATCHES  
19 D5  
18 D4  
17 D3  
16 D2  
15 D1  
V
DDA  
6
I
bias  
7
OUTPUT  
BUFFER  
data outputs  
V
RT  
8
V
9
RM  
REFERENCE  
LADDER  
V
10  
RB  
DAC  
14 D0  
13 OE  
LSB  
V
SSA2 12  
MLD119 - 1  
Fig.1 Block diagram.  
1996 Feb 21  
3
Philips Semiconductors  
Product specification  
3.3 V, 25 MHz 8-bit  
analog-to-digital converter (ADC)  
TDA8792  
PINNING  
SYMBOL PIN  
DESCRIPTION  
standby input  
STDBY  
VDDD  
VSSD2  
VSSA1  
VI  
1
2
3
4
5
6
7
8
9
digital supply voltage (+3.3 V)  
digital ground 2  
analog ground 1  
handbook, halfpage  
1
2
STDBY  
24 CLK  
analog input voltage  
V
23  
22  
21  
20  
V
V
VDDA  
Ibias  
analog supply voltage (+3.3 V)  
bias current input  
SSO  
DDO  
DDD  
3
V
SSD2  
VRT  
reference voltage TOP input  
reference voltage MIDDLE  
V
4
D7  
D6  
SSA1  
VRM  
V
I
5
VRB  
10 reference voltage BOTTOM input  
11 not connected  
6
19 D5  
V
DDA  
TDA8792  
n.c.  
I
D4  
D3  
7
18  
17  
bias  
VSSA2  
OE  
12 analog ground 2  
8
V
RT  
output enable input (CMOS level  
input, active LOW)  
13  
V
9
16 D2  
15 D1  
14 D0  
13 OE  
RM  
D0  
D1  
D2  
D3  
D4  
D5  
D6  
D7  
VDDO  
14 data output; bit 0 (LSB)  
15 data output; bit 1  
16 data output; bit 2  
17 data output; bit 3  
18 data output; bit 4  
19 data output; bit 5  
20 data output; bit 6  
21 data output; bit 7 (MSB)  
V
10  
RB  
n.c. 11  
12  
V
SSA2  
MLD120 - 1  
positive supply voltage for output  
stage (+3.3 V)  
22  
VSSO  
CLK  
23 output ground  
24 clock input  
Fig.2 Pin configuration.  
1996 Feb 21  
4
Philips Semiconductors  
Product specification  
3.3 V, 25 MHz 8-bit  
analog-to-digital converter (ADC)  
TDA8792  
LIMITING VALUES  
In accordance with the Absolute Maximum Rating System (IEC 134).  
SYMBOL  
VDDA  
PARAMETER  
analog supply voltage  
CONDITIONS  
MIN.  
0.5  
MAX.  
+5.0  
UNIT  
note 1  
note 1  
note 1  
V
V
V
V
VDDD  
VDDO  
VDD1  
digital supply voltage  
0.5  
0.5  
0.3  
+5.0  
+5.0  
+0.3  
output stages supply voltage  
supply voltage differences between  
VDD1 = VDDA VDDD  
VDD2  
VDD3  
supply voltage differences between  
VDD2 = VDDD VDDO  
1.0  
1.0  
+1.0  
+1.0  
V
V
supply voltage differences between  
VDD3 = VDDA VDDO  
VI  
input voltage  
referenced to VSSA  
referenced to VSSD  
0.5  
+5.0  
V
V
Vclk(p-p)  
AC input voltage for switching  
(peak-to-peak value)  
VDDD  
IO  
output current  
10  
mA  
°C  
°C  
°C  
Tstg  
Tamb  
Tj  
storage temperature  
operating ambient temperature  
junction temperature  
55  
20  
+150  
+75  
+125  
Note  
1. The supply voltages VDDA, VDDD and VDDO may have any value between 0.5 V and +5.0 V provided that the  
differences VDD1, VDD2 and VDD3 are respected.  
HANDLING  
Inputs and outputs are protected against electrostatic discharges in normal handling. However, to be totally safe, it is  
desirable to take normal precautions appropriate to handling integrated circuits.  
THERMAL CHARACTERISTICS  
SYMBOL  
Rth j-a  
PARAMETER  
VALUE  
UNIT  
thermal resistance from junction to ambient in free air  
119  
K/W  
1996 Feb 21  
5
Philips Semiconductors  
Product specification  
3.3 V, 25 MHz 8-bit  
analog-to-digital converter (ADC)  
TDA8792  
CHARACTERISTICS  
VDDA = V6 to V4,12 = 2.85 to 3.6 V; VDDD = V2 to V3 and V1 = 2.7 to 3.6 V; VDDO = V22 to V23 = 2.5 to 3.6 V;  
VSSA, VSSD and VSSO shorted together; VDDA to VDDD = 0.15 to +0.15 V; fclk = 25 MHz; 50% duty factor; VIL = 0 V;  
VIH = VDDD; CL = 15 pF; Tamb = 0 to +70 °C; typical values measured at VDDA = VDDD = VDDO = 3.3 V and Tamb = 25 °C;  
unless otherwise specified.  
SYMBOL  
Supply  
PARAMETER  
CONDITIONS  
MIN.  
TYP. MAX. UNIT  
VDDA  
VDDD  
VDDO  
IDDA  
analog supply voltage  
2.85  
3.3  
3.3  
3.3  
12  
3
3.6  
3.6  
3.6  
20  
6
V
digital supply voltage  
2.7  
2.5  
V
output stages supply voltage  
analog supply current  
V
mA  
mA  
mA  
IDDD  
digital supply current  
IDDO  
output stages supply current  
CL = 15 pF; ramp input  
1
2
Inputs  
CLOCK INPUT CLK (REFERENCED TO VSSD); note 1  
VIL  
VIH  
IIL  
LOW level input voltage  
HIGH level input voltage  
LOW level input current  
HIGH level input current  
input capacitance  
0
0.8  
VDDD  
V
2.0  
10  
V
Vclk = 0.4 V  
Vclk = 2.7 V  
µA  
µA  
pF  
IIH  
CI  
10  
10  
INPUTS OE AND STDBY (REFERENCED TO VSSD); see Tables 2 and 3  
VIL  
VIH  
IIL  
LOW level input voltage  
HIGH level input voltage  
LOW level input current  
HIGH level input current  
0
0.8  
VDDD  
V
2.0  
10  
V
VIL = 0.4 V  
VIH = 2.7 V  
µA  
µA  
IIH  
+10  
VI (ANALOG INPUT VOLTAGE REFERENCED TO VSSA  
)
IIL  
IIH  
ZI  
LOW level input current  
HIGH level input current  
input impedance  
VI = 0 V  
20  
µA  
µA  
kΩ  
pF  
VI = 1.5 V  
+20  
fi = 4.43 MHz  
fi = 4.43 MHz  
35  
5
CI  
input capacitance  
Reference voltages for the resistor ladder; see Table 1  
VRB  
reference voltage BOTTOM  
reference voltage TOP  
differential reference voltage VRT VRB  
reference current  
0
0.15  
1.6  
1.6  
V
VRT  
1.4  
1.25  
V
Vdiff  
1.5  
1.3  
1250  
1
V
Iref  
mA  
RLAD  
TCRLAD  
resistor ladder  
temperature coefficient of the resistor  
ladder  
/K  
1996 Feb 21  
6
Philips Semiconductors  
Product specification  
3.3 V, 25 MHz 8-bit  
analog-to-digital converter (ADC)  
TDA8792  
SYMBOL  
Outputs  
PARAMETER  
CONDITIONS  
MIN.  
TYP. MAX. UNIT  
DIGITAL OUTPUTS D7 TO D0 (REFERENCED TO VSSO  
)
VOL  
VOH  
IOZ  
LOW level output voltage  
HIGH level output voltage  
output current in 3-state mode  
IO = 1 mA  
0
0.4  
V
IO = 1 mA  
V
DDO 0.4 −  
VDDO  
+10  
V
0.4 V < VO < VDDO  
10  
µA  
Switching characteristics  
CLOCK INPUT CLK (VDDA = 3.15 TO 3.45 V; VDDD = 3.15 TO 3.45 V); see Fig.3 and note 1  
fclk(max)  
fclk(min)  
tCPH  
maximum clock frequency  
minimum clock frequency  
clock pulse width HIGH  
clock pulse width LOW  
25  
0.5  
16  
16  
MHz  
MHz  
ns  
tCPL  
ns  
Analog signal processing  
LINEARITY  
INL  
integral non-linearity  
ramp input  
ramp input  
±0.4  
±0.3  
±0.8  
LSB  
DNL  
differential non-linearity  
±0.75 LSB  
BANDWIDTH (VDDA = 3.15 TO 3.45 V; VDDD = 3.15 TO 3.45 V); TAMB = 25 °C  
B
analog bandwidth  
full-scale sine wave;  
note 2  
20  
30  
35  
MHz  
MHz  
small signal at mid-scale;  
Vi = ±10 LSB at  
code 128; note 2  
tSTLH  
tSTHL  
analog input settling time LOW-to-HIGH full-scale square wave;  
Fig.5; note 3  
8
8
12  
12  
ns  
ns  
analog input settling time HIGH-to-LOW full-scale square wave;  
Fig.5; note 3  
HARMONICS  
h1  
fundamental harmonics (full scale)  
harmonics (full scale); all components  
second harmonics  
fi = 4.43 MHz  
fi = 4.43 MHz  
0
dB  
hall  
61  
61  
58  
dB  
dB  
dB  
third harmonics  
THD  
total harmonic distortion  
fi = 4.43 MHz  
SIGNAL-TO-NOISE RATIO; see Figs 6 and 11; note 4  
S/N  
signal-to-noise ratio (full scale)  
without harmonics;  
fclk = 25 MHz;  
46  
dB  
fi = 4.43 MHz  
1996 Feb 21  
7
Philips Semiconductors  
Product specification  
3.3 V, 25 MHz 8-bit  
analog-to-digital converter (ADC)  
TDA8792  
SYMBOL  
EFFECTIVE BITS; see Figs 6 and 11; note 4  
EB effective bits  
PARAMETER  
CONDITIONS  
MIN.  
TYP. MAX. UNIT  
fclk = 25 MHz  
fi = 2.0 MHz  
fi = 4.43 MHz  
fi = 7.5 MHz  
fi = 10 MHz  
7.4  
7.3  
7.2  
7.0  
bits  
bits  
bits  
bits  
DIFFERENTIAL GAIN; see note 5  
Gdiff  
differential gain  
fclk = 25 MHz;  
PAL modulated ramp  
1.5  
0.5  
%
DIFFERENTIAL PHASE; see note 5  
ϕdiff  
differential phase  
fclk = 25 MHz;  
deg  
PAL modulated ramp  
Timing (fclk = 25 MHz); see Fig.3 and note 6  
tds  
th  
sampling delay time  
output hold time  
6
8
2
ns  
ns  
ns  
td  
output delay time  
13  
25  
3-state output delay times; see Fig.4  
tdZH  
tdZL  
tdHZ  
tdLZ  
enable HIGH  
enable LOW  
disable HIGH  
disable LOW  
17  
22  
20  
22  
28  
30  
28  
30  
ns  
ns  
ns  
ns  
Standby mode output delay times  
tdSTBLH standby (LOW-to-HIGH transition)  
tdSTBHL start-up (HIGH-to-LOW transition)  
200  
ns  
note 7 ns  
Notes  
1. In addition to a good layout of the digital and analog ground, it is recommended that the rise and fall times of the clock  
must not be less than 1 ns.  
2. The analog bandwidth is defined as the maximum full-scale input sine wave frequency which can be applied to the  
device. No glitches greater than 8 LSBs are observed in the reconstructed signal neither is there any significant  
attenuation.  
3. The analog input settling time is the minimum time required for the input signal to be stabilized after a sharp full-scale  
input (square-wave signal) in order to sample the signal and obtain correct output data.  
4. Effective bits are obtained via a Fast Fourier Transform (FFT) treatment taking 8K acquisition points per equivalent  
fundamental period. The calculation takes into account all harmonics and noise up to half of the clock frequency  
(NYQUIST frequency). Conversion to signal-to-noise ratio: S/N = EB × 6.02 + 1.76 dB.  
5. Measurement carried out using video analyser VM700A, where the video analog signal is reconstructed through a  
digital-to-analog converter.  
6. Output data acquisition: the output data is available after the maximum delay time of td. In the event of 25 MHz clock  
operation, the hardware design must be taken into account the td and th limits with respect to the input characteristics  
of the acquisition circuit.  
7000  
------------------------  
clk(MHz)  
7. Maximum value standby mode start-up output delay time (HIGH-to-LOW transition): 100 +  
.
f
1996 Feb 21  
8
Philips Semiconductors  
Product specification  
3.3 V, 25 MHz 8-bit  
analog-to-digital converter (ADC)  
TDA8792  
Table 1 Output coding and input voltage (typical values; referenced to VSSA  
)
BINARY OUTPUT BITS  
STEP  
VI(p-p) (V)  
D7  
D6  
D5  
D4  
D3  
D2  
D1  
D0  
Underflow  
<0  
0
0
0
.
0
0
0
.
0
0
0
.
0
0
0
.
0
0
0
.
0
0
0
.
0
0
0
.
0
0
1
.
0
0
1
.
.
.
.
.
.
.
.
.
.
.
.
.
254  
.
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
0
1
1
255  
1.5  
>1.5  
Overflow  
Table 2 Mode selection  
Table 3 Standby selection  
OE  
1
D7 TO D0  
STDBY  
D7 TO D0  
IDDA + IDDD (typ.)  
0.4 mA  
high impedance  
active; binary  
1
0
LOW  
0
active  
15 mA  
t
CPL  
t
CPH  
1.4 V  
CLK  
sample N  
1
sample N  
2
sample N 6  
V
l
t
t
ds  
h
V
0.4 V  
DDO  
DATA  
D0 to D7  
DATA  
DATA  
DATA  
N 1  
DATA  
N
50%  
N
6
N
5
0.4 V  
t
d
MLD121  
Fig.3 Timing diagram.  
9
1996 Feb 21  
Philips Semiconductors  
Product specification  
3.3 V, 25 MHz 8-bit  
analog-to-digital converter (ADC)  
TDA8792  
V
DDD  
OE  
50 %  
dZH  
t
t
dHZ  
HIGH  
90 %  
output  
data  
50 %  
LOW  
t
t
dZL  
dLZ  
HIGH  
output  
data  
50 %  
LOW  
10 %  
TEST  
S1  
V
DDD  
t
t
t
t
V
DDD  
dLZ  
dZL  
dHZ  
dZH  
3.3 k  
15 pF  
V
DDD  
GND  
GND  
S1  
TDA8792  
OE  
MLD122  
fOE = 100 kHz.  
Fig.4 Timing diagram and test conditions of 3-state output delay time.  
1996 Feb 21  
10  
Philips Semiconductors  
Product specification  
3.3 V, 25 MHz 8-bit  
analog-to-digital converter (ADC)  
TDA8792  
t
t
STLH  
STHL  
50 %  
code 255  
V
I
50 %  
code 0  
2 ns  
2 ns  
CLK  
50 %  
50 %  
MLD123  
2 ns  
2 ns  
Fig.5 Analog input settling-time diagram.  
MLD118  
0
A
(dB)  
20  
40  
60  
80  
100  
120  
0
1.56  
3.13  
4.69  
6.25  
7.82  
9.38  
10.9  
12.5  
f (MHz)  
Effective bits: 7.42; THD = 57.27 dB;  
Harmonic levels (dB): 2nd = 60.76; 3rd = 60.96; 4th = 76.17; 5th = 80.63; 6th = 66.96.  
Fig.6 Typical Fast Fourier Transform (fclk = 25 MHz; fi = 4.43 MHz).  
11  
1996 Feb 21  
Philips Semiconductors  
Product specification  
3.3 V, 25 MHz 8-bit  
analog-to-digital converter (ADC)  
TDA8792  
INTERNAL PIN CONFIGURATIONS  
V
V
DDA  
D7 to D0  
V
I
SSA  
MLD124  
MLD125  
Fig.8 Analog inputs.  
Fig.7 Digital data outputs.  
handbook, halfpage  
V
DDA  
handbook, halfpage  
V
DDD  
V
V
RT  
OE,  
R
LAD  
RM  
CLK or STDBY  
V
RB  
V
SSD  
V
MLD126 - 1  
SSA  
MLC859  
Fig.9 Digital inputs.  
Fig.10 VRB, VRM and VRT.  
V
DDA  
I
bias  
V
SSA  
MLD127  
Fig.11 Bias current input.  
1996 Feb 21  
12  
Philips Semiconductors  
Product specification  
3.3 V, 25 MHz 8-bit  
analog-to-digital converter (ADC)  
TDA8792  
APPLICATION INFORMATION  
STDBY  
CLK  
V
1
2
24  
23  
22  
21  
20  
19  
18  
17  
16  
15  
14  
13  
V
DDD  
SSO  
3.3 V  
V
V
SSD2  
DDO  
3
3.3 V  
100 nF  
V
D7  
D6  
D5  
D4  
D3  
D2  
SSA1  
4
V
I
5
V
DDA  
bias  
6
3.3 V  
100 nF  
TDA8792  
I
7
22 kΩ  
(1)  
RT  
V
3.3 V  
8
100 nF  
(1)  
RM  
100 nF  
100 nF  
V
9
(1)  
V
RB  
D1  
D0  
10  
11  
12  
100 nF  
(2)  
n.c.  
V
SSA2  
OE  
MLD128 - 1  
The analog and digital supplies should be separated and decoupled.  
The external voltage generator must be built such that a good supply voltage ripple rejection is achieved with respect to the LSB value. The reference  
ladder voltages can also be derived from a well regulated VDDA supply through a resistor bridge and a decoupled capacitor.  
For applications where the input signal must remain well centred around middle scale, VRM must be decoupled and connected to analog input signal  
(pin 5) through a resistor. The values must be defined in accordance with the input signal frequency in order to avoid direct coupling into the ADC ladder  
(e.g. R = 5 kand C = 100 nF).  
(1) VRB, VRM and VRT are decoupled to VSSA  
.
(2) Pin 11 should be connected to VSSA in order to prevent noise influence.  
Fig.12 Application diagram.  
1996 Feb 21  
13  
Philips Semiconductors  
Product specification  
3.3 V, 25 MHz 8-bit  
analog-to-digital converter (ADC)  
TDA8792  
PACKAGE OUTLINE  
SSOP24: plastic shrink small outline package; 24 leads; body width 5.3 mm  
SOT340-1  
D
E
A
X
v
c
H
M
A
y
E
Z
24  
13  
Q
A
2
A
(A )  
3
A
1
pin 1 index  
θ
L
p
L
1
12  
detail X  
w
M
b
p
e
0
2.5  
5 mm  
scale  
DIMENSIONS (mm are the original dimensions)  
A
(1)  
(1)  
(1)  
UNIT  
A
A
A
b
c
D
E
e
H
L
L
p
Q
v
w
y
Z
θ
1
2
3
p
E
max.  
8o  
0o  
0.21  
0.05  
1.80  
1.65  
0.38  
0.25  
0.20  
0.09  
8.4  
8.0  
5.4  
5.2  
7.9  
7.6  
1.03  
0.63  
0.9  
0.7  
0.8  
0.4  
mm  
2.0  
0.65  
1.25  
0.25  
0.2  
0.13  
0.1  
Note  
1. Plastic or metal protrusions of 0.20 mm maximum per side are not included.  
REFERENCES  
OUTLINE  
EUROPEAN  
PROJECTION  
ISSUE DATE  
VERSION  
IEC  
JEDEC  
EIAJ  
93-09-08  
95-02-04  
SOT340-1  
MO-150AG  
1996 Feb 21  
14  
Philips Semiconductors  
Product specification  
3.3 V, 25 MHz 8-bit  
analog-to-digital converter (ADC)  
TDA8792  
If wave soldering cannot be avoided, the following  
conditions must be observed:  
SOLDERING SSOP  
Introduction  
A double-wave (a turbulent wave with high upward  
pressure followed by a smooth laminar wave)  
soldering technique should be used.  
There is no soldering method that is ideal for all IC  
packages. Wave soldering is often preferred when  
through-hole and surface mounted components are mixed  
on one printed-circuit board. However, wave soldering is  
not always suitable for surface mounted ICs, or for  
printed-circuits with high population densities. In these  
cases reflow soldering is often used.  
The longitudinal axis of the package footprint must  
be parallel to the solder flow and must incorporate  
solder thieves at the downstream end.  
Even with these conditions, only consider wave  
soldering SSOP packages that have a body width of  
4.4 mm, that is SSOP16 (SOT369-1) or  
SSOP20 (SOT266-1).  
This text gives a very brief insight to a complex technology.  
A more in-depth account of soldering ICs can be found in  
our “IC Package Databook” (order code 9398 652 90011).  
During placement and before soldering, the package must  
be fixed with a droplet of adhesive. The adhesive can be  
applied by screen printing, pin transfer or syringe  
dispensing. The package can be soldered after the  
adhesive is cured.  
Reflow soldering  
Reflow soldering techniques are suitable for all SSOP  
packages.  
Reflow soldering requires solder paste (a suspension of  
fine solder particles, flux and binding agent) to be applied  
to the printed-circuit board by screen printing, stencilling or  
pressure-syringe dispensing before package placement.  
Maximum permissible solder temperature is 260 °C, and  
maximum duration of package immersion in solder is  
10 seconds, if cooled to less than 150 °C within  
6 seconds. Typical dwell time is 4 seconds at 250 °C.  
Several techniques exist for reflowing; for example,  
thermal conduction by heated belt. Dwell times vary  
between 50 and 300 seconds depending on heating  
method. Typical reflow temperatures range from 215 to  
250 °C.  
A mildly-activated flux will eliminate the need for removal  
of corrosive residues in most applications.  
Repairing soldered joints  
Fix the component by first soldering two diagonally-  
opposite end leads. Use only a low voltage soldering iron  
(less than 24 V) applied to the flat part of the lead. Contact  
time must be limited to 10 seconds at up to 300 °C. When  
using a dedicated tool, all other leads can be soldered in  
one operation within 2 to 5 seconds at between 270 and  
320 °C.  
Preheating is necessary to dry the paste and evaporate  
the binding agent. Preheating duration: 45 minutes at  
45 °C.  
Wave soldering  
Wave soldering is not recommended for SSOP packages.  
This is because of the likelihood of solder bridging due to  
closely-spaced leads and the possibility of incomplete  
solder penetration in multi-lead devices.  
1996 Feb 21  
15  
Philips Semiconductors  
Product specification  
3.3 V, 25 MHz 8-bit  
analog-to-digital converter (ADC)  
TDA8792  
DEFINITIONS  
Data sheet status  
Objective specification  
Preliminary specification  
Product specification  
This data sheet contains target or goal specifications for product development.  
This data sheet contains preliminary data; supplementary data may be published later.  
This data sheet contains final product specifications.  
Limiting values  
Limiting values given are in accordance with the Absolute Maximum Rating System (IEC 134). Stress above one or  
more of the limiting values may cause permanent damage to the device. These are stress ratings only and operation  
of the device at these or at any other conditions above those given in the Characteristics sections of the specification  
is not implied. Exposure to limiting values for extended periods may affect device reliability.  
Application information  
Where application information is given, it is advisory and does not form part of the specification.  
LIFE SUPPORT APPLICATIONS  
These products are not designed for use in life support appliances, devices, or systems where malfunction of these  
products can reasonably be expected to result in personal injury. Philips customers using or selling these products for  
use in such applications do so at their own risk and agree to fully indemnify Philips for any damages resulting from such  
improper use or sale.  
1996 Feb 21  
16  
Philips Semiconductors  
Product specification  
3.3 V, 25 MHz 8-bit  
analog-to-digital converter (ADC)  
TDA8792  
NOTES  
1996 Feb 21  
17  
Philips Semiconductors  
Product specification  
3.3 V, 25 MHz 8-bit  
analog-to-digital converter (ADC)  
TDA8792  
NOTES  
1996 Feb 21  
18  
Philips Semiconductors  
Product specification  
3.3 V, 25 MHz 8-bit  
analog-to-digital converter (ADC)  
TDA8792  
NOTES  
1996 Feb 21  
19  
Philips Semiconductors – a worldwide company  
Argentina: IEROD, Av. Juramento 1992 - 14.b, (1428)  
BUENOS AIRES, Tel. (541)786 7633, Fax. (541)786 9367  
Australia: 34 Waterloo Road, NORTH RYDE, NSW 2113,  
Philippines: PHILIPS SEMICONDUCTORS PHILIPPINES Inc.,  
106 Valero St. Salcedo Village, P.O. Box 2108 MCC, MAKATI,  
Metro MANILA, Tel. (63) 2 816 6380, Fax. (63) 2 817 3474  
Tel. (02)805 4455, Fax. (02)805 4466  
Austria: Triester Str. 64, A-1101 WIEN, P.O. Box 213,  
Tel. (01)60 101-1236, Fax. (01)60 101-1211  
Belgium: Postbus 90050, 5600 PB EINDHOVEN, The Netherlands,  
Portugal: PHILIPS PORTUGUESA, S.A.,  
Rua dr. António Loureiro Borges 5, Arquiparque - Miraflores,  
Apartado 300, 2795 LINDA-A-VELHA,  
Tel. (01)4163160/4163333, Fax. (01)4163174/4163366  
Singapore: Lorong 1, Toa Payoh, SINGAPORE 1231,  
Tel. (65)350 2000, Fax. (65)251 6500  
South Africa: S.A. PHILIPS Pty Ltd.,  
Tel. (31)40-2783749, Fax. (31)40-2788399  
Brazil: Rua do Rocio 220 - 5th floor, Suite 51,  
CEP: 04552-903-SÃO PAULO-SP, Brazil,  
P.O. Box 7383 (01064-970),  
195-215 Main Road Martindale, 2092 JOHANNESBURG,  
P.O. Box 7430, Johannesburg 2000,  
Tel. (011)470-5911, Fax. (011)470-5494  
Tel. (011)821-2333, Fax. (011)829-1849  
Canada: PHILIPS SEMICONDUCTORS/COMPONENTS:  
Tel. (800) 234-7381, Fax. (708) 296-8556  
Chile: Av. Santa Maria 0760, SANTIAGO,  
Spain: Balmes 22, 08007 BARCELONA,  
Tel. (03)301 6312, Fax. (03)301 42 43  
Sweden: Kottbygatan 7, Akalla. S-164 85 STOCKHOLM,  
Tel. (0)8-632 2000, Fax. (0)8-632 2745  
Switzerland: Allmendstrasse 140, CH-8027 ZÜRICH,  
Tel. (02)773 816, Fax. (02)777 6730  
China/Hong Kong: 501 Hong Kong Industrial Technology Centre,  
72 Tat Chee Avenue, Kowloon Tong, HONG KONG,  
Tel. (852)2319 7888, Fax. (852)2319 7700  
Tel. (01)488 2211, Fax. (01)481 77 30  
Taiwan: PHILIPS TAIWAN Ltd., 23-30F, 66, Chung Hsiao West  
Road, Sec. 1. Taipeh, Taiwan ROC, P.O. Box 22978,  
TAIPEI 100, Tel. (886) 2 382 4443, Fax. (886) 2 382 4444  
Colombia: IPRELENSO LTDA, Carrera 21 No. 56-17,  
77621 BOGOTA, Tel. (571)249 7624/(571)217 4609,  
Fax. (571)217 4549  
Thailand: PHILIPS ELECTRONICS (THAILAND) Ltd.,  
209/2 Sanpavuth-Bangna Road Prakanong,  
Bangkok 10260, THAILAND,  
Tel. (66) 2 745-4090, Fax. (66) 2 398-0793  
Turkey:Talatpasa Cad. No. 5, 80640 GÜLTEPE/ISTANBUL,  
Tel. (0212)279 27 70, Fax. (0212)282 67 07  
Ukraine: Philips UKRAINE, 2A Akademika Koroleva str., Office 165,  
Denmark: Prags Boulevard 80, PB 1919, DK-2300  
COPENHAGEN S, Tel. (45)32 88 26 36, Fax. (45)31 57 19 49  
Finland: Sinikalliontie 3, FIN-02630 ESPOO,  
Tel. (358)0-615 800, Fax. (358)0-61580 920  
France: 4 Rue du Port-aux-Vins, BP317,  
92156 SURESNES Cedex,  
Tel. (01)4099 6161, Fax. (01)4099 6427  
Germany: P.O. Box 10 51 40, 20035 HAMBURG,  
252148 KIEV, Tel. 380-44-4760297, Fax. 380-44-4766991  
United Kingdom: Philips Semiconductors LTD.,  
276 Bath Road, Hayes, MIDDLESEX UB3 5BX,  
Tel. (0181)730-5000, Fax. (0181)754-8421  
United States:811 East Arques Avenue, SUNNYVALE,  
CA 94088-3409, Tel. (800)234-7381, Fax. (708)296-8556  
Uruguay: Coronel Mora 433, MONTEVIDEO,  
Tel. (040)23 53 60, Fax. (040)23 53 63 00  
Greece: No. 15, 25th March Street, GR 17778 TAVROS,  
Tel. (01)4894 339/4894 911, Fax. (01)4814 240  
India: Philips INDIA Ltd, Shivsagar Estate, A Block,  
Dr. Annie Besant Rd. Worli, Bombay 400 018  
Tel. (022)4938 541, Fax. (022)4938 722  
Indonesia: Philips House, Jalan H.R. Rasuna Said Kav. 3-4,  
P.O. Box 4252, JAKARTA 12950,  
Tel. (02)70-4044, Fax. (02)92 0601  
Tel. (021)5201 122, Fax. (021)5205 189  
Ireland: Newstead, Clonskeagh, DUBLIN 14,  
Tel. (01)7640 000, Fax. (01)7640 200  
Italy: PHILIPS SEMICONDUCTORS S.r.l.,  
Piazza IV Novembre 3, 20124 MILANO,  
Tel. (0039)2 6752 2531, Fax. (0039)2 6752 2557  
Japan: Philips Bldg 13-37, Kohnan2-chome, Minato-ku, TOKYO 108,  
Tel. (03)3740 5130, Fax. (03)3740 5077  
Korea: Philips House, 260-199 Itaewon-dong,  
Internet: http://www.semiconductors.philips.com/ps/  
For all other countries apply to: Philips Semiconductors,  
International Marketing and Sales, Building BE-p,  
P.O. Box 218, 5600 MD EINDHOVEN, The Netherlands,  
Telex 35000 phtcnl, Fax. +31-40-2724825  
Yongsan-ku, SEOUL, Tel. (02)709-1412, Fax. (02)709-1415  
SCDS47  
© Philips Electronics N.V. 1996  
Malaysia: No. 76 Jalan Universiti, 46200 PETALING JAYA,  
SELANGOR, Tel. (03)750 5214, Fax. (03)757 4880  
Mexico: 5900 Gateway East, Suite 200, EL PASO, TX 79905,  
Tel. 9-5(800)234-7381, Fax. (708)296-8556  
Netherlands: Postbus 90050, 5600 PB EINDHOVEN, Bldg. VB,  
Tel. (040)2783749, Fax. (040)2788399  
New Zealand: 2 Wagener Place, C.P.O. Box 1041, AUCKLAND,  
All rights are reserved. Reproduction in whole or in part is prohibited without the  
prior written consent of the copyright owner.  
The information presented in this document does not form part of any quotation  
or contract, is believed to be accurate and reliable and may be changed without  
notice. No liability will be accepted by the publisher for any consequence of its  
use. Publication thereof does not convey nor imply any license under patent- or  
other industrial or intellectual property rights.  
Tel. (09)849-4160, Fax. (09)849-7811  
Norway: Box 1, Manglerud 0612, OSLO,  
Printed in The Netherlands  
Tel. (022)74 8000, Fax. (022)74 8341  
Pakistan: Philips Electrical Industries of Pakistan Ltd.,  
Exchange Bldg. ST-2/A, Block 9, KDA Scheme 5, Clifton,  
KARACHI 75600, Tel. (021)587 4641-49,  
Fax. (021)577035/5874546  
537021/1100/02/pp20  
Date of release: 1996 Feb 21  
9397 750 00675  
Document order number:  

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