TDA9845T [NXP]
TV and VTR stereo/dual sound processor with digital identification; 电视和录像机立体声/数字标识的双音频处理器
| 型号： | TDA9845T |
| 厂家： | 
NXP |
| 描述： | TV and VTR stereo/dual sound processor with digital identification |
| 文件： | 总20页 (文件大小：180K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
INTEGRATED CIRCUITS
DATA SHEET
TDA9845
TV and VTR stereo/dual sound
processor with digital identification
1995 Mar 20
Preliminary specification
Supersedes data of January 1993
File under Integrated Circuits, IC02
Philips Semiconductors
Philips Semiconductors
Preliminary specification
TV and VTR stereo/dual sound processor
with digital identification
TDA9845
FEATURES
GENERAL DESCRIPTION
• Supply voltage 5 to 8 V
• Source selector
The TDA9845 is a stereo/dual sound processor for TV and
VTR sets. Its identification ensures safe operation by using
internal digital PLL technique with extremely small
bandwidth, synchronous detection and digital integration
(switching time maximum 2.1 s; identification concerning
the main functions).
• Stereo matrix
• AF input for mono source
• AF outputs for Main
• LED operation mode indication (stereo and dual)
• High identification reliability.
QUICK REFERENCE DATA
SYMBOL
VP
PARAMETER
supply voltage (pin 18)
supply current (pin 18)
CONDITIONS
MIN. TYP. MAX.
UNIT
4.5
12
5
8.8
V
IP
without LED current
54% modulation
B/G
13
16.5
mA
Vi(rms)
nominal input signal voltage
(Vi 1, Vi 2, Vi 3) (RMS value)
−
−
−
250
500
500
−
−
−
mV
mV
mV
L (only for Vi 1)
54% modulation
Vo(rms)
Vo(rms)
nominal output signal voltage
(RMS value)
clipping level of the output signal
voltages (RMS value)
THD ≤1.5%
VP = 5 V
1.4
2.4
−
1.6
2.65
−
−
V
VP = 8 V
−
V
ILON
Vi pil
input current
LED ON
12
100
mA
mV
input voltage sensitivity of pilot
frequency
unmodulated
5
−
S/N(W)
THD
weighted signal-to-noise ratio
total harmonic distortion
“CCIR468-3”
66
−
75
0.2
−
−
dB
%
0.3
+70
2.2
2.3
2.1
−
Tamb
operating ambient temperature range
identification window width
0
°C
fident
STEREO
DUAL
2.2
2.3
0.35
−
−
Hz
Hz
s
−
tident ON
Vi tuner
∆fpil
total identification time ON
−
identification voltage sensitivity
pull-in frequency range of pilot PLL
28
dBµV
fω = 10.008 MHz
lower side
−296
−
−
−296 Hz
upper side
302
302
Hz
ORDERING INFORMATION
TYPE
PACKAGE
NUMBER
NAME
DESCRIPTION
VERSION
TDA9845
DIP20
SO20
plastic dual in-line package; 20 leads (300 mil)
plastic small outline package; 20 leads; body width 7.5 mm
SOT146-1
SOT163-1
TDA9845T
1995 Mar 20
2
Philips Semiconductors
Preliminary specification
TV and VTR stereo/dual sound processor
with digital identification
TDA9845
BLOCK DIAGRAMS
EMD64-1
f
+
+
+
1995 Mar 20
3
Philips Semiconductors
Preliminary specification
TV and VTR stereo/dual sound processor
with digital identification
TDA9845
EMD64-51
b
+
+
+
1995 Mar 20
4
Philips Semiconductors
Preliminary specification
TV and VTR stereo/dual sound processor
with digital identification
TDA9845
PINNING
SYMBOL
PIN
DESCRIPTION
control input Port C1
C1
1
2
3
4
5
6
7
8
C2
control input Port C2
CAGC
CLP
CDCL
Vi pil
Cref
Vi 1
AGC capacitor of pilot frequency amplifier
identification low-pass capacitor
DC loop capacitor
fpage
C1
C2
1
2
20 C3
19 XTAL
pilot frequency input voltage
capacitor of reference voltage (1⁄2VP)
C
V
3
18
17
AGC
P
C
C
4
LP
D2
AF input signal voltage 1 (from sound carrier 1 or
AM sound (standard L)
C
5
16 GND
DCL
TDA9845
V
i pil
6
15 LEDST
14 LEDDU
Vi 2
9
AF input signal voltage 2 (from sound carrier 2)
AF input signal voltage 3 (Mono sound)
AF output signal voltage 2 (Main)
AF output signal voltage 1 (Main)
50 µs de-emphasis capacitor of AF Channel 1
LED (dual)
C
Vi 3
10
11
12
13
14
15
16
17
18
19
20
7
ref
Vo 2
V
C
V
8
13
12
11
i 1
i 2
i 3
D1
Vo 1
V
V
9
o 1
CD1
V
10
o 2
LEDDU
LEDST
GND
CD2
MED646
LED (stereo)
ground (0 V)
50 µs de-emphasis capacitor of AF Channel 2
supply voltage (+5 to +8 V)
10 MHz crystal input
VP
XTAL
C3
Fig.3 Pin configuration.
control input Port C3
1995 Mar 20
5
Philips Semiconductors
Preliminary specification
TV and VTR stereo/dual sound processor
with digital identification
TDA9845
The identification signal is amplified and fed through an
AGC low-pass filter with external capacitor CAGC (pin 3) to
obtain the AGC voltage for controlling the gain of the pilot
signal amplifier.
FUNCTIONAL DESCRIPTION
AF signal handling
The input AF signals, derived from the two sound carriers,
are processed in analog form using operational amplifiers.
Dematrixing uses the technique of two amplifiers
processing the AF signals. Finally, a source selector
provides the facility to route the mono signal through to the
outputs (‘forced mono’).
The identification stages consist of two digital PLL circuits
with digital synchronous demodulation and digital
integrators to generate the stereo or dual sound
identification bits which can be indicated via LEDs.
A 10 MHz crystal oscillator provides the reference clock
frequency. The corresponding detection bandwidth is
larger than ±50 Hz for the pilot carrier signal, so that
fp-variations from the transmitter can be tracked in the
event of missing synchronization with the horizontal
frequency fH. However the detection bandwidth for the
identification signal is made small (±1 Hz) to reduce
mis-identification.
De-emphasis is performed by two RC low-pass filter
networks with internal resistors and external capacitors.
This provides a frequency response with the tolerances
given in Fig.4.
A source selector, controlled via the control input ports
allows selection of the different modes of operation in
accordance with the transmitted signal. The device was
designed for a nominal input signal (FM: 54% modulation
is equivalent to ∆f = ±27 kHz) of 250 mV RMS (Vi 1, Vi 2)
and for a nominal input signal (AM: m = 0.54) of 500 mV
RMS (Vi 1), respectively 250 mV RMS (Vi 3). A nominal
gain of 6 dB for Vi 1 and Vi 2 signals (0 dB for Vi 1 signal
(AM sound)) and 6 dB for Vi 3 signal is built-in. By using
rail-to-rail operational amplifiers, the clipping level
(THD ≤1.5%) is 1.60 V RMS for VP = 5 V and 2.65 V RMS
for VP = 8 V at outputs Vo 1, Vo 2. Care has been taken to
minimize switching plops. Also total harmonic distortion
and random noise are considerably reduced.
Figure 2 shows an example of the alignment-free fp
band-pass filter. To achieve the required QL of around 12,
the Q0 at fp of the coil was chosen to be around 25
(effective Q0 including PCB influence). Using coils with
other Q0, the RC-network (RFP, CFP) has to be adapted
accordingly. It is assumed that the loss factor tanδ of the
resonance capacitor is ≤0.01 at fp.
Copper areas under the coil might influence the loaded Q
and have to be taken into account. Care has also to be
taken in environments with strong magnetic fields when
using coils without magnetic shielding.
Identification
Control input ports
The pilot signal is fed via an external RC high-pass filter
and single tuned LC band-pass filter to the input of a gain
controlled amplifier. The external LC band-pass filter in
combination with the external RC high-pass filter should
have a loaded Q-factor of approximately 40 to 50 to
ensure the highest identification sensitivity. By using a
fixed coil (±5%) to save the alignment (see Fig.2), a
Q-factor of approximately 12 is proposed. This may cause
a loss in sensitivity of approximately 2 to 3 dB. A digital
PLL circuit generates a reference carrier, which is
synchronized with the pilot carrier. This reference carrier
and the gain controlled pilot signal are fed to the
AM-synchronous demodulator. The demodulator detects
the identification signal, which is fed through a low-pass
filter with external capacitor CLP (pin 4) to a Schmitt-trigger
for pulse shaping and suppression of low level spurious
signal components. This is a measure against
The complete IC is controlled by the three control input
ports C1, C2 and C3 (TTL-level). With these ports the user
can select between different AF sources according to the
transmitter status (see Table 1). Finally Schmitt-triggers
are added in the input port interfaces to suppress spikes
from the control lines C1, C2 and C3.
After a power-on reset, the logic is reset (mute mode for
the AF channel). After some time (≤1 ms), when the
power-on reset is automatically deactivated, the switch
position of the Main channel is changed according to the
control input port levels C1, C2 and C3.
For standard L, the AM sound is fed via the AF input (Vi 1)
to the two AF outputs (Vo 1,Vo 2). This can also be
achieved by feeding at AF input Vi 3.
The logic level combination 111 of the control input ports
(C3, C2 and C1) is not allowed (see Table 1).
mis-identification.
1995 Mar 20
6
Philips Semiconductors
Preliminary specification
TV and VTR stereo/dual sound processor
with digital identification
TDA9845
Power supply
ESD protection
All pins are ESD protected. The protection circuits
The different supply voltages and currents required for the
analog and digital circuits are derived from an internal
band-gap reference circuit. The AF reference voltage is
1⁄2VP. For a fast setting to 1⁄2VP an internal start-up circuit
is added. A good ripple rejection is achieved with the
external capacitor Cref = 100 µF/16 V in conjunction with
the high ohmic input of the 1⁄2VP pin (pin 7). No additional
DC load on this pin is allowed.
represent the latest state of the art.
Internal circuit
The internal pin loading diagram is given in Fig.7.
Power-on reset
When a power-on reset is activated by switching on the
supply voltage or because of a supply voltage breakdown,
the 117/274 Hz DPLL, the 117/274 Hz integrator and the
logic will be reset. The AF channel (Main) is muted
(≤1 ms).
LIMITING VALUES
In accordance with the Absolute Maximum Rating System (IEC 134).
SYMBOL
PARAMETER
supply voltage (pin 18)
CONDITIONS
MIN.
−0.3
MAX.
10
UNIT
VP
Vi
V
voltage at pins 1, 2 and 20
voltage at pins 3 to 13, 17 and 19
voltage at pins 14 and 15
−0.3
−0.3
−0.3
−25
0
9.0
V
Vi
VP
V
Vi
10
V
Tstg
storage temperature
+150
+70
+500
°C
°C
V
Tamb
Vesd
operating ambient temperature
electrostatic handling for all pins
note 1
−500
Note
1. Charge device model class A: discharging a 200 pF capacitor through a Ω series resistor.
THERMAL CHARACTERISTICS
SYMBOL
Rth j-a
PARAMETER
VALUE
UNIT
thermal resistance from junction to ambient in free air
DIP20
SO20
73
90
K/W
K/W
1995 Mar 20
7
Philips Semiconductors
Preliminary specification
TV and VTR stereo/dual sound processor
with digital identification
TDA9845
CHARACTERISTICS
VP = 5 V; Tamb = +25 °C; nominal input signal Vi 1, 2 = 0.25 V RMS value (FM: 54% modulation is equivalent to
∆f = ±27 kHz); nominal input signal Vi 1 = 0.5 V RMS value (AM: m = 0.54); nominal input signal Vi 3 = 0.25 V RMS
value (AM: m = 0.54); nominal output signal Vo 1, 2 = 0.5 V RMS value; fAF = 1 kHz; Vi pil = 16 mV RMS value;
fpil = 54.6875 kHz (identification frequencies: stereo = 117.48 Hz, dual = 274.12 Hz), 50 µs pre-emphasis;
noise measurement in accordance with “CCIR468-3”, working oscillator frequency fω = 10008 MHz;
currents into the IC positive; measured in test circuit Fig.5 unless otherwise specified.
SYMBOL
Supply
PARAMETER
CONDITIONS
MIN.
TYP.
MAX.
UNIT
VP
supply voltage (pin 18)
supply current (pin 18)
total power dissipation
4.5
12
54
5
8.8
V
IP
without LED current
13
65
16.5
mA
mW
V
Ptot
Vn(DC)
145.2
1⁄2VP + 0.1
DC voltage
1⁄2VP − 0.1 1⁄2VP
(pins 8 to 13 and 17)
Vref(DC)
lL(DC)
DC reference voltage (pin 7)
DC leakage current (pin 7)
1⁄2VP − 0.1 1⁄2VP
1⁄2VP + 0.1
±1
V
−
−
µA
AF Inputs; Vi 1 and Vi 2 (pins 8 and 9)
Vi(rms)
nominal input signal voltage 54% modulation
(RMS value)
B/G
−
−
0.25
0.5
−
−
V
V
L (only Vi 1)
Vi(rms)
clipping voltage level
(RMS value)
THD ≤ 1.5%
VP = 5 V; B/G
VP = 8 V; B/G
VP = 5 V; L (only Vi 1)
VP = 8 V; L (only Vi 1)
G = Vo/Vi; note 1
B/G
0.625
1.050
1.200
2.100
0.715
1.200
1.600
2.356
−
−
−
−
V
V
V
V
Gv
AF signal voltage gain
input resistance
5
6
7
dB
dB
kΩ
kΩ
L (only Vi 1)
−1
40
4.25
0
+1
60
5.75
Ri
50
5.0
Rdeem
internal de-emphasis resistor see Fig.4
(pins 13 and 17)
Additional AF input pin (pin 10)
Vi(rms) nominal input signal voltage 54% modulation
−
0.25
−
−
V
(RMS value)
Vi(rms)
clipping voltage level
(RMS value)
THD ≤ 1.5%
VP = 5 V
0.625
1.050
0.715
1.200
V
V
VP = 8 V
Gv
Ri
AF signal voltage gain
input resistance
5
6
7
dB
G = Vo/Vi; note 1
40
50
60
kΩ
1995 Mar 20
8
Philips Semiconductors
Preliminary specification
TV and VTR stereo/dual sound processor
with digital identification
TDA9845
SYMBOL
AF outputs (pins 11 and 12)
Vo(rms) nominal output signal voltage THD ≤ 0.3%;
PARAMETER
CONDITIONS
MIN.
TYP.
MAX.
UNIT
−
0.5
−
V
(RMS value)
54% modulation
Vo(rms)
clipping voltage level
(RMS value)
THD ≤ 1.5%
VP = 5 V
1.4
2.4
1.6
−
−
V
VP = 8 V
2.65
250
−
V
Ro
CL
RL
output resistance
150
−
350
1.5
−
Ω
load capacitor on output
nF
kΩ
load resistor on output
(AC-coupled)
10
−
B
frequency response
(bandwidth)
fi = 40 to 20000 Hz;
note 2
−0.5
−
+0.5
dB
B−3 dB
THD
frequency response
−3 dB; note 2
300
−
350
0.2
75
400
0.3
−
kHz
%
total harmonic distortion
note 1
S/N(W)
weighted signal-to-noise
ratio
“CCIR468-3”
(quasi-peak)
66
dB
αcr
crosstalk attenuation for
DUAL
notes 1 and 3
Zs ≤ 1 kΩ
70
40
76
−
75
45
80
−
−
dB
dB
dB
mV
STEREO
Zs ≤ 1 kΩ
−
αmute
mute attenuation
Zs ≤ 1 kΩ; note 1
after switching
−
∆VDC
change of DC level output
voltage between any two
modes of operation
±10
PSRR
IO(DC)
power supply ripple rejection fr = 70 Hz; see Fig.6
DC output current
50
65
−
dB
−
−
±20
µA
10 MHz crystal oscillator (pin 19)
fr
series resonant frequency of CL = 20 pF
crystal (fundamental mode)
9.995
9.988
10.008
10.008
10.021
10.028
MHz
MHz
fω
working oscillator frequency over operating
(running in parallel
resonance mode)
temperature range
including ageing and
influence of drive circuit
Rr
equivalent crystal series
resistance
even at extremely low
drive level (<1 pW) over
operating temperature
range with C0 = 6 pF
−
60
200
Ω
Rn
crystal series resistance of
unwanted mode
2 × Rr
−
−
Ω
C0
crystal parallel capacitance
crystal motional capacitance
level of drive in operation
with Rr ≤ 100 Ω
−
6
10
50
5
pF
fF
C1
−
25
−
PXTAL
−
µW
mV
VOSC(p-p) oscillator operating voltage
(peak-to-peak value)
500
550
600
1995 Mar 20
9
Philips Semiconductors
Preliminary specification
TV and VTR stereo/dual sound processor
with digital identification
TDA9845
SYMBOL
PARAMETER
CONDITIONS
MIN.
TYP.
MAX.
UNIT
Pilot processing
Vi pil(rms)
pilot input voltage level at
pin 6 (RMS value)
unmodulated
5
−
100
mV
Ri pil
Ci pil
m
pilot input resistance
pilot input capacitance
modulation depth
500
−
1000
−
−
kΩ
pF
%
3
AM
25
50
75
∆fpil
pilot PLL pull-in frequency
range (referenced to
fpil = 54.6875 kHz)
fω = 9.988 MHz
lower side
−405
−
−
−405
Hz
Hz
upper side
fω = 10.008 MHz
lower side
192
192
−296
−
−
−296
Hz
Hz
upper side
fω = 10.028 MHz
lower side
302
302
−188
411
0
−
−188
411
1.7
Hz
Hz
ms
Hz
upper side
−
tpil
pilot PLL pull-in time
−
fLP
low-pass frequency
response
−3 dB
450
600
750
R4
low-pass output resistance
18.75
25
31.25
70
kΩ
V4(rms)
identification threshold
voltage (RMS value)
−
−
mV
QL
loaded quality factor of
resonance circuit
HIGH sensitivity;
see Fig.1
40
−
50
loaded quality factor of
resonance circuit with fixed
coil
sensitivity loss 2 to 3 dB;
see Fig.2
−
12
−
tacqui AGC AGC acquisition time
Vi pil(rms) switched from
0 to 100 mV RMS value
−
−
0.1
s
Identification (internal functions)
Vi tuner
identification voltage
sensitivity
note 4
−
−
−
28
33
−
−
−
2
dBµV
dB/Hz
dB
C/N
pilot carrier-to-noise ratio for note 5
start of identification
H
hysteresis
note 4
fdet
pull-in frequency range of
identification PLL
(referenced to
fdet STEREO = 117.48 Hz and
fdet DUAL = 274.12 Hz)
lower side
STEREO
DUAL
−0.63
−0.69
−
−
−0.63
−0.69
Hz
Hz
upper side
STEREO
DUAL
0.63
0.69
−
−
0.63
0.69
Hz
Hz
1995 Mar 20
10
Philips Semiconductors
Preliminary specification
TV and VTR stereo/dual sound processor
with digital identification
TDA9845
SYMBOL
PARAMETER
CONDITIONS
STEREO
MIN.
TYP.
MAX.
UNIT
tdet
pull-in time of identification
PLL (referenced to
det STEREO = 117.48 Hz and
0
0
−
−
0.8
0.8
s
s
DUAL
f
fdet DUAL = 274.12 Hz)
fident
identification window
STEREO; note 6
DUAL; note 6
2.2
2.3
−
−
2.2
2.3
Hz
Hz
frequency width (referenced
to fdet STEREO = 117.48 Hz
and fdet DUAL = 274.12 Hz)
tintegr
integrator time constant
total identification time on
0.94
0.35
0.35
0.60
0.60
−
−
−
−
−
0.94
2.0
2.0
1.5
1.5
s
s
s
s
s
tident(on)
STEREO; note 7
DUAL; note 7
tident(off)
total identification time off
STEREO; note 8
DUAL; note 8
LED (pins 14 and 15)
VL(off)
VL(on)
IL(off)
IL(on)
output voltage
output voltage
input current
input current
LED off
LED on
LED off
LED on
−
−
−
−
−
−
−
−
8.8
0.7
1
V
V
µA
mA
12
Control input ports C1, C2 and C3 (pins 1, 2 and 20)
VCL
VCH
ICL
LOW level input voltage
HIGH level input voltage
LOW level input current
HIGH level input current
0
−
−
−
−
0.8
8.8
−1
1
V
2.4
−
V
µA
µA
ICH
−
Notes
1. Vo = 0.5 V RMS value; f = 1 kHz.
2. Without de-emphasis capacitors with respect to nominal gain.
3. In dual mode: A (B)-signal into B (A) channel.
In stereo mode: R-signal into left channel; L-signal = 0.
4. Tuner input signal, measured with PCALH reference front end (1⁄2EMF, 75 Ω, 2T/20T/white bar, 100% video) and
PC/SC1 = 13 dB; PC/SC2 = 20 dB. The pilot band-pass has to be aligned.
5. Bandwidth of the pilot BP-filter B−3 dB = 1.2 kHz. Vi 2 input driven with identification-modulated pilot carrier and white
noise.
6. Identification window is defined as twice the pull-in frequency range (lower plus upper side) of identification PLL
(steady detection) plus window increase due to integrator (fluctuating detection).
7. The maximum total system identification time ON is equal to tident(on) plus tacqui AGC
.
8. The maximum total system identification time OFF is equal to tident(off)
.
1995 Mar 20
11
Philips Semiconductors
Preliminary specification
TV and VTR stereo/dual sound processor
with digital identification
TDA9845
Table 1 Control input port matrix to select AF inputs and AF outputs
INPUT SIGNAL
ST/DS/M EXT
Vi 1 Vi 2 Vi 3
OUTPUT SIGNAL
MAIN
CONTROL INPUT
PORT(1)
LED
INPUT/OUTPUT MODE
Vo 1
PIN 8 PIN 9 PIN 10 PIN 12
Vo 2
C3
C2
C1
DUAL STEREO
PIN 15
PIN 11 PIN 20 PIN 2 PIN 1 PIN 14
Mute; note 2
Sound mute
Mono
−
−
−
−
−
−
−
−
−
−
−
−
−
−
C
C
no signal
0
1
0
0
0
0
0
0
0
0
0
1
1
0
0
0
1
1
0
1
1
0
1
1
0
1
0
0
1
0
1
1
0
1
1
0
1
1
0
OFF
note 3
OFF
OFF
OFF
OFF
OFF
OFF
ON
OFF
−
−
−
no signal
note 3
OFF
OFF
OFF
ON
M
M
M
AM
S
S
S
A
A
A
−
−
M
M
AM
L
M
M
AM
R
S
−
−
Stereo
Dual
ST
DS
−
R
R
R
B
B
B
−
S
ON
S
S
ON
A
B
OFF
OFF
OFF
note 3
OFF
A
A
ON
B
B
ON
External; note 4
C
C
C
C
note 3
OFF
−
−
Notes
1. The combination 111 is not allowed.
2. In mute mode the content of the 117 Hz/274 Hz integrator will be reset. The LEDs are switched OFF.
3. The LED show the identification status.
4. In external mode, in the combination 110 only the LEDs are switched OFF.
Table 2 Explanation of Table 1
SIGNAL
DESCRIPTION
R
L
right
left
S
(L + R)
--------------------
2
A and B
C
dual sound A/B
external sound source
AM sound (standard L)
mono sound
AM
M
DS
dual sound
ST
stereo sound
1995 Mar 20
12
Philips Semiconductors
Preliminary specification
TV and VTR stereo/dual sound processor
with digital identification
TDA9845
MED647
+2
V
R: −15%;
C: −5%
oAF
(dB)
+1
0
−1
−2
R: +15%;
C: +5%
2
3
4
5
10
10
10
10
10
f
(Hz)
oAF
Fig.4 Tolerance scheme of AF frequency response; de-emphasis with CD1, CD2 = 10 nF (±5%),
internal = 5 kΩ (±15%).
R
1995 Mar 20
13
Philips Semiconductors
Preliminary specification
TV and VTR stereo/dual sound processor
with digital identification
TDA9845
C1
C2
C3 control input port
10 MHz
1
2
3
20
19
18
control input
ports
XTAL
V
P
10 µF
10 nF
C
C
C
C
AGC
LP
VP
10 µF
5%
C
50 µs
4
17
16
15
14
13
12
de-emphasis
D2 10 nF
100 nF
DCL
1/2 V
5
P
TDA9845
stereo transmission
6
1 kΩ
2.5
mH
3.3
nF
V
P
47 pF
7
dual transmission
30 kΩ
2.2 kΩ
5%
C
AF from 5.5 MHz
or from AM demodulator (L)
50 µs
V
V
V
8
i 1
de-emphasis
D1 10 nF
2.2 kΩ
AF from 5.742 MHz
i 2
i 3
9
V
V
o 1
o 2
main
from external sound source
10
11
3 x 2.2 µF
MED648 - 1
Fig.5 Test circuit of the stereo decoder TDA9845.
V
o 1
12
V
V
B
P
18
measurements
on outputs
TDA9845
V
o 2
10 k
Ω
11
8
7
9
10
16
100 µF
5 V modulated
with 200 mV (p-p)
100 µF/
16 V
100 µF
70 Hz
MED650 - 1
Fig.6 Test circuit for measurement of ripple rejection.
14
1995 Mar 20
Philips Semiconductors
Preliminary specification
TV and VTR stereo/dual sound processor
with digital identification
TDA9845
INTERNAL CIRCUITRY
V
P
V
P
3 µA
2 kΩ
3 µA
20
19
C3
2 kΩ
1
C1
XTAL
–
+
3 pF
V
P
13 kΩ
+5 V
18
17
5 kΩ
3 µA
V
P
2 kΩ
2
C2
C
+
–
5 kΩ
C
D2
60 µA
TDA9845
25 kΩ
3
4
V
–
+
P
AGC
V
GND
V
P
16
15
P
C
LP
V
V
40 µA
25 kΩ
P
P
LEDST
60 µA
1/2 V
P
5
C
DCL
V
P
25 kΩ
14
13
LEDDU
40 µA
5 kΩ
5 kΩ
V
i pil
6
7
+
5 kΩ
C
ref
C
D1
–
22.5 kΩ
I
B
5 kΩ
5 kΩ
–
+
V
P
8
9
V
i 1
V
P
50 k
50 k
Ω
AF inputs
I
B
100 Ω
12
11
1/2 V
P
V
o 1
V
i 2
V
P
Ω
200 µA
I
B
AF outputs
1/2 V
P
100 Ω
V
10
o 2
V
i 3
50 kΩ
1/2 V
I
B
200 µA
P
MED649 - 1
V
P
ESD protection diode
for pins 3 to 13, 17 and 19
zener diode protection
for pins 1, 2, 14, 15, 18 and 20
Fig.7 Internal circuitry.
15
1995 Mar 20
Philips Semiconductors
Preliminary specification
TV and VTR stereo/dual sound processor
with digital identification
TDA9845
PACKAGE OUTLINES
DIP20: plastic dual in-line package; 20 leads (300 mil)
SOT146-1
D
M
E
A
2
A
A
1
L
c
e
w M
Z
b
1
(e )
1
b
M
H
20
11
pin 1 index
E
1
10
0
5
10 mm
scale
DIMENSIONS (inch dimensions are derived from the original mm dimensions)
(1)
A
A
A
(1)
(1)
Z
1
2
UNIT
mm
b
b
c
D
E
e
e
1
L
M
M
H
w
1
E
max.
min.
max.
max.
1.73
1.30
0.53
0.38
0.36
0.23
26.92
26.54
6.40
6.22
3.60
3.05
8.25
7.80
10.0
8.3
4.2
0.51
3.2
2.54
0.10
7.62
0.30
0.254
0.01
2.0
0.068
0.051
0.021
0.015
0.014
0.009
1.060
1.045
0.25
0.24
0.14
0.12
0.32
0.31
0.39
0.33
inches
0.17
0.020
0.13
0.078
Note
1. Plastic or metal protrusions of 0.25 mm maximum per side are not included.
REFERENCES
OUTLINE
EUROPEAN
PROJECTION
ISSUE DATE
VERSION
IEC
JEDEC
EIAJ
92-11-17
95-05-24
SOT146-1
SC603
1995 Mar 20
16
Philips Semiconductors
Preliminary specification
TV and VTR stereo/dual sound processor
with digital identification
TDA9845
SO20: plastic small outline package; 20 leads; body width 7.5 mm
SOT163-1
D
E
A
X
c
y
H
E
v
M
A
Z
20
11
Q
A
2
A
(A )
3
A
1
pin 1 index
θ
L
p
L
1
10
w
detail X
e
M
b
p
0
5
10 mm
scale
DIMENSIONS (inch dimensions are derived from the original mm dimensions)
A
max.
(1)
(1)
(1)
UNIT
A
A
A
b
c
D
E
e
H
L
L
Q
v
w
y
θ
1
2
3
p
E
p
Z
0.30
0.10
2.45
2.25
0.49
0.36
0.32
0.23
13.0
12.6
7.6
7.4
10.65
10.00
1.1
0.4
1.1
1.0
0.9
0.4
mm
2.65
0.25
0.01
1.27
0.050
1.4
0.25 0.25
0.01
0.1
8o
0o
0.012 0.096
0.004 0.089
0.019 0.013 0.51
0.014 0.009 0.49
0.30
0.29
0.42
0.39
0.043 0.043
0.016 0.039
0.035
0.016
inches 0.10
0.055
0.01 0.004
Note
1. Plastic or metal protrusions of 0.15 mm maximum per side are not included.
REFERENCES
OUTLINE
EUROPEAN
PROJECTION
ISSUE DATE
VERSION
IEC
JEDEC
EIAJ
92-11-17
95-01-24
SOT163-1
075E04
MS-013AC
1995 Mar 20
17
Philips Semiconductors
Preliminary specification
TV and VTR stereo/dual sound processor
with digital identification
TDA9845
A modified wave soldering technique is recommended
using two solder waves (dual-wave), in which a turbulent
wave with high upward pressure is followed by a smooth
laminar wave. Using a mildly-activated flux eliminates the
need for removal of corrosive residues in most
applications.
SOLDERING
Plastic dual in-line packages
BY DIP OR WAVE
The maximum permissible temperature of the solder is
260 °C; this temperature must not be in contact with the
joint for more than 5 s. The total contact time of successive
solder waves must not exceed 5 s.
BY SOLDER PASTE REFLOW
Reflow soldering requires the solder paste (a suspension
of fine solder particles, flux and binding agent) to be
applied to the substrate by screen printing, stencilling or
pressure-syringe dispensing before device placement.
The device may be mounted up to the seating plane, but
the temperature of the plastic body must not exceed the
specified storage maximum. If the printed-circuit board has
been pre-heated, forced cooling may be necessary
immediately after soldering to keep the temperature within
the permissible limit.
Several techniques exist for reflowing; for example,
thermal conduction by heated belt, infrared, and
vapour-phase reflow. Dwell times vary between 50 and
300 s according to method. Typical reflow temperatures
range from 215 to 250 °C.
REPAIRING SOLDERED JOINTS
Apply a low voltage soldering iron below the seating plane
(or not more than 2 mm above it). If its temperature is
below 300 °C, it must not be in contact for more than 10 s;
if between 300 and 400 °C, for not more than 5 s.
Preheating is necessary to dry the paste and evaporate
the binding agent. Preheating duration: 45 min at 45 °C.
REPAIRING SOLDERED JOINTS (BY HAND-HELD SOLDERING
IRON 4OR PULSE-HEATED SOLDER TOOL)
Plastic small outline packages
Fix the component by first soldering two, diagonally
opposite, end pins. Apply the heating tool to the flat part of
the pin only. Contact time must be limited to 10 s at up to
300 °C. When using proper tools, all other pins can be
soldered in one operation within 2 to 5 s at between 270
and 320 °C. (Pulse-heated soldering is not recommended
for SO packages.)
BY WAVE
During placement and before soldering, the component
must be fixed with a droplet of adhesive. After curing the
adhesive, the component can be soldered. The adhesive
can be applied by screen printing, pin transfer or syringe
dispensing.
Maximum permissible solder temperature is 260 °C, and
maximum duration of package immersion in solder bath is
10 s, if allowed to cool to less than 150 °C within 6 s.
Typical dwell time is 4 s at 250 °C.
For pulse-heated solder tool (resistance) soldering of VSO
packages, solder is applied to the substrate by dipping or
by an extra thick tin/lead plating before package
placement.
1995 Mar 20
18
Philips Semiconductors
Preliminary specification
TV and VTR stereo/dual sound processor
with digital identification
TDA9845
DEFINITIONS
Data sheet status
Objective specification
Preliminary specification
Product specification
This data sheet contains target or goal specifications for product development.
This data sheet contains preliminary data; supplementary data may be published later.
This data sheet contains final product specifications.
Limiting values
Limiting values given are in accordance with the Absolute Maximum Rating System (IEC 134). Stress above one or
more of the limiting values may cause permanent damage to the device. These are stress ratings only and operation
of the device at these or at any other conditions above those given in the Characteristics sections of the specification
is not implied. Exposure to limiting values for extended periods may affect device reliability.
Application information
Where application information is given, it is advisory and does not form part of the specification.
LIFE SUPPORT APPLICATIONS
These products are not designed for use in life support appliances, devices, or systems where malfunction of these
products can reasonably be expected to result in personal injury. Philips customers using or selling these products for
use in such applications do so at their own risk and agree to fully indemnify Philips for any damages resulting from such
improper use or sale.
1995 Mar 20
19
Philips Semiconductors – a worldwide company
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For all other countries apply to: Philips Semiconductors,
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P.O. Box 218, 5600 MD EINDHOVEN, The Netherlands,
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SCD39
© Philips Electronics N.V. 1995
All rights are reserved. Reproduction in whole or in part is prohibited without the
prior written consent of the copyright owner.
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The information presented in this document does not form part of any quotation
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533061/50/02/pp20
Date of release: 1995 Mar 20
9397 750 00107
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Tel. (022)74 8000, Fax. (022)74 8341
Document order number:
Philips Semiconductors
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