TEA1064BT-T [NXP]
IC TELEPHONE SPEECH CKT, PDSO20, MINI, PLASTIC, SO-20, Telephone Circuit;
| 型号： | TEA1064BT-T |
| 厂家： | 
NXP |
| 描述： | IC TELEPHONE SPEECH CKT, PDSO20, MINI, PLASTIC, SO-20, Telephone Circuit 电信 光电二极管 电信集成电路 |
| 文件： | 总32页 (文件大小：167K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
INTEGRATED CIRCUITS
DATA SHEET
TEA1064B
Low voltage versatile telephone
transmission circuit with dialler
interface and transmit level
dynamic limiting
March 1994
Product specification
File under Integrated Circuits, IC03A
Philips Semiconductors
Product specification
Low voltage versatile telephone transmission circuit
with dialler interface and transmit level dynamic limiting
TEA1064B
• Large amplification setting ranges on microphone and
FEATURES
earpiece amplifiers
• Low DC line voltage; operates down to 1.8 V (excluding
• Line loss compensation (line current dependent) for
microphone and earpiece amplifiers (not used for DTMF
amplifier)
polarity guard)
• Voltage regulator with low voltage drop and adjustable
static resistance
• Gain control curve adaptable to exchange supply
• DC line voltage adjustment facility
• Provides a supply for external circuits
• Automatic disabling of the DTMF amplifier in
extremely-low voltage conditions
• Dynamic limiting (speech-controlled) in transmit
direction prevents distortion of line signal and sidetone
• Microphone MUTE function available with switch
• MUTE, POWER-DOWN and DTMF input reference (pin
VEE2) can be connected either to VEE1 or SLPE.
• Symmetrical high-impedance inputs (64 kΩ) for
dynamic, magnetic or piezo-electric microphones
• Asymmetrical high-impedance input (32 kΩ) for electret
microphones
GENERAL DESCRIPTION
The TEA1064B is a bipolar integrated circuit that performs
all the speech and line interface functions required in fully
electronic telephone sets. It performs electronic switching
between dialling and speech. The IC operates at line
voltages down to 1.8 V DC (with reduced performance) to
facilitate the use of more telephone sets connected in
parallel. The transmit signal on the line is dynamically
limited (speech-controlled) to prevent distortion at high
transmit levels of both the sending signal and the sidetone.
• DTMF signal input
• Confidence tone in the earpiece during DTMF dialling
• Mute input for disabling speech during pulse or DTMF
dialling
• Power-down input for improved performance during
pulse dial or register recall (flash)
• Receiving amplifier for dynamic, magnetic or
piezo-electric earpieces
ORDERING INFORMATION
PACKAGE
EXTENDED TYPE
NUMBER
PINS
PIN POSITION
MATERIAL
CODE
TEA1064B
20
20
DIL
plastic
plastic
SOT146(1)
SO20; SOT163A(2)
TEA1064BT
mini-pack
Notes
1. SOT146-1; 1998 Jun 18.
2. SOT163-1; 1998 Jun 18.
March 1994
2
Philips Semiconductors
Product specification
Low voltage versatile telephone transmission circuit
with dialler interface and transmit level dynamic limiting
TEA1064B
QUICK REFERENCE DATA
SYMBOL
Iline
PARAMETER
CONDITIONS
MIN.
TYP.
MAX.
UNIT
line current operating range
normal operation
note 1
11
−
−
140
mA
with reduced performance
internal supply current
power-down input LOW
power-down input HIGH
voltage gain range
2
11
mA
ICC
VCC = 2.8 V
−
−
1.3
60
1.6
82
mA
µA
Gv
microphone amplifier
44
20
−
−
52
45
dB
dB
receiving amplifier
line loss compensation ranges
gain control
Gv
5.7
36
6.1
−
6.5
dB
V
Vexch
Rexch
VLN(p-p)
exchange supply voltage
exchange feeding bridge resistance
60
400
−
1000
Ω
maximum output voltage swing on LN R16 = 392 Ω;
(peak-to-peak value)
Iline = 15 mA
Ip = 1.4 mA
Ip = 2.7 mA
Iline = 15 mA
Ip = 1.4 mA
3.55
3.25
3.80
3.50
4.05
3.75
V
V
Vp
supply for peripherals
2.5
2.9
2.7
3.1
−
−
V
V
Ip = 2.7 mA;
RREG-SLPE = 20 kΩ
VLN
DC line voltage
Iline = 15 mA
without RREG-SLPE
3.25
4.05
−25
3.5
4.4
−
3.75
4.75
+75
V
RREG-SLPE = 20 kΩ
V
Tamb
operating ambient temperature range
°C
Note
1. For the TEA1064BT the maximum line current depends on the heat dissipating qualities of the mounted device.
March 1994
3
Philips Semiconductors
Product specification
Low voltage versatile telephone transmission circuit
with dialler interface and transmit level dynamic limiting
TEA1064B
V
LN
CC
16
1
6
GAR
13
IR
5
4
−
+
QR+
QR−
TEA1064B
+
−
9
8
2
3
MIC+
MIC−
+
−
GAS1
GAS2
−
+
+
−
12
14
15
dB
DTMF
MUTE
PD
SUPPLY AND
REFERENCE
LOW
VOLTAGE
CIRCUIT
AGC
CIRCUIT
DYNAMIC
LIMITER
CURRENT
START
REFERENCE
CIRCUIT
11
19
17
REG
18
AGC
10
7
20
SLPE
V
V
STAB
MBA442
DLS/MMUTE
EE1
EE2
Fig.1 Block diagram.
March 1994
4
Philips Semiconductors
Product specification
Low voltage versatile telephone transmission circuit
with dialler interface and transmit level dynamic limiting
TEA1064B
PINNING
SYMBOL
PIN
DESCRIPTION
LN
1
2
positive line terminal
GAS1
GAS2
QR−
QR+
GAR
gain adjustment; transmitting amplifier
gain adjustment; transmitting amplifier
inverting output; receiving amplifier
non-inverting output; receiving amplifier
gain adjustment; receiving amplifier
3
4
5
6
DLS/MMUTE
MIC−
MIC+
STAB
VEE1
7
decoupling for transmit amplifier dynamic and microphone MUTE input
inverting microphone input
8
9
non-inverting microphone input
current stabilizer
10
11
12
13
14
15
16
17
18
19
20
negative line terminal
DTMF
IR
dual-tone multi-frequency input
receiving amplifier input
MUTE
PD
mute input
power-down input
VCC
internal supply decoupling
REG
voltage regulator decoupling
AGC
automatic gain control input
VEE2
reference for POWER-DOWN (PD), MUTE and DTMF
slope adjustment for DC curve/reference for peripheral circuits
SLPE
handbook, halfpage
LN
GAS1
GAS2
QR−
1
2
3
4
5
6
7
8
9
20 SLPE
V
19
EE2
18 AGC
17 REG
V
16
15
QR+
CC
TEA1064B
GAR
PD
14 MUTE
13 IR
DLS/MMUTE
MIC−
MIC+
12 DTMF
V
11
STAB 10
EE1
MBA433
Fig.2 Pin configuration.
5
March 1994
Philips Semiconductors
Product specification
Low voltage versatile telephone transmission circuit
with dialler interface and transmit level dynamic limiting
TEA1064B
The configuration shown in Fig.3, gives a stabilized
FUNCTIONAL DESCRIPTION
voltage across pins LN and SLPE which, applied via the
low-pass filter R16, C15, provides a supply to the
peripherals that is independant of the line current and
depends only on the peripheral supply current.
Supplies VCC, VEE2, LN, SLPE, REG and STAB (Figs 3
and 5)
Power for the TEA1064B and its peripheral circuits is
usually obtained from the telephone line. The IC develops
its own supply voltage at VCC and regulates its voltage
drop. The internal supply requires a decoupling capacitor
between VCC and VEE1. The internal current stabilizer is
The value of R16 and the level of the DC voltage VLN-SLPE
determine the supply capabilities. In the basic application
R16 = 392 Ω and C15 = 220 µF. The worst-case
peripheral supply current as a function of supply voltage is
shown in Fig.4.
set by a 3.6 kΩ resistor between STAB and VEE1
.
The DC current flowing into the set is determined by the
exchange supply voltage Vexch, the feeding bridge
resistance Rexch, the subscriber line DC resistance Rline
and the DC voltage (including polarity guard) on the
subscriber set (see Fig.3).
To increase the supply capabilities, the value of R16 can
be decreased or the DC voltage VLN-SLPE can be increased
by using RVA(REG-SLPE)
.
Note
The TEA1064B application is the same as is used for
TEA1060/TEA1061, TEA1067 and TEA1068 integrated
circuits.
The internal voltage regulator generates a
temperature-compensated reference voltage that is
available between LN and SLPE (Vref = VLN-SLPE = 3.23 V
typ.). This internal voltage regulator requires decoupling
by a capacitor between REG and VEE1 (C3).
I
+ 0.25 mA
p
R
R1
I
line
I
line
I
+ 0.25 mA
SLPE
CC
V
LN
1
CC
16
TEA1064B
R
exch
0.25 mA
DC
AC
C1
R16
C15
V
exch
17
10
20
11
V
19
I
p
REG
STAB
SLPE
V
EE1
EE2
peripheral
circuits
C3
R5
R9
V
p
MBA435
The voltage VLN-SLPE is fixed to Vref = 3.323 ±0.25 V.
Resistor R16 together with the line current determine the supply capabilities and the maximum output swing on
the line (no loop damping is necessary).
The line voltage VLN = Vref + ({Iline − 1.55 mA} × R9).
Fig.3 Supply arrangement with reference to SLPE.
March 1994
6
Philips Semiconductors
Product specification
Low voltage versatile telephone transmission circuit
with dialler interface and transmit level dynamic limiting
TEA1064B
MBA436
5
handbook, halfpage
I
p
(mA)
4
3
2
1
0
2
3
4
5
V
(V)
p
Iline = 15 mA; R16 = 392 Ω; valid for MUTE = 0 and 1.
Line current has very little influence.
Fig.4 Maximum supply current with respect to Fig.3 for peripherals (Ip) as a function of the peripheral supply
voltage (Vp).
R
I
line
R1
I
line
I
+ 0.25 mA
CC
SLPE
V
LN
1
CC
I
p
16
TEA1064B
R
exch
DC
AC
0.25 mA
peripheral
circuits
C1
V
17
10
20
11
19
V
exch
STAB
REG
SLPE
V
EE1
EE2
C3
R5
R9
MBA432
Fig.5 Supply arrangement with reference to VEE1
.
March 1994
7
Philips Semiconductors
Product specification
Low voltage versatile telephone transmission circuit
with dialler interface and transmit level dynamic limiting
TEA1064B
VCC). MUTE, PD and DTMF are then referenced to VEE1
and the pin VEE2 must therefore be connected to VEE1
.
MBA434
2.4
handbook, halfpage
If the line current Iline exceeds ICC + 0.25 mA, the voltage
converter shunts the excess current to SLPE via LN;
where ICC ≈ 1.3 mA, the value required by the IC for
normal operation.
I
p
(mA)
(a)
(b)
1.6
The DC line voltage on LN is:
• VLN = VLN-SLPE + (ISLPE x R9)
• VLN = Vref + ({Iline − ICC − 0.25 x 10−3 A} x R9)
0.8
in which:
(a')
(b')
• Vref = 3.23 V ± 0.25 V is the internal reference voltage
between LN and SLPE; its value can be adjusted by
external resistor RVA
.
0
0
• R9 = external resistor between SLPE and VEE1 (20 Ω in
basic operation).
1
2
3
4
V
(V)
CC
With R9 = 20 Ω, this results in:
(a) Ip = 1.94 mA
(b) Ip = 1.54 mA
(a′) Ip = 0.54 mA
(b′) Ip = 0.16 mA
Iline = 15 mA
• VLN = 3.3 ± 0.25 V at Iline = 15 mA
• VLN = 4.1 ± 0.3 V at Iline = 15 mA, RVA(REG-SLPE) = 33 kΩ
R1 = 620 Ω and R9 = 20 Ω
• VLN = 4.4 ± 0.35 V at Iline = 15mA,
RVA(REG- SLPE) = 20 kΩ
Curve (a) and (a′) are valid when the receiving
amplifier is not driven or when MUTE = HIGH.
Curve (b) and (b′) are valid when the receiving
amplifier is driven and when MUTE = LOW.
Vo(RMS) = 150 mV, RT = 150 Ω.
The preferred value for R9 is 20 Ω. Changing R9
influences microphone gain, DTMF gain, the gain control
characteristics, sidetone and the DC characteristics
(especially the low voltage characteristics).
Fig.6 Maximum current Ip with respect to Fig.5
available from Vcc for peripheral circuitry
with VCC > 2.2 V.
In normal conditions, ISLPE >> (ICC + 0.25 mA) and the
static behaviour is equivalent to a voltage regulator diode
with an internal resistance of R9. In the audio frequency
range the dynamic impedance is determined mainly by R1.
The equivalent impedance of the circuit in audio frequency
range is shown in Fig.8.
The maximum AC output swing on the line at low currents
is influenced by R16 (limited by current) and the maximum
output swing on the line at high currents is influenced by
DC voltage VLN-SLPE (limited by voltage). In both these
situations, the internal dynamic limiter in the sending
channel prevents distortion when the microphone is
overdriven. The maximum AC output swing on LN is
shown in Fig.7; practical values for R16 are from 200 Ω to
600 Ω and this influences both maximum output swing at
low line currents and the supply capabilities.
The internal reference voltage VLN-SLPE can be increased
by external resistor RVA(REG-SLPE) connected between
REG and SLPE. The voltage VLN-SLPE is shown as a
function of RVA(REG-SLPE) in Fig.9. Changing the reference
voltage influences the output swing of both sending and
receiving amplifiers.
At line currents below 8 mA (typ.), the DC voltage dropped
across the circuit is adjusted to a lower level automatically
(approximately 1.8 V at 2 mA). This gives the possibility of
operating more telephone sets in parallel with DC line
voltages (excluding polarity guard) down to an absolute
minimum of 1.8 V. At line currents below 8 mA (typ.), the
circuit has limited sending and receiving levels.
When the SLPE pin is the reference for peripheral circuits,
inputs MUTE, PD and DTMF must be referenced to SLPE.
This is achieved by connecting pin VEE2 to pin SLPE; VEE2
being the reference of MUTE, PD and DTMF input stages.
Active microphones can be supplied between VCC and
VEE1 as shown in Fig.5. Low power circuits that provide
MUTE, PD and DTMF inputs to the TEA1064B can also be
powered from VCC (see Fig.6 for the supply capability of
March 1994
8
Philips Semiconductors
Product specification
Low voltage versatile telephone transmission circuit
with dialler interface and transmit level dynamic limiting
TEA1064B
MBA437
6
handbook, halfpage
V
LN(p-p)
(V)
LN
handbook, halfpage
L
R
R1
eq
p
4
V
REG
V
ref
CC
I
=
p
C3
4.7 µF
R9
20 Ω
C1
0 mA
1.4 mA
2.7 mA
2
0
V
EE1
MBA438
10
20
30
I
(mA)
line
R16 = 392 Ω; Ip with respect to Fig.3.
Leq = C3 × R9 × Rp
Rp = 15 kΩ
Fig.7 Typical AC output swing at total harmonic
distortion (THD) = 2% on the line as a
function of line current with peripheral
supply current as a parameter.
Fig.8 Equivalent impedance between LN and
VEE
.
MBA467
7.8
V
ref
(V)
6.6
5.4
4.2
3.0
with R
VA
infinite
0
40
80
(REG-SLPE) (kΩ)
120
RV
VA
VLN = VLN-SLPE + ({Iline − 1.55 × 10−3 A} × R9).
Fig.9 Internal reference voltage VLN-SLPE as a function of resistor RVA(REG-SLPE) for line currents between 11 mA
and 140 mA.
March 1994
9
Philips Semiconductors
Product specification
Low voltage versatile telephone transmission circuit
with dialler interface and transmit level dynamic limiting
TEA1064B
The gain of the microphone amplifier is proportional to
external resistor R7 connected between GAS1 and GAS2
and with this it can be adjusted between 44 dB and
52 dB to suit the sensitivity of the transducer.
Microphone inputs MIC+ and MIC− and gain pins
GAS1 and GAS2
The TEA1064B has symmetrical microphone inputs, its
input impedance is 64 kΩ (2 x 32 kΩ) and its voltage
amplification is typically 52 dB with R7 = 68 kΩ. Either
dynamic, magnetic or piezo-electric microphones can be
used, or an electret microphone with a built-in FET buffer.
Arrangements for the microphone types are shown in
Fig.10.
An external 100 pF capacitor (C6) is required between
GAS1 and SLPE to ensure stability. A larger value of C6
may be chosen to obtain a first-order low-pass filter with a
cut-off frequency corresponding to the time constant
R7 x C6.
V
CC
MIC+
MIC−
MIC+
16
MIC+
MIC−
9
9
8
8
(1)
MIC−
8
9
11
V
EE1
MBA439
(c)
(a)
(b)
Resistor (1) may be connected to reduce the terminating impedance, or for sensitive types a resistive attenuator
can be used to prevent overloading the microphone inputs.
Fig.10 Microphone arrangements (a) magnetic or dynamic microphone (b) electret microphone (c) piezo-electric
microphone currents.
March 1994
10
Philips Semiconductors
Product specification
Low voltage versatile telephone transmission circuit
with dialler interface and transmit level dynamic limiting
TEA1064B
Dynamic limiter (microphone) pin DLS/MMUTE
A low level at the DLS/MMUTE pin inhibits the microphone
inputs MIC+ and MIC− but has no influence on the
receiving and DTMF amplifiers.
Removing the low level at the DLS/MMUTE pin provides
the normal function of the microphone amplifier after a
handbook, halfpage
short time determined by the capacitor connected to
DLS/MMUTE pin. The microphone mute function can be
DLS/MMUTE
7
R17
realised by a simple switch as shown in Fig.11.
3.3 kΩ
To prevent distortion of the transmitted signal, the gain of
the sending amplifier is reduced rapidly when peaks of the
signal on the line exceed an internally-determined
V
EE1
11
threshold. The time in which gain reduction is effected
(attack time) is very short. The circuit stays in the
MBA440
gain-reduced condition until the peaks of the sending
signal remain below the threshold level. The sending gain
then returns to normal after a a time determined by the
capacitor connected to DLS/MMUTE (release time).
The internal threshold adapts automatically to the DC
voltage setting of the circuit (VLN-SLPE). This means that
the maximum output swing on the line will be higher if the
DC voltage dropped across the circuit is increased.
Fig.12 shows the maximum possible output swing on the
line as a function of the DC voltage drop (VLN-SLPE) with
Fig.11 Microphone-mute function.
Iline − Ip as a parameter.
The internal threshold level is lowered automatically if the
DC current in the transmit output stage is insufficient. This
prevents distortion of the sending signal in applications
using parallel-connected telephones or telephones
operating over long lines, for example.
MBA464
10
I
-I
V
line p
LN(p-p)
(V)
(mA)
8
6
4
2
0
25
23
21
Dynamic limiting also considerably improves sidetone
performance in over-drive conditions (less distortion;
limited sidetone level).
19
17
15
13
11
3
3.5
4
4.5
5
5.5
V
-V (V)
LN SLPE
R16 = 392 Ω.
Fig.12 Typical output swing on line as a function of
the DC voltage drop VLN-SLPE with
Iline − Ip as a parameter.
March 1994
11
Philips Semiconductors
Product specification
Low voltage versatile telephone transmission circuit
with dialler interface and transmit level dynamic limiting
TEA1064B
low-impedance magnetic or dynamic earpieces which are
suitable for single-ended drive. By using both outputs
(differential drive) the gain is increased by 6 dB.
Differential drive can be used when the earpiece
impedance exceeds 450 Ω as with high-impedance
dynamic, magnetic or piezo-electric earpieces.
Receiving amplifier IR, QR+, QR− and GAR
The receiving amplifier has one input IR and two
complimentary outputs, QR+ (non-inverting) and QR−
(inverting). These outputs may be used for single-ended or
differential drive, depending on the type and sensitivity of
the earpiece used (see Fig.13). Gain from IR to QR+ is
typically 31 dB with R4 = 100 kΩ, sufficient for
(1)
(2)
QR+
QR−
QR+
QR+
QR+
5
4
5
4
5
4
5
4
V
QR−
QR−
QR−
EE
11
MBA441
(a)
(b)
(c)
(d)
Resistor (1) may be connected to prevent distortion (inductive load).
Resistor (2) is required to increase the phase margin (stability with capacitive load).
Fig.13 Alternative receiver arrangements (a) dynamic earpiece with an impedance less than 450 Ω
(b) dynamic earpiece with an impedance more than 450 Ω
(c) magnetic earpiece with an impedance more than 450 Ω
(d) piezo-electric earpiece.
March 1994
12
Philips Semiconductors
Product specification
Low voltage versatile telephone transmission circuit
with dialler interface and transmit level dynamic limiting
TEA1064B
The output voltage of the receiving amplifier is specified for
continuous-wave drive. Fig.14 shows the maximum output
MLB031
swing of the receiving amplifier as a function of the DC
voltage drop (VLN). The maximum output voltage will be
higher under speech conditions, where the ratio of the
peak to the RMS value is higher.
1.5
handbook, halfpage
V
QR(rms)
(V)
The gain of the receiving amplifier can be adjusted to suit
the sensitivity of the transducer used. The adjustment
range is between 20 dB and 39 dB with single-ended drive
and between 26 dB and 45 dB with differential drive. The
gain is proportional to the external resistor R4 connected
between GAR and QR+. The overall gain between LN and
QR+ can be found by subtracting the attenuation of the
anti-sidetone network (32 dB) from the amplifier gain.
1.0
(1)
(2)
(3)
0.5
Two external capacitors (C4 = 100 pF and C7 = 10 x C4 =
1 nF) ensure stability. A larger value may be chosen to
obtain a first-order low-pass filter. The cut-off frequency
corresponds with time constant R4 x C4. The relationship
C7 = 10 x C4 must be maintained.
0
3
4
5
6
V
(V)
LN
Valid for both options; THD = 2%, Iline = 15 mA.
Curve (1) is for a differential load of 47 nf (series
resistance = 100 Ω; f = 3400 Hz.
Curve (2) is for a differential load of 450 Ω;
f = 1 kHz.
Curve (3) is for a single-ended load of 150 Ω;
f = 1 kHz.
Fig.14 Typical output swing of the receiving
amplifier as a function of DC voltage drop
VLN with the load at the receiver output as
parameter.
March 1994
13
Philips Semiconductors
Product specification
Low voltage versatile telephone transmission circuit
with dialler interface and transmit level dynamic limiting
TEA1064B
The value of R6 must be chosen with reference to the
exchange supply voltage and its feeding bridge resistance
(see Fig.15 and Table 1). Different values of R6 give the
same line current ratios at the start and the end of the
control range. If automatic line-loss compensation is not
required the AGC pin can be left open-circuit, the
amplifiers then provide their maximum gain.
Automatic gain control input AGC
Automatic compensation of line loss is obtained by
connecting a resistor (R6) between AGC and VEE1
.
This automatic gain control varies the gain of the
microphone amplifier and receiving amplifier in
accordance with the DC line current. The control range is
6.1 dB; this corresponds to a 5 km line of 0.5 dB diameter
copper twisted-pair cable (DC resistance = 176 Ω/km,
average attenuation = 1.2 dB/km). The DTMF gain is not
affected by this feature.
MLB030
0
R6 = ∞
∆A
vd
(dB)
−2
−4
93.1 kΩ
118 kΩ
R6 = 66.5 kΩ
−6
0
20
40
60
80
100
120
140
(mA)
I
line
Fig.15 Variation of gain as a function of line current with R6 as a parameter; R9 = 20 Ω.
Table 1 Values of R6 giving optimum line-loss compensation at various values of exchange supply voltage (Vexch) and
exchange feeding bridge resistance (Rexch); R9 = 20 Ω
Rexch (Ω)
400
600
800
1000
R6 (kΩ)
35
48
60
84.5
118
x
66.5
93.1
x
x
x
Vexch
(V)
77.8
97.6
66.5
84.5
March 1994
14
Philips Semiconductors
Product specification
Low voltage versatile telephone transmission circuit
with dialler interface and transmit level dynamic limiting
TEA1064B
A HIGH level at PD also internally disconnects the
VEE2 input
EE2 is the reference for MUTE, POWER-DOWN and
DTMF inputs. These signals are referenced to VEE1 when
generated by peripherals powered between VCC and VEE1
but they can also be referenced to SLPE when peripherals
are powered as shown in Fig.3. In the first instance
(reference to VEE1), VEE2 has to be connected to VEE1. In
the second instance (reference to SLPE), VEE2 has to be
connected to SLPE.
capacitor at REG so that the voltage stabilizer has no
switch-on delay after line interruptions. This minimizes the
contribution of the IC to the current waveform during pulse
dialling or register recall.
V
,
When the power-down facility is not required, the PD pin
can be left open-circuit or connected to VEE2
.
Sidetone suppression
Suppression of the transmitted signal in the earpiece is
obtained by the anti-sidetone network comprising R1//Zline
R2, R3, R8, R9 and Zbal (see Fig.16). Maximum
compensation is obtained when the following conditions
are fulfilled:
MUTE input (see notes 1 and 2)
,
MUTE = HIGH enables the DTMF input and inhibits the
microphone and receiving amplifier inputs.
MUTE = LOW or open-circuit disables the DTMF input and
enables the microphone and receiving amplifier inputs.
(a) R9 x R2 = R1 x (R3 + {R8//Zbal})
(b) (Zbal/{Zbal + R8}) = (Zline/{Zline + R1})
Switching MUTE gives negligible clicks at the telephone
outputs and on the line.
If fixed values are chosen for R1, R2, R3 and R9, then
condition (a) is always fulfilled provided R8//Zbal << R3
Dual-tone multi-frequency input DTMF (see note 1)
To obtain optimum sidetone suppression, condition (b) has
to be fulfilled, resulting in:
When the DTMF input is enabled, dialling tones may be
sent on the line. The voltage gain between DTMF-VEE2
and LN-VEE1 is typically 26.5 dB less than the gain of the
microphone amplifier and varies with R7 in the same way
as the gain of the microphone amplifier. This means that
the tone level at the DTMF input has to be adjusted after
setting the gain of the microphone amplifier.
Zbal = (R8/R1) x Zline = k x Zline
Where k is a scale factor; k = (R8/R1).
The scale factor k (value of R8) is chosen to meet the
following criteria:
• compatibility with a standard capacitor from the E6 or
E12 range for Zbal
With R7 = 68 kΩ the gain is typically 25.5 dB.
The signalling tones can be heard in the earpiece at a low
level (confidence tone).
•
Zbal//R8 << R3 to fulfil condition (a) and thus ensure
correct anti-sidetone bridge operation
•
Z
bal + R8 >> R9 to avoid influencing the transmit gain
Power-down input PD (see notes 1. and 2.)
In practise Zline varies considerably with the line length and
line type. Therefore the value chosen for Zbal should be for
an average line length giving satisfactory sidetone
suppression with short and long lines. The suppression
also depends on the accuracy of the match between Zbal
and the impedance of the average line.
During pulse dialling or register recall (timed loop break)
the telephone line is interrupted; as a consequence it
provides no supply for the transmission circuit connected
to VCC or for the peripherals between VLN and SLPE.
These supply gaps are bridged by the charges in the
capacitors C1 and C15. The requirements on these
capacitors are eased by an applied HIGH level to the PD
input during the time of the loop break. This reduces the
internal supply current ICC1 from 1.3 mA (typ.) to 60 µA
(typ.) and switches off the voltage regulator to prevent
discharge via LN to VCC2
.
March 1994
15
Philips Semiconductors
Product specification
Low voltage versatile telephone transmission circuit
with dialler interface and transmit level dynamic limiting
TEA1064B
Alternatively a conventional Wheatstone bridge can be
used as an anti-sidetone circuit (see Fig.17). Both bridge
types can be used with either resistive or complex set
impedances. (More information on the balancing of
anti-sidetone bridges can be obtained in our publication
“Versatile speech transmission ICs for electronic
telephone sets”, order number 9398 341 10011).
EXAMPLE
The line impedance for which optimum suppression is to
be obtained can be represented by 210 Ω +
(1265 Ω //140 nF). This represents a 5 km line of 0.5 mm
diameter copper twisted-pair cable matched with 600 Ω
(176 Ω/km; 38 nF/km).
With k = 0.64 this results in : R8 = 390 Ω;
Z
bal = 130 Ω + (820 Ω//220 nF).
Notes
The anti-sidetone network for the TEA1060 family shown
in Fig.16 attenuates the signal received from the line by
32 dB before it enters the receiving amplifier. The
attenuation is almost constant over the whole
audio-frequency range.
1. The reference level used for the MUTE, DTMF and PD
inputs is VEE2
.
2. A LOW level for any of these pins is defined by
connection to VEE2, a HIGH level is defined as a
voltage greater than VEE2 + 1.5 V and smaller than
VCC + 0.4 V.
LN
R1
R9
R2
Z
line
V
IR
i
m
EE2
R
t
R3
R8
Z
bal
SLPE
MBA465
Fig.16 Equivalent circuit of TEA1060 family anti-sidetone bridge.
LN
R1
R9
Z
bal
Z
line
V
IR
i
m
EE2
R
t
R8
R
A
SLPE
MBA466
Fig.17 Equivalent circuit of an anti-sidetone network in the Wheatstone bridge configuration.
16
March 1994
Philips Semiconductors
Product specification
Low voltage versatile telephone transmission circuit
with dialler interface and transmit level dynamic limiting
TEA1064B
LIMITING VALUES
In accordance with the Absolute Maximum System (IEC134).
SYMBOL
PARAMETER
CONDITIONS
MIN.
MAX.
12
UNIT
VLN
VLN
positive line voltage continuous
−
−
V
repetitive line voltage during
switch-on line interruption
13.2
V
VLN
repetitive peak line voltage one 1 ms R9 = 20 Ω;
−
28
V
pulse per 5 s
R10 = 13 Ω;
see Fig.22
ILN
line current
R9 = 20 Ω
note 1
TEA1064B
−
−
V
140
140
mA
mA
V
TEA1064BT
note 1
Vi
input voltage on pins other than LN
total power dissipation
TEA1064B
EE1−0.7 VCC+0.7
Ptot
R9 = 20 Ω; note 2
−
−
717
555
mW
mW
°C
TEA1064BT
Tamb
Tstg
Tj
operating ambient temperature
storage temperature
junction temperature
−25
−40
−
+75
+125
+125
°C
°C
Notes
1. Mostly dependent on the maximum required Tamb and on the voltage between LN and SLPE. See Figs 18 and 19 to
determine the current as a function of the required voltage and the temperature.
2. Calculated for the maximum ambient temperature specified Tamb = 75 °C and a maximum junction temperature of
125 °C.
THERMAL RESISTANCE
SYMBOL
PARAMETER
THERMAL RESISTANCE
Rth j-a
from junction to ambient in free air
SOT146
70 K/W
90 K/W
SOT163A (note 1)
Note
1. Mounted on glass epoxy board 41 × 19 × 1.5 mm.
March 1994
17
Philips Semiconductors
Product specification
Low voltage versatile telephone transmission circuit
with dialler interface and transmit level dynamic limiting
TEA1064B
MLB032
MSA546
160
LN
150
LN
handbook, halfpage
handbook, halfpage
I
I
(mA)
(mA)
140
130
120
100
80
110
90
(1)
(2)
(1)
(2)
(3)
70
(3)
(4)
(4)
60
50
40
2
30
2
4
6
8
10
-V
12
4
6
8
10
-V
12
V
(V)
V
(V)
LN SLPE
LN SLPE
(1) Tamb = 45 °C; Ptot = 1143 mW.
(2) Tamb = 55 °C; Ptot = 1000 mW.
(3) Tamb = 65 °C; Ptot = 857 mW.
(4) Tamb = 75 °C; Ptot = 714 mW.
(1) Tamb = 45 °C; Ptot = 888 mW.
(2) Tamb = 55 °C; Ptot = 777 mW.
(3) Tamb = 65 °C; Ptot = 666 mW.
(4) Tamb = 75 °C; Ptot = 555 mW.
Fig.18 TEA1064B safe operating area.
Fig.19 TEA1064BT safe operating area.
March 1994
18
Philips Semiconductors
Product specification
Low voltage versatile telephone transmission circuit
with dialler interface and transmit level dynamic limiting
TEA1064B
CHARACTERISTICS
Iline = 11 to 140 mA; VEE1 = 0 V; f = 800 Hz; Tamb = 25 °C; RL = 600 Ω; tested in the circuits of Fig.20 or Fig.21; VEE2
connected to SLPE; unless otherwise specified.
SYMBOL
PARAMETER
CONDITIONS
MIN.
TYP.
MAX.
UNIT
Supplies LN and VCC (pins 1 and 16)
VLN
DC line voltage: voltage drop
between LN and VEE1
MIC−, MIC+ inputs
open-circuit;
without RVA
Iline = 2 mA
Iline = 4 mA
−
−
−
−
1.8
−
−
−
−
V
2.2
3.2
3.4
3.5
5.25
6.1
−1
V
I
I
line = 7 mA
V
line = 11 mA
V
Iline = 15 mA
3.25
−
3.75
6.05
7.0
V
I
I
line = 100 mA
line = 140 mA
V
−
V
∆VLN/∆T
variation with temperature
Iline = 15 mA
−3
+1
mV/K
VLN
voltage drop over circuit with RVA
connected between REG and SLPE
R
R
VA = 33 kΩ
VA = 20 kΩ
3.8
4.1
4.4
4.4
V
V
4.05
4.75
ICC
internal supply current into pin 16
VCC = 2.8 V
PD = LOW
PD = HIGH
−
−
1.3
60
1.6
82
mA
µA
VCC
supply voltage available for
peripheral circuitry
VEE2 connected to VEE1
Iline = 15 mA;
MUTE = HIGH;
see Fig.5
Ip = 0.54 mA
Ip = 0 mA
2.2
2.5
2.4
2.7
−
−
V
V
Vp
supply voltage available for
peripheral circuitry
Iline = 15 mA
Ip = 1.4 mA
2.5
2.9
2.7
3.1
−
−
V
V
Ip = 2.7 mA;
RREG-SLPE = 20 kΩ
Microphone inputs MIC− and MIC+ (pins 8 and 9)
Zi
input impedance
differential
51
25.5
−
64
77
38.5
−
kΩ
kΩ
dB
dB
single-ended
32.0
82
CMRR
Gv
common mode rejection ratio
voltage gain (see Fig.20)
Iline = 15 mA;
51
52
53
R7 = 68 kΩ
∆Gvf
variation of Gv with frequency
referred to 0.8 kHz
f = 300 and 3400 Hz
−0.5
±0.1
+0.5
dB
March 1994
19
Philips Semiconductors
Product specification
Low voltage versatile telephone transmission circuit
with dialler interface and transmit level dynamic limiting
TEA1064B
SYMBOL
PARAMETER
CONDITIONS
without R6;
Iline = 50 mA;
amb = −25 to +75 °C
MIN.
TYP.
±0.2
MAX.
UNIT
dB
∆GvT
variation of Gv with temperature
referred to 25 °C
−
−
T
DTMF input (pin 12)
Zi
input impedance
16.8
24.5
20.7
25.5
24.6
26.5
kΩ
Gv
voltage gain (see Fig.20)
Iline = 15 mA;
dB
R7 = 68 kΩ
∆Gvf
variation of Gv with frequency
referred to 0.8 kHz
f = 300 and 3400 Hz
f = 697 and 1633 Hz
−0.5
−0.2
−
±0.01
±0.05
±0.2
+0.5
+0.2
0.5
dB
dB
dB
∆GvT
variation of Gv with temperature
Iline = 50 mA;
referred to 25 °C
Tamb = −25 to +75 °C
Gain adjustment inputs GAS1 and GAS2 (pins 2 and 3)
∆Gv
transmitting amplifier gain
adjustment range
−8
−
+0
dB
V
Sending amplifier output LN (pin 1)
DYNAMIC LIMITER
VLN(p-p)
output voltage swing
(peak-to-peak value)
Iline = 15 mA;
R7 = 68 kΩ;
3.4
3.8
4.2
Vi(RMS) = 3.6 mV
THD
total harmonic distortion
Vi = 3.6 mV +10 dB
Vi = 3.6 mV +15 dB
Vi = 3.6 mV +10 dB
−
−
1.5
2.8
−
−
%
%
VLN(p-p)
output voltage swing
(peak-to-peak value)
Ip = 1.4 mA
3.55
3.25
−
3.8
3.5
1.8
0.9
4.05
3.75
−
V
V
V
V
Ip = 2.7 mA
Ip = 0 mA; Iline = 7 mA
Ip = 0 mA; Iline = 4 mA
C16 = 470 nF
−
−
dynamic behaviour of limiter
tatt
attack time Vmic jumps from
2 mV to 40 mV
−
1.5
5.0
−
ms
trel
release time Vmic jumps from
40 mV to 2 mV
50
−
150
−72
ms
Vno(RMS)
noise output voltage
(RMS value)
Iline = 15 mA;
R7 = 68 kΩ;
−
dBmp
200 Ω between
MIC− and MIC+;
psophometrically
weighted (P53 curve)
March 1994
20
Philips Semiconductors
Product specification
Low voltage versatile telephone transmission circuit
with dialler interface and transmit level dynamic limiting
TEA1064B
SYMBOL
Receiving amplifier input IR (pin 13)
Zi input impedance
Receiving amplifier outputs QR− and QR+ (pins 4 and 5)
PARAMETER
CONDITIONS
MIN.
TYP.
MAX.
UNIT
17
21
25
kΩ
Zo
output impedance
single-ended
−
4
−
Ω
Gv
voltage gain (see Fig.21)
Iline = 15 mA;
R4 = 100 kΩ
single-ended
differential
RT = 300 Ω
30
36
31
32
38
0
dB
dB
dB
RT = 600 Ω
37
∆Gvf
variation of Gv with frequency
referred to 0.8 kHz
f = 300 and 3400 Hz
−0.5
−0.2
∆GvT
variation of Gv with temperature
without R6;
−
±0.2
−
dB
referred to 25 °C
Iline = 50 mA;
Tamb = −25 to +75 °C
Vo(RMS)
output voltage
(RMS value)
TDA = 2%;
sinewave drive;
R4 = 100 kΩ;
Iline = 15 mA
single-ended
differential
differential
RT = 150 Ω
RT = 450 Ω
−
−
−
0.2
−
−
−
V
V
V
0.37
0.52
CT = 47 nF;
Rs = 100 Ω;
f = 3400 Hz
Vo(RMS)
Vno(RMS)
Vno(RMS)
output voltage
(RMS value)
Ip = 0 mA;
TDA = 10%;
sinewave drive;
R4 = 100 kΩ;
RT = 150 Ω
I
I
line = 4 mA
line = 7 mA
−
−
20
−
−
mV
mV
160
noise output voltage
(RMS value)
Iline = 15 mA;
R4 = 100 kΩ;
psophometrically
weighted (P53 curve);
pin IR open-circuit
single-ended
differential
RT = 300 Ω
RT = 600 Ω
−
−
45
90
−
−
µV
µV
noise output voltage
(RMS value)
see Fig.21;
S1 in position 2;
200 Ω between
MIC− and MIC+;
single-ended;
RT = 300 Ω
R7 = 68 kΩ
−
−
100
65
−
−
µV
µV
R7 = 24.9 kΩ
March 1994
21
Philips Semiconductors
Product specification
Low voltage versatile telephone transmission circuit
with dialler interface and transmit level dynamic limiting
TEA1064B
SYMBOL
PARAMETER
CONDITIONS
MIN.
TYP.
MAX.
UNIT
Gain adjustment input GAR (pin 6)
∆Gv
receiving amplifier gain
adjustment range
−11
−
+8
dB
MUTE input (pin 14)
VIH
HIGH level input voltage
1.5 +VEE2
−
−
VCC +0.4
V
VIL
LOW level input voltage
input current
0
−
−
0.3 +VEE2
V
Imute
∆Gv
11
20
µA
dB
change of microphone amplifier
gain at mute on
MUTE = HIGH
−100
−
Gv
voltage gain from input
DTMF-SLPE to QR+ output
with mute on
MUTE = HIGH;
single-ended load;
RL = 300 Ω
−
−18
−
dB
Power-down input PD (pin 15)
VIH
VIL
IPD
HIGH level input voltage
LOW level input voltage
input current
1.5 +VEE2
−
−
5
V
CC1 +0.4 V
0
0.3 +VEE2
V
−
10
µΑ
Automatic gain control input AGC (pin 18)
controlling the gain from
IR (pin 13) to QR+, QR−
(pins 4, 5) and the gain from
MIC+, MIC− (pins 8, 9) to LN (pin 1)
R6 = 93.1 kΩ
(between pins 18 and
11)
Gv
gain control range with respect to
Iline = 15 mA
Iline = 75 mA
−5.7
−
−6.1
24
−6.5
−
dB
Iline
Iline
∆Gv
highest line current for maximum
gain
mA
mA
dB
lowest line current for minimum
gain
−
61
−
change of gain between
−0.9
−1.4
−1.9
Iline = 15 and 35 mA
Microphone mute input DLS/MMUTE (pin 7)
VIL
IIL
LOW level input voltage
VEE1
−
V
EE1 +0.3
V
input current at LOW level input
voltage
−85
−60
−35
µA
trel
release time after a LOW level on
pin 7
C16 = 470 nF
−
−
30
−
ms
dB
∆Gv
change of microphone amplifier
gain at LOW level input voltage
on pin 7
−100
−
March 1994
22
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R16
392 Ω
I
R1
line
620 Ω
16
1
V
LN
CC
13
9
4
5
6
2
3
100 µF
QR−
QR+
IR
V
o
R
L
MIC+
600 Ω
V
i
8
R4
100
kΩ
MIC−
C4
100 pF
C1
100 µF
12
14
15
7
GAR
TEA1064B
DTMF
MUTE
C7 1 nF
11 to
140 mA
GAS1
GAS2
I
R7
68
kΩ
p
PD
10
µF
C6
DLS/MMUTE
100 pF
C15
220
µF
V
V
REG AGC STAB SLPE
EE2
19
EE1
11
V
i
17
C3
18
10
R5
3.6
20
C16
470 nF
R9
20 Ω
4.7
µF
R6
kΩ
MBA443
For measuring gain from MIC+ and MIC− the MUTE input should be LOW or open-circuit.
For measuring the DTMF input, the MUTE input should be HIGH.
Inputs not being tested should be open-circuit.
Fig.20 Test circuit for defining voltage gain of MIC−, MIC+ and DTMF inputs; voltage gain (Gv) is defined as 20log Vo/Vi .
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R16
392 Ω
I
R1
line
R2
130 kΩ
620 Ω
16
1
100 nF
V
LN
S1
CC
2
1
13
9
4
5
6
2
3
QR−
QR+
100 µF
IR
Z
V
T
o
MIC+
R
L
600 Ω
8
R4
100
kΩ
MIC−
C4
100 pF
100
µF
C1
10
µF
12
14
15
7
GAR
TEA1064B
DTMF
MUTE
C7 1 nF
11 to
140 mA
V
i
GAS1
GAS2
R5
3.92 kΩ
I
R7
68
kΩ
p
PD
C6
DLS/MMUTE
100 pF
C15
220
µF
R8
390
Ω
130 Ω
V
V
REG AGC STAB SLPE
EE2
19
EE1
11
17
C3
18
10
R5
3.6
20
C16
220
nF
820
Ω
470 nF
R9
20 Ω
4.7
µF
R6
kΩ
MBA444
ahdnbok,uflapegwidt
Fig.21 Test circuit for defining voltage gain of the receiving amplifier; voltage gain (Gv) is defined as 20log Vo/Vi (with S1 in position 1).
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uflpgaeiwthd
R16
392 Ω
R1
620 Ω
1
16
R10
R2
13 Ω
130 kΩ
C1
100 µF
LN
V
CC
C5
13
4
BAS11
(2×)
+
IR
100 nF
12
14
15
DTMF
MUTE
QR−
QR+
GAR
MIC+
MIC−
from dial
and
control circuits
R13
telephone
line
BZW14
(2×)
R3
3.92 kΩ
5
C4
100 pF
PD
R4
100 kΩ
TEA1064B
6
9
8
C15
220 µF
C7
1 nF
−
7
DLS/MMUTE
R14
19
V
EE2
R17
3.3 kΩ
V
SLPE GAS1 GAS2 REG AGC STAB
EE1
11
20 17 18 10
2
3
R8
390 Ω
R7
68
kΩ
C16
470
nF
C3
4.7
µF
R5
3.6
kΩ
C6
100 pF
R6
Z
bal
R9
20 Ω
MBA445
The diode bridge and R10 limit the current into, and the voltage across, the circuit during line transients.
A different protection arrangement is required for pulse dialling or register recall.
Fig.22 Basic application of TEA1064B with SLPE as supply reference for peripherals, shown here with piezo-electric earpiece and
DTMF dialling.
Philips Semiconductors
Product specification
Low voltage versatile telephone transmission circuit
with dialler interface and transmit level dynamic limiting
TEA1064B
LN
V
DD
DTMF
DTMF
MUTE
PD
cradle
contact
PCD3310
TEA1064B
M
FL
V
V
EE2
V
SLPE
EE1
SS
MBA446
telephone
line
BSN254A
The broken line indicates optional flash (register recall by timed loop break).
Fig.23 Typical DTMF-pulse set application circuit (simplified) showing the TEA1064B with the CMOS bilingual
dialling circuit PCD3310.
March 1994
26
Philips Semiconductors
Product specification
Low voltage versatile telephone transmission circuit
with dialler interface and transmit level dynamic limiting
TEA1064B
PACKAGE OUTLINES
DIP20: plastic dual in-line package; 20 leads (300 mil)
SOT146-1
D
M
E
A
2
A
A
1
L
c
e
w M
Z
b
1
(e )
1
b
M
H
20
11
pin 1 index
E
1
10
0
5
10 mm
scale
DIMENSIONS (inch dimensions are derived from the original mm dimensions)
(1)
A
A
A
(1)
(1)
Z
1
2
UNIT
mm
b
b
c
D
E
e
e
1
L
M
M
H
w
1
E
max.
min.
max.
max.
1.73
1.30
0.53
0.38
0.36
0.23
26.92
26.54
6.40
6.22
3.60
3.05
8.25
7.80
10.0
8.3
4.2
0.51
3.2
2.54
0.10
7.62
0.30
0.254
0.01
2.0
0.068
0.051
0.021
0.015
0.014
0.009
1.060
1.045
0.25
0.24
0.14
0.12
0.32
0.31
0.39
0.33
inches
0.17
0.020
0.13
0.078
Note
1. Plastic or metal protrusions of 0.25 mm maximum per side are not included.
REFERENCES
OUTLINE
EUROPEAN
PROJECTION
ISSUE DATE
VERSION
IEC
JEDEC
EIAJ
92-11-17
95-05-24
SOT146-1
SC603
March 1994
27
Philips Semiconductors
Product specification
Low voltage versatile telephone transmission circuit
with dialler interface and transmit level dynamic limiting
TEA1064B
SO20: plastic small outline package; 20 leads; body width 7.5 mm
SOT163-1
D
E
A
X
c
y
H
E
v
M
A
Z
20
11
Q
A
2
A
(A )
3
A
1
pin 1 index
θ
L
p
L
1
10
w
detail X
e
M
b
p
0
5
10 mm
scale
DIMENSIONS (inch dimensions are derived from the original mm dimensions)
A
max.
(1)
(1)
(1)
UNIT
A
A
A
b
c
D
E
e
H
L
L
Q
v
w
y
θ
1
2
3
p
E
p
Z
0.30
0.10
2.45
2.25
0.49
0.36
0.32
0.23
13.0
12.6
7.6
7.4
10.65
10.00
1.1
0.4
1.1
1.0
0.9
0.4
mm
2.65
0.25
0.01
1.27
0.050
1.4
0.25 0.25
0.01
0.1
8o
0o
0.012 0.096
0.004 0.089
0.019 0.013 0.51
0.014 0.009 0.49
0.30
0.29
0.419
0.394
0.043 0.043
0.016 0.039
0.035
0.016
inches 0.10
0.055
0.01 0.004
Note
1. Plastic or metal protrusions of 0.15 mm maximum per side are not included.
REFERENCES
OUTLINE
EUROPEAN
PROJECTION
ISSUE DATE
VERSION
IEC
JEDEC
EIAJ
95-01-24
97-05-22
SOT163-1
075E04
MS-013AC
March 1994
28
Philips Semiconductors
Product specification
Low voltage versatile telephone transmission circuit
with dialler interface and transmit level dynamic limiting
TEA1064B
Several techniques exist for reflowing; for example,
thermal conduction by heated belt. Dwell times vary
between 50 and 300 seconds depending on heating
method. Typical reflow temperatures range from
215 to 250 °C.
SOLDERING
Introduction
There is no soldering method that is ideal for all IC
packages. Wave soldering is often preferred when
through-hole and surface mounted components are mixed
on one printed-circuit board. However, wave soldering is
not always suitable for surface mounted ICs, or for
printed-circuits with high population densities. In these
situations reflow soldering is often used.
Preheating is necessary to dry the paste and evaporate
the binding agent. Preheating duration: 45 minutes at
45 °C.
WAVE SOLDERING
This text gives a very brief insight to a complex technology.
A more in-depth account of soldering ICs can be found in
our “Data Handbook IC26; Integrated Circuit Packages”
(order code 9398 652 90011).
Wave soldering techniques can be used for all SO
packages if the following conditions are observed:
• A double-wave (a turbulent wave with high upward
pressure followed by a smooth laminar wave) soldering
technique should be used.
DIP
• The longitudinal axis of the package footprint must be
parallel to the solder flow.
SOLDERING BY DIPPING OR BY WAVE
The maximum permissible temperature of the solder is
260 °C; solder at this temperature must not be in contact
with the joint for more than 5 seconds. The total contact
time of successive solder waves must not exceed
5 seconds.
• The package footprint must incorporate solder thieves at
the downstream end.
During placement and before soldering, the package must
be fixed with a droplet of adhesive. The adhesive can be
applied by screen printing, pin transfer or syringe
dispensing. The package can be soldered after the
adhesive is cured.
The device may be mounted up to the seating plane, but
the temperature of the plastic body must not exceed the
specified maximum storage temperature (Tstg max). If the
printed-circuit board has been pre-heated, forced cooling
may be necessary immediately after soldering to keep the
temperature within the permissible limit.
Maximum permissible solder temperature is 260 °C, and
maximum duration of package immersion in solder is
10 seconds, if cooled to less than 150 °C within
6 seconds. Typical dwell time is 4 seconds at 250 °C.
REPAIRING SOLDERED JOINTS
A mildly-activated flux will eliminate the need for removal
of corrosive residues in most applications.
Apply a low voltage soldering iron (less than 24 V) to the
lead(s) of the package, below the seating plane or not
more than 2 mm above it. If the temperature of the
soldering iron bit is less than 300 °C it may remain in
contact for up to 10 seconds. If the bit temperature is
between 300 and 400 °C, contact may be up to 5 seconds.
REPAIRING SOLDERED JOINTS
Fix the component by first soldering two diagonally-
opposite end leads. Use only a low voltage soldering iron
(less than 24 V) applied to the flat part of the lead. Contact
time must be limited to 10 seconds at up to 300 °C. When
using a dedicated tool, all other leads can be soldered in
one operation within 2 to 5 seconds between
270 and 320 °C.
SO
REFLOW SOLDERING
Reflow soldering techniques are suitable for all SO
packages.
Reflow soldering requires solder paste (a suspension of
fine solder particles, flux and binding agent) to be applied
to the printed-circuit board by screen printing, stencilling or
pressure-syringe dispensing before package placement.
March 1994
29
Philips Semiconductors
Product specification
Low voltage versatile telephone transmission circuit
with dialler interface and transmit level dynamic limiting
TEA1064B
DEFINITIONS
Data sheet status
Objective specification
Preliminary specification
Product specification
This data sheet contains target or goal specifications for product development.
This data sheet contains preliminary data; supplementary data may be published later.
This data sheet contains final product specifications.
Limiting values
Limiting values given are in accordance with the Absolute Maximum Rating System (IEC 134). Stress above one or
more of the limiting values may cause permanent damage to the device. These are stress ratings only and operation
of the device at these or at any other conditions above those given in the Characteristics sections of the specification
is not implied. Exposure to limiting values for extended periods may affect device reliability.
Application information
Where application information is given, it is advisory and does not form part of the specification.
LIFE SUPPORT APPLICATIONS
These products are not designed for use in life support appliances, devices, or systems where malfunction of these
products can reasonably be expected to result in personal injury. Philips customers using or selling these products for
use in such applications do so at their own risk and agree to fully indemnify Philips for any damages resulting from such
improper use or sale.
March 1994
30
Philips Semiconductors
Product specification
Low voltage versatile telephone transmission circuit
with dialler interface and transmit level dynamic limiting
TEA1064B
NOTES
March 1994
31
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5600 MD EINDHOVEN, The Netherlands, Fax. +31 40 27 24825
© Philips Electronics N.V. 1998
SCA60
All rights are reserved. Reproduction in whole or in part is prohibited without the prior written consent of the copyright owner.
The information presented in this document does not form part of any quotation or contract, is believed to be accurate and reliable and may be changed
without notice. No liability will be accepted by the publisher for any consequence of its use. Publication thereof does not convey nor imply any license
under patent- or other industrial or intellectual property rights.
Printed in The Netherlands
415102/00/02/pp32
Date of release: March 1994
Document order number: 9397 750 nnnnn
相关型号：
TEA1067N
IC TELEPHONE SPEECH CKT, PDIP18, 0.300 INCH, PLASTIC, SOT-102, DIP-18, Telephone Circuit
NXP
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