TEA1065 [NXP]

Versatile telephone transmission circuit with dialler interface; 与拨号接口的多功能电话传输电路


型号：	TEA1065
厂家：	NXP
描述：	Versatile telephone transmission circuit with dialler interface 与拨号接口的多功能电话传输电路电话
文件：	总28页 (文件大小：153K)
中文：	中文翻译
下载：	下载PDF数据表文档文件

INTEGRATED CIRCUITS

DATA SHEET

TEA1065

Versatile telephone transmission

circuit with dialler interface

March 1994

Product speciﬁcation

File under Integrated Circuits, IC03A

Philips Semiconductors

Product speciﬁcation

Versatile telephone transmission circuit with

dialler interface

TEA1065

• Large gain setting range on microphone and earpiece

FEATURES

amplifiers

• Current and voltage regulator mode with adjustable

• Line loss compensation facility, line current dependent

(on microphone and earpiece amplifiers)

static resistances

• Provides supply for external circuitry

• Adjustable gain control

• Symmetrical high-impedance inputs for piezoelectric

microphone

• DC line voltage adjustment facility

• Asymmetrical high-impedance input for electret

microphone

GENERAL DESCRIPTION

• DTMF signal input with confidence tone

The TEA1065 is a bipolar integrated circuit which performs

all speech and line interface functions that are required in

fully electronic telephone sets with adjustable DC mask.

The circuit performs electronic switching between dialling

and speech internally.

• Mute input for pulse or DTMF dialling

• Power-down input for pulse dial or register recall

• Digital pulse input to drive an external switch transistor

• Receiving amplifier for magnetic, dynamic or

piezoelectric earpieces

ORDERING INFORMATION

PACKAGE

EXTENDED TYPE

NUMBER

PINS

PIN POSITION

MATERIAL

plastic

CODE

SOT101L

TEA1065

DIL

TEA1065T

SO24

plastic

SOT137A

Notes

1. SOT101-1; 1998 Jun 18.

2. SOT137-1; 1998 Jun 18.

QUICK REFERENCE DATA

SYMBOL

PARAMETER

CONDITIONS

I_line= 15 mA

MIN.

TYP.

4.45

MAX.

UNIT

V_LN

I_line

I_CC

line voltage

4.25

4.65

150

normal operation line current range

internal supply consumption

power-down input LOW

−

1.14

1.5

power-down input HIGH

105

µA

V_CC

supply voltage for peripherals

I_line= 15 mA;

MUTE input

HIGH

I_P= 1.2 mA

2.7

2.5

−

I_P= 1.55 mA

G_V

voltage gain range

microphone amplifier

earpiece amplifier

−

∆G_V

line loss compensation

gain control range

−5.5

−25

−5.9

−6.3

+75

T_amb

operating ambient temperature range

−

°C

March 1994

Philips Semiconductors

Product speciﬁcation

Versatile telephone transmission circuit with

dialler interface

TEA1065

handbook, full pagewidth

GAR

−

QR+

QR−

−

TEA1065

GAS1

MIC+

MIC−

−

SLPE

GAS2

DTMF

MUTE

BANDGAP

REFERENCE

VBG

SUPPLY AND

REFERENCE

REFI

DOC

CONTROL

CURRENT

LINE

CURRENT

CONTROL

−

CURRENT

REFERENCE

REG

AGC

MBA557

STAB

DPI VSI CURL

Fig.1 Block diagram.

March 1994

Philips Semiconductors

Product speciﬁcation

Versatile telephone transmission circuit with

dialler interface

TEA1065

PINNING

SYMBOL PIN

DESCRIPTION

positive line terminal

GAS1

GAS2

QR−

QR+

gain adjustment; sending ampliﬁer

inverting output; receiving ampliﬁer

handbook, halfpage

GAS1

GAS2

QR−

24 SLPE

23 AGC

22 REG

non-inverting output; receiving

ampliﬁer

GAR

MIC−

MIC+

STAB

DPI

gain adjustment; receiving ampliﬁer

inverting microphone input

non-inverting microphone input

current stabilizer

QR+

20 MUTE

GAR

MIC−

MIC+

STAB

DPI

DTMF

TEA1065

10 digital pulse input

VBG

DOC

REFI

VSI

11 bandgap output reference

12 drive current output

13 reference voltage input

14 voltage sense input

CURL

VSI

VBG

CURL

V_EE

15 current limitation input

16 negative line terminal

17 receiving ampliﬁer input

18 power-down input

DOC 12

REFI

MBA551

DTMF

MUTE

V_CC

19 dual-tone multifrequency input

20 MUTE input

21 positive supply decoupling

22 voltage regulator decoupling

23 automatic gain control input

24 slope (DC resistance) adjustment

REG

AGC

SLPE

Fig.2 Pinning diagram.

March 1994

Philips Semiconductors

Product speciﬁcation

Versatile telephone transmission circuit with

dialler interface

TEA1065

This line current value will be reached when the voltage on

pin VSI (almost equal to the voltage on pin SLPE) exceeds

the voltage on pin REFI (equal to the voltage on pin VBG

divided by the resistor tap R13, R14). For other values of

R13 and R14, the I_kneecurrent is given by the following

formula:

FUNCTIONAL DESCRIPTION

Supply: V_CC, LN, SLPE, REG and STAB

The circuit and its peripherals are usually supplied from the

telephone line. The circuit develops its own supply voltage

at V_CC(pin 21) and regulates its voltage drop between LN

and SLPE (pins 1 and 24). The internal supply requires a

decoupling capacitor between V_CCand V_EE(pin 16); the

internal voltage regulator has to be decoupled by a

capacitor from REG (pin 22) to V_EE. The internal current

stabilizer is set by a 3.6 kΩ resistor connected between

I_knee= I_CC+ I_P+ (VBG/R9) × {R14/(R14 + R13)}

− (R15/R9) × I_O(VSI)

I_CCis the current required by the circuit itself

(typ. 1.14 mA). I_Pis the current required by the peripheral

circuits connected between V_CCand V_EE. I_O(VSI)is the

output current from pin VSI (typ. 2.5 µA).

STAB (pin 9) and V_EE

The TEA1065 can be set either in a DC voltage regulator

mode or in a DC current regulator mode. The DC mask can

be selected by connecting the appropriate external

components to the dedicated pins (VSI, REFI, DOC,

VBG).

When the DC current regulator mode is not required it can

be cancelled by connecting pin VSI to V_EE; pins REFI,

VBG and DOC are left open-circuit.

The DC slope of the V_line/I_linecurve is, in this mode,

determined by R9 (R9 = R9a + R9b) in series with the

r_dsof the external line current control transistor (see Fig.4;

r_ds= ∂V_GS/∂I_Dat V_GS= V_DS).

Current regulator mode

The current regulator mode is achieved when the line

current is greater than I_knee. In this mode, the slope of the

V_line/I_linecurve is approximately 1300 Ω with R9 = 20 Ω,

R16 = 1 MΩ, R13 = R14 = 30 kΩ. For other values of

these resistances, the slope value can be approximated by

the following formula:

Voltage regulator mode

The voltage regulator mode is achieved when the line

current is less than the current I_kneeas illustrated in Fig.3.

With R13 = R14 = 30 kΩ, the current I_knee= 30 mA

(I_p= 0 mA).

R9 × {1 + R16 × (1/R13 + 1/R14)}

MBA567

handbook, full pagewidth

line

current

knee

set

voltage

regulator

mode

current

regulator

mode

Fig.3 Voltage and current regulator mode.

March 1994

Philips Semiconductors

Product speciﬁcation

Versatile telephone transmission circuit with

dialler interface

TEA1065

The DC current flowing into the set is determined by the

exchange supply voltage (V_exch), the DC resistance of the

subscriber line (R_line) and the DC voltage on the subscriber

set (see Fig.4).

If the line current exceeds I_CC+ 0.3 mA, required by the

circuit itself (I_CC≈ 1.14 mA), plus the current I_prequired by

the peripheral circuits connected to V_CCthen the voltage

regulator will divert the excess current via LN.

I_linein the current regulator mode).

Under normal conditions I_SLPE>> I_CC+ 0.3 mA + I_pand

for the voltage regulator mode (I_line< I_knee), the static

behaviour of the circuit is equal to a 4.18 V voltage

regulator diode with an internal resistance of R9 in series

with the V_GSonof the external line current control

transistor. For the current regulator mode (I_line> I_knee), the

static behaviour of the circuit is equal to a 4.18 V voltage

regulator diode with an internal resistance of R9 in series

with the V_GSonof the external line current control transistor

and also in series with a DC voltage source R16

V_LN= V_ref+ I_SLPE× R9 =

_ref+ (I_line− I_CC− 0.3 × 10⁻³− I_p) × R9

where: V_refis an internally generated temperature

compensated reference voltage of 4.18 V and R9 is an

× I_DOC(the preferred value of R16 is 1 MΩ at this value the

current I_DOCis negligible compared to I_line).

external resistor connected between SLPE and V_EE

In the audio frequency range the dynamic impedance

between LN and V_EEis equal to R1 (see Fig.8). The

internal reference voltage V_refcan be adjusted by means

of an external resistor R_VA. This resistor, connected

between LN and REG, will decrease the internal reference

voltage. When R_VAis connected between REG and SLPE

the internal reference voltage will increase.

The maximum allowed line current is given in Figs 5 and 6,

where the current is shown as a function of the required

reference voltage, ambient temperature and applied

package.

The preferred value of R9 is 20 Ω. Changing R9 will

influence the microphone gain, gain control

characteristics, sidetone and the maximum output swing

on LN. In this instance, the voltage on the line (excluding

the diode rectifier bridge; see Fig.4) is:

V_line= V_LN+ V_GS+ R16 × I_DOC

where: V_GSis the voltage drop between the gate and

source terminal of the external line current control

transistor and I_DOCis the current sunk by pin DOC

(I_DOC= 0 in the voltage regulator mode and increases with

handbook, full pagewidth

line

DOC

SLPE

+ 0.5 mA

R16

DOC

exch

TEA1065

0.3 mA

peripheral

circuits

exch

STAB

REG

SLPE

MBA550

Fig.4 Supply arrangement.

March 1994

Philips Semiconductors

Product speciﬁcation

Versatile telephone transmission circuit with

dialler interface

TEA1065

The current I_p, available from V_CCfor supplying peripheral

circuits, depends on the external components and on the

line current. Fig.7 shows this current for V_CC> 2.2 V and

for V_CC> 3 V, where 3 V is the minimum supply voltage for

most CMOS circuits including a diode voltage drop for a

back-up diode. If MUTE is LOW the available current is

further reduced when the receiving amplifier is driven

(earpiece amplifier supplied from V_CC).

MBA570

MBA571

handbook, halfpage

170

(mA)

150

(mA)

150

130

110

130

110

(1)

(2)

(3)

(2)

(4)

(5)

-V (V)

LN SLPE

T_amb

P_tot

(1)

(2)

(3)

(4)

(5)

35 °C

45 °C

55 °C

65 °C

75 °C

1.2

1.07 W

0.93 W

T_amb

P_tot

(1)

(2)

65 °C

75 °C

1.2 W

1.0 W

0.8

0.67 W

Fig.5 TEA1065 safe operating area.

Fig.6 TEA1065T safe operating area.

March 1994

Philips Semiconductors

Product speciﬁcation

Versatile telephone transmission circuit with

dialler interface

TEA1065

MBA569

handbook, halfpage

(mA)

(1)

(2)

(3)

(4)

(V)

I_line= 15 mA at V_LN= 4.45 V

R1 = 620 Ω

R9 = 20 Ω

Curve (1) and (3) are valid when the receiving amplifier is not driven or when MUTE = HIGH, curves (2) and (4)

are valid when MUTE = LOW and the receiving amplifier is driven, V_o(rms)= 150 mV, R_L= 150 Ω (asymmetrical).

(1) = 2.2 mA; (2) = 1.77 mA; (3) = 0.78 mA and (4) = 0.36 mA.

Fig.7 Maximum current I_pavailable from V_CCfor external (peripheral) circuitry with V_CC> 2.2 V and V_CC> 3 V.

handbook, halfpage

ref

REG

SLPE

4.7 µF

20 Ω

MBA552

L_eq= C3 × R9 × R_p

R_p= 17.5 kΩ

Fig.8 Equivalent circuit impedance between LN

and V_EE

March 1994

Philips Semiconductors

Product speciﬁcation

Versatile telephone transmission circuit with

dialler interface

TEA1065

The gain of the microphone amplifier is proportional to

external resistor R7, connected between GAS1 and

GAS2, which can be adjusted between 30 dB and 46 dB to

suit the sensitivity of the transducer.

Microphone inputs MIC+ and MIC− and gain

adjustment connections GAS1 and GAS2

The TEA1065 has symmetrical microphone inputs, its

input impedance is 40.8 kΩ (2 × 20.4 kΩ) and its voltage

gain is typ. 38 dB with R7 = 68 kΩ. Either dynamic,

magnetic or piezoelectric microphones can be used, or an

electret microphone with a built-in FET buffer.

Arrangements for the microphones types are illustrated in

Fig.9.

An external 100 pF capacitor (C6) is required between

GAS1 and SLPE to ensure stability. A larger value of C6

may be chosen to obtain a first-order low-pass filter. The

“cut-off” frequency corresponds with the time constant

R7 × C6.

handbook, full pagewidth

MIC+

MIC−

MIC+

MIC−

(1)

MIC−

MBA553

(c)

(a)

(b)

(b) electret microphone;

(a) magnetic or dynamic microphone,

the resistor (1) may be connected to

reduce the terminating impedance, or

for sensitive types a resistive

attenuator can be used to prevent

overloading the microphone inputs;

Fig.9 Microphone arrangements.

March 1994

Philips Semiconductors

Product speciﬁcation

Versatile telephone transmission circuit with

dialler interface

TEA1065

QR− (inverting). These outputs may be used for

MUTE input

single-ended or differential drive, depending on the type

and sensitivity of the earpiece used (see Fig.10). Gain

from IR to QR+ is typically 31 dB with R4 = 100 kΩ, which

is sufficient for low-impedance magnetic or dynamic

earpieces which are suitable for single-ended drive. By

using both outputs (differential drive) the gain is increased

by 6 dB. Differential drive can be used when earpiece

impedance exceeds 450 Ω as with high impedance

dynamic, magnetic or piezoelectric earpieces.

When MUTE = HIGH the DTMF input is enabled and the

microphone and receiving amplifier inputs are inhibited.

When MUTE = LOW or open-circuit the DTMF input is

inhibited and the microphone and receiving amplifier

inputs are enabled. Switching the MUTE input will cause

negligible clicks at the earpiece outputs and on the line. An

electrostatic discharge protection diode is connected

between pin MUTE and pin V_CC(pins 20 and 21).

The output voltage of the receiving amplifier is specified for

continuous-wave drive. The maximum output voltage will

be higher under speech conditions where the ratio of peak

and RMS value is higher.

Dual-tone multifrequency input DTMF

When the DTMF input is enabled, dialling tones may be

sent onto the line. The voltage gain from DTMF to LN is

typ. 12.5 dB less than the gain of the microphone amplifier

and varies with R7 in the same way as the gain of the

microphone amplifier. This means that the tone level at the

DTMF input has to be adjusted after setting the gain of the

microphone amplifier. When R7 = 68 kΩ the gain is

typically 25.5 dB. The signalling tones can be heard in the

earpiece at a low level (confidence tone).

The gain of the receiving amplifier can be adjusted over a

range of −11 dB to +8 dB to suit the sensitivity of the

transducer that is used. The gain is proportional to external

resistor R4 connected between GAR and QR+.

Two external capacitors, C4 = 100 pF and C7 = 1 nF, are

necessary to ensure stability. A larger value of C4 may be

chosen to obtain a first-order low-pass filter. The “cut-off”

frequency corresponds with the time constant R4 × C4.

Receiving ampliﬁers: IR, QR+, QR− and GAR

The receiving amplifier has one input IR and two

complementary outputs, QR+ (non-inverting) and

handbook, full pagewidth

(1)

(2)

QR+

QR−

QR+

QR−

MBA554

(a)

(b)

(c)

(d)

Fig.10 Alternative receiver arrangements:

(a) dynamic earpiece with an impedance less than 450 Ω;

(b) dynamic earpiece with an impedance more than 450 Ω;

distortion (inductive load);

(d) piezoelectric earpiece, resistor (2) is required to increase the phase margin (stability with capacitive

load).

March 1994

Philips Semiconductors

Product speciﬁcation

Versatile telephone transmission circuit with

dialler interface

TEA1065

Automatic gain control

Automatic compensation of line loss is obtained by connecting a resistor (R6) between AGC and V_EE. The automatic gain

control varies the gain of the microphone amplifier and receiving amplifier in accordance with the DC line current (see

Fig.12). The control range is 5.9 dB; this corresponds to a line length of 3.5 km of twisted pair cable (see Fig.11). The

DTMF gain is not affected by this feature.

If automatic line loss compensation is not required the AGC pin can be left open-circuit, the amplifiers then give their

maximum gain.

75 µH

24.3 nF

34.8 Ω

handbook, full pagewidth

13 nF

24.3 nF

75 µH

34.8 Ω

MBA572

Fig.11 Typical 0.5 km line cell model used for automatic gain control optimization.

handbook, full pagewidth

MBA549

R6 = ∞

∆G

(dB)

−1

−3

−5

−7

R6 = 86.6 kΩ 118 kΩ 147 kΩ

187 kΩ

(mA)

line

Fig.12 Variation of gain as a function of line current with R6 as a parameter; R9 = 20 Ω.

March 1994

Philips Semiconductors

Product speciﬁcation

Versatile telephone transmission circuit with

dialler interface

TEA1065

activated.

Power-down input PD

The voltage applied on pin REFI represents a fraction of

the bandgap reference voltage given by pin VBG (resistor

During pulse dialling or register recall (timed-loop-break)

the telephone line is interrupted, consequently it provides

no supply for the transmission circuit and the peripherals

connected to V_CC. These gaps have to be bridged by the

charge in the smoothing capacitor C1. The requirement on

this capacitor is relaxed by applying a HIGH level to the PD

input during the loop-break. This reduces the internal

supply current from typ. 1.14 mA to 73 µA.

tap R13 and R14) in order to determine I_knee

Drive current output DOC

Pin DOC drives the external line current control transistor

in order to achieve line interruption during pulse dialling (or

The current sunk by pin DOC is determined by the voltage

on pin VSI in comparison with the voltage on pin VBG

divided by the resistor tap R13 and R14.

When pin DPI is activated, pin DOC changes to a low

voltage (by trying to sink typ. 900 µA to V_EE) to switch off

the external line current control transistor.

A HIGH level at PD also disconnects the capacitor at REG

which results in the voltage stabilizer having no switch-on

delay after line interruptions. This results in no contribution

of the IC to the current waveform during pulse dialling or

left open-circuit or connected to V_EE. An electrostatic

discharge protection diode is connected between pin PD

Bandgap reference output VBG

and V_CC

This output provides a voltage reference to set the knee

line current with the following formula:

Digital pulse input DPI

A HIGH level at DPI creates a current which flows from pin

DOC to V_EEin order to interrupt the line current by the

external line current control transistor (see Fig.18;

MOSFET BUK554). A LOW level (or pin left open-circuit)

disables this current to provide the normal DC regulation

(voltage or current). A simple application without

regulation of current in pulse dialling mode is given in

Fig.18.

_knee= I_CC+ I_P+

(VBG/R9) × {R14/(R14 + R13)} − (R15/R9) × 2.5 × 10⁻⁶

In order to improve stability, a capacitive load is not

allowed on this output.

Current limit input CURL

This input is applied to the base of an internal NPN

transistor which has its collector connected to pin DOC

and its emitter to V_EE(see Fig.13). The transistor limits the

line current just after hook-off or during line transients to a

value given by the following formula:

When DPI is activated (HIGH level), the external line

current control transistor is switched off resulting in no

current in the TEA1065. The voltage on pin SLPE

becomes zero and capacitor C15 discharges cancelling

the current regulation when DPI becomes inactive (LOW

level).

I_hook-off= I(R1) + V_BE/R9b

V_BEis the base-emitter voltage of the transistor

(typ. 700 mV at 25 °C). I(R1) is the current flowing through

R1 to charge C1 just after hook-off.

To provide a constant regulation (in speech mode and

pulse mode), an external transistor is required to keep C15

charged during DPI active (see Fig.19 in which the Field

Effect Transistor BSJ177 is directly driven by the DPI

signal).

DOC

handbook, halfpage

An electrostatic discharge protection diode is connected

(collector current)

between pin DPI and pin V_CC

CURL

Voltage sense input and reference voltage input VSI

and REFI

The voltage on pin VSI represents the DC voltage of pin

SLPE. The RC filter (R15 × C15) is also intended to

disable the DC regulation when C15 is shunted or not yet

charged (especially directly after hook-off). The time

constant R15 × C15 determines approximately the time

when no regulation (except CURL pin limitation) is

MBA556

Fig.13 Internal current limiting transistor.

March 1994

Philips Semiconductors

Product speciﬁcation

Versatile telephone transmission circuit with

dialler interface

TEA1065

The maximum hook-off current then becomes:

I_hook-off= V_Z/R1 + V_BE

also depends on the accuracy of the match between

Z_baland the impedance of the average line.

(R9a + R9b + R1)/(R1 × R9b)

Example

where V_Zis the Zener voltage of diode D5 (see Fig.18).

With k = 1, R1 = 619 Ω, R9 = 20 Ω and an average line

impedance represented by 270 Ω + (120 nF // 1100 Ω), the

calculation results in:

Side-tone suppression

Suppression of the transmitted signal in the earpiece is

obtained by the anti-sidetone network comprising R1//Z_line

R2, R3, R9 and Z_bal(see Fig.18). Maximum compensation

is obtained when the following conditions are fulfilled:

• R2 = 130 kΩ

• R3 = 3650 Ω

• R8 = 715

Ω

The anti-sidetone network for the TEA1060 family, shown

in Fig.15, attenuates the signal received from the line by

32 dB before it enters the receiving amplifier. The

attenuation is almost constant over the whole

audio-frequency range.

a) R9 × R2 = R1 × (R3 + R8)

b) k = R3 × (R8 + R9)/(R2 × R9)

c) Z_bal= k × Z_line

The scale factor k is chosen to meet the compatibility with

a standard capacitor from the E6 or E12 range for Z_bal.

Note

In practice Z_linevaries considerably with the line length and

line type. Therefore, the value chosen for Z_balshould be for

an average line length giving satisfactory sidetone

More information on the balancing of the anti-sidetone

bridges can be obtained in our publication “Versatile

speech transmission ICs for electronic telephone sets”,

order number 9398 341 10011.

suppression with long and short times. The suppression

handbook, full pagewidth

MBA568

line

hook-off

time

hook-off

speech mode pulse dialling mode

Fig.14 Example of line current shape in pulse dialling mode (see also Fig.18).

March 1994

Philips Semiconductors

Product speciﬁcation

Versatile telephone transmission circuit with

dialler interface

TEA1065

handbook, full pagewidth

line

bal

SLPE

MBA555

Fig.15 Equivalent circuit of TEA1060 family anti-sidetone bridge.

LIMITING VALUES

In accordance with the absolute maximum system (IEC 134)

SYMBOL

V_LN

PARAMETER

CONDITIONS

MIN.

MAX.

UNIT

positive line voltage continuous

positive DOC voltage continuous

−

V_DOC

V_LN

repetitive line voltage during

switch-on or line interruption

13.2

I_LN

V_I

line current (see also Fig.5 and 6)

−

150

input voltage on pins other than LN,

DOC, VSI, REFI and CURL

_EE− 0.7

V_CC+ 0.7

P_tot

total power dissipation

see Figs 5 and 6

T_stg

T_amb

storage temperature range

−40

−25

+ 125

+75

°C

operating ambient temperature

range

T_j

junction temperature

−

+125

°C

THERMAL RESISTANCE

SYMBOL

PARAMETER

TYP.

MAX.

UNIT

R_{th j-a}

from junction to ambient in free air; TEA1065

from junction to ambient in free air; TEA1065T ⁽¹⁾

−

K/W

Note

1. TEA1065T is mounted on glassy epoxy board 28.5 × 19.1 × 1.5 mm

HANDLING

Every pin withstands the ESD test in accordance with MIL-STD-883C class 2, method 3015 (HBM 1500 Ω, 100 pF,

3 positive pulses and 3 negative pulses on each pin as a function of pin V_EE

March 1994

Philips Semiconductors

Product speciﬁcation

Versatile telephone transmission circuit with

dialler interface

TEA1065

CHARACTERISTICS

I_LN= 10 to 150 mA; V_EE= 0 V; f = 800 Hz; T_amb= 25 °C; R9 = 20 Ω; unless otherwise speciﬁed

SYMBOL

Supply LN and V_CC(pins 1 and 21)

V_LNvoltage drop over circuit

PARAMETER

CONDITIONS

MIN.

TYP.

MAX.

UNIT

I_line= 5 mA

_line= 15 mA

3.95

4.25

4.55

4.25

5.4

−

4.45

6.1

−

4.65

6.7

7.5

I_line= 100 mA

I_line= 140 mA

I_line= 15 mA

∆V_LN/∆T variation with temperature

−3

−1

mV/K

V_LN

voltage drop over circuit

I_line= 15 mA

R_VA= R_1-22= 68 kΩ

3.6

4.7

−

3.9

5.0

1.14

4.15

5.3

R_VA= R_22-24= 39 kΩ

I_CC

supply current

PD = LOW; V_CC= 2.8 V

PD = HIGH; V_CC= 2.8 V

1.5

µA

−

105

Microphone inputs MIC+ and MIC− (pins 8 and 7)

Z_I

G_v

input impedance

18.5

20.4

24.3

kΩ

voltage gain

I_line= 15 mA; R7 = 68 kΩ

I_line= 15 mA;

∆G_vf

variation with frequency

referred to 800 Hz

variation with temperature

referred to 25 °C

−0.5

±0.2

+0.5

f = 300 to 3400 Hz

I_line= 50 mA;

∆G_vT

−

±0.5

−

T_amb= −25 to 75 °C;

without R6

Dual-tone multi-frequency input DTMF (pin 19)

Z_I

G_v

input impedance

16.8

24.5

−0.5

20.7

25.5

±0.2

24.6

26.5

+0.5

kΩ

voltage gain

I_line= 15 mA; R7 = 68 kΩ

I_line= 15 mA

∆G_vf

variation with frequency

referred to 800 Hz

variation with temperature

referred to 25 °C

f = 300 to 3400 Hz

I_line= 50 mA;

∆G_vT

−

±0.5

−

T_amb= −25 to +75 °C

Gain adjustment GAS1 and GAS2 (pin 2 and 3)

∆G_v

gain variation with R7

−8

−

connected between pins 2 and 3;

transmitting ampliﬁer

March 1994

Philips Semiconductors

Product speciﬁcation

Versatile telephone transmission circuit with

dialler interface

TEA1065

SYMBOL

PARAMETER

CONDITIONS

MIN.

TYP.

MAX.

UNIT

Transmitting ampliﬁer output LN (pin 1)

V_LN(rms)

output voltage (RMS value)

I_line= 15 mA

_tot= 2%

_tot= 10%

1.9

2.3

−

2.6

V_no(rms)

noise output voltage (RMS

value)

I_line= 15 mA;

−68

dBmp

R7 = 68 kΩ;

pin 7 and 8 open-circuit

psophometrically

weighted (P53 curve);

control transistor included

(MOS BUK554 type see

Fig.18)

Receiving ampliﬁer input IR (pin 17)

Z_Iinput impedance

Receiving ampliﬁer outputs QR+ and QR− (pin 5 and 4)

kΩ

Z_O

G_v

output impedance

voltage gain

−

Ω

I_line= 15 mA; R4 = 100 kΩ

single-ended; RT = 300 Ω 30

differential; RT = 600 Ω

∆G_vf

variation with frequency

referred to 800 Hz

f = 300 to 3400 Hz

−0.5

±0.2

+0.5

∆G_vT

V_O(rms)

variation with temperature

referred to 25 °C

without R6; I_line= 50 mA;

T_amb= −25 to +75 °C

−

±0.2

−

output voltage (RMS value)

I_line= 15 mA; THD = 2%;

sinewave drive;

R4 = 100 kΩ

single-ended; RT = 150 Ω 0.3

0.38

0.72

1.07

−

differential; RT = 450 Ω

differential; CT = 60 nF;

(1500 Ω series resistor);

f = 3400 Hz

0.56

0.87

I_line= 30 mA; differential;

1.02

1.22

−

CT = 60 nF;

(1500 Ω series resistor);

f = 3400 Hz

V_O(rms)

noise output voltage (RMS

value)

I_line= 15 mA;

R4 = 100 kΩ

single-ended; RT = 300 Ω

differential; RT = 600 Ω

−

µV

100

March 1994

Philips Semiconductors

Product speciﬁcation

Versatile telephone transmission circuit with

dialler interface

TEA1065

SYMBOL

PARAMETER

CONDITIONS

MIN.

TYP.

MAX.

UNIT

Gain adjustment GAR (pin 6)

∆G_v

receiving ampliﬁer, gain

adjustment range

−11

−

Mute input MUTE (pin 20)

V_IH

input voltage HIGH

input voltage LOW

input current

1.5

−

V_CC

0.3

−

V_IL

I_MUTE

∆G_v

−

µA

change of microphone ampliﬁer

gain

MUTE = HIGH

−

−70

G_v

voltage gain from DTMF input

to QR+ or QR−

MUTE = HIGH;

−19

−17

−15

R4 = 100 kΩ

single-ended; RT = 300 Ω

Power-down input PD (pin 18)

V_IH

V_IL

I_PD

input voltage HIGH

input voltage LOW

input current

1.5

V_CC

0.3

5.0

2.5

µA

Automatic gain control input AGC (pin 23)

∆G_v

controlling the gain from IR to

QR+, QR− and the gain from

MIC+, MIC− to LN; gain control

range with respect to

R6 = 118 kΩ

−5.5

−5.9

−6.3

I_line= 15 mA

I_line

∆G_v

highest line current for

maximum gain

−

lowest line current for minimum

gain

change of gain between

-1.5

I_line= 15 and 35.5 mA

Current limiting input CURL (pin 15)

V_BE

base-emitter voltage drop of

internal transistor

see Fig.13;

−

0.7

120

−

I_C= 50 µA = I_DOC

see Fig.13;

H_FE

current gain of internal

transistor

−

I_C= 50 µA = I_DOC

see Fig.13

I_C(max)

maximum collector current of

internal transistor

Bandgap reference voltage output VBG (pin 12)

V_BG

I_BG

Z_O

reference voltage

output drive capability

output impedance

−

1.22

−

note 1

−100

+50

−

µA

Ω

−

March 1994

Philips Semiconductors

Product speciﬁcation

Versatile telephone transmission circuit with

dialler interface

TEA1065

SYMBOL

Voltage sense input VSI (pin 14)

I_Ooutput current

Reference input REFI (pin 13)

I_Ooutput current

Drive current output DOC (pin 11)

I_Ooutput current

PARAMETER

CONDITIONS

MIN.

TYP.

MAX.

UNIT

pin VSI connected to V_EE

−

−2.5

−

µA

−

2.0

REFI connected to V_EE

VSI not connected;

DPI = LOW

;

120

200

300

−

µA

REFI not connected;

900

−

µA

VSI connected to V_EE

;

DPI = HIGH

Digital pulse input DPI (pin 10)

V_IH

V_IL

I_DPI

input voltage HIGH

input voltage LOW

input current

1.5

−

V_CC

0.3

−

2.5

µA

Note

1. No capacitive load on the V_BGoutput. Positive current is defined as conventional current flow into a device.

Negative current is defined as conventional current flow out of a device.

March 1994

Philips Semiconductors

Product speciﬁcation

Versatile telephone transmission circuit with

dialler interface

TEA1065

line

handbook, full pagewidth

620 Ω

REFI

DOC

VBG

100 µF

QR−

QR+

MIC+

MIC−

600 Ω

100

kΩ

100 pF

CURL

GAR

TEA1065

DTMF

MUTE

100 µF

C7 1 nF

5 to

140 mA

GAS1

DPI

kΩ

10 µF

100 pF

VSI

GAS2

REG

4.7

µF

AGC

STAB

SLPE

118

kΩ

3.6

kΩ

20 Ω

MBA558

Voltage gain is defined as G_v= 20 Log V_o/V_i. For measuring the gain from MIC+

and MIC− the MUTE input should be LOW or open-circuit, for measuring the DTMF

input MUTE should be HIGH. Inputs not under test should be open-circuit except VSI

that should be connected to V_EE

Fig.16 Test circuit for defining voltage gain of MIC+, MIC− and DTMF inputs.

March 1994

Philips Semiconductors

Product speciﬁcation

Versatile telephone transmission circuit with

dialler interface

TEA1065

handbook, full pagewidth

line

620 Ω

REFI

DOC

VBG

100 µF

QR−

QR+

MIC+

MIC−

600 Ω

100

kΩ

100 pF

CURL

GAR

TEA1065

DTMF

MUTE

100 µF

C7 1 nF

5 to

140 mA

GAS1

DPI

10 µF

kΩ

100 pF

VSI

GAS2

REG

4.7

µF

AGC

STAB

SLPE

118

kΩ

3.6

kΩ

20 Ω

MBA559

Voltage gain is defined as G_v= 20 Log V _o/V_i.

Fig.17 Test circuit for defining voltage gain of the receiving amplifier.

March 1994

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ahdnbok,uflapegwidt

R16

1 MΩ

MOSN1

BUK554

620 Ω

100 µF

DOC

130 kΩ

BAS11

(4×)

DTMF

100 nF

from dial

and

QR−

control circuits

MUTE

R11

telephone

line

3.65

kΩ

QR+

−

100 pF

100 kΩ

TEA1065

GAR

DPI

1 nF

MIC+

MIC−

BZX79c

BV2

AGC

SLPE GAS1

GAS2 VSI

REFI VBG CURL STAB REG

13 11 15 22

R13

kΩ

68 kΩ

100 pF

R15

715 Ω

15 kΩ

R14

kΩ

3.6

kΩ

C15

6.8 µF

4.7 µF

R9a

15 Ω

bal

R9b

5 Ω

MBA561

Fig.18 Typical application of the TEA1065, with a piezoelectric earpiece and DTMF dialling.

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ahdnbok,uflapegwidt

R16

1 MΩ

MOSN1

BUK554

620 Ω

DOC

100 µF

130 kΩ

BAS11

(4×)

100 nF

DTMF

MUTE

QR−

from dial

and

control circuits

R11

telephone

line

3.65

kΩ

QR+

100 pF

100 kΩ

TEA1065

GAR

DPI

−

1 nF

MIC+

MIC−

BZX79c

BV2

AGC

SLPE GAS1

GAS2 VSI

REFI VBG CURL STAB REG

13 11 15 22

R13

kΩ

68 kΩ

100 pF

R15

715 Ω

15 kΩ

R14

kΩ

3.6

kΩ

C15

6.8 µF

4.7 µF

R9a

15 Ω

bal

JFP1

BSJ177

R9b

5 Ω

MBA560

DTMF dialling requires a different protection arrangement.

Fig.19 Typical application of the TEA1065, with a piezoelectric earpiece and pulse dialling.

Philips Semiconductors

Product speciﬁcation

Versatile telephone transmission circuit with

dialler interface

TEA1065

PACKAGE OUTLINES

DIP24: plastic dual in-line package; 24 leads (600 mil)

SOT101-1

w M

(e )

pin 1 index

10 mm

scale

DIMENSIONS (inch dimensions are derived from the original mm dimensions)

(1)

UNIT

max.

min.

max.

1.7

1.3

0.53

0.38

0.32

0.23

32.0

31.4

14.1

13.7

3.9

3.4

15.80

15.24

17.15

15.90

5.1

0.51

4.0

2.54

0.10

15.24

0.60

0.25

0.01

2.2

0.066

0.051

0.021

0.015

0.013

0.009

1.26

1.24

0.56

0.54

0.15

0.13

0.62

0.60

0.68

0.63

inches

0.20

0.020

0.16

0.087

Note

1. Plastic or metal protrusions of 0.25 mm maximum per side are not included.

REFERENCES

OUTLINE

EUROPEAN

PROJECTION

ISSUE DATE

VERSION

IEC

JEDEC

EIAJ

92-11-17

95-01-23

SOT101-1

051G02

MO-015AD

March 1994

Philips Semiconductors

Product speciﬁcation

Versatile telephone transmission circuit with

dialler interface

TEA1065

SO24: plastic small outline package; 24 leads; body width 7.5 mm

SOT137-1

(A )

pin 1 index

detail X

10 mm

scale

DIMENSIONS (inch dimensions are derived from the original mm dimensions)

max.

(1)

UNIT

0.30

0.10

2.45

2.25

0.49

0.36

0.32

0.23

15.6

15.2

7.6

7.4

10.65

10.00

1.1

0.4

1.1

1.0

0.9

0.4

2.65

0.25

0.01

1.27

0.050

1.4

0.25 0.25

0.01

0.1

8^o

0^o

0.012 0.096

0.004 0.089

0.019 0.013 0.61

0.014 0.009 0.60

0.30

0.29

0.419

0.394

0.043 0.043

0.016 0.039

0.035

0.016

inches 0.10

0.055

0.01 0.004

Note

1. Plastic or metal protrusions of 0.15 mm maximum per side are not included.

REFERENCES

OUTLINE

EUROPEAN

PROJECTION

ISSUE DATE

VERSION

IEC

JEDEC

EIAJ

95-01-24

97-05-22

SOT137-1

075E05

MS-013AD

March 1994

Philips Semiconductors

Product speciﬁcation

Versatile telephone transmission circuit with

dialler interface

TEA1065

Several techniques exist for reflowing; for example,

thermal conduction by heated belt. Dwell times vary

between 50 and 300 seconds depending on heating

method. Typical reflow temperatures range from

215 to 250 °C.

SOLDERING

Introduction

There is no soldering method that is ideal for all IC

packages. Wave soldering is often preferred when

through-hole and surface mounted components are mixed

on one printed-circuit board. However, wave soldering is

not always suitable for surface mounted ICs, or for

printed-circuits with high population densities. In these

situations reflow soldering is often used.

Preheating is necessary to dry the paste and evaporate

the binding agent. Preheating duration: 45 minutes at

45 °C.

WAVE SOLDERING

This text gives a very brief insight to a complex technology.

A more in-depth account of soldering ICs can be found in

our “Data Handbook IC26; Integrated Circuit Packages”

(order code 9398 652 90011).

Wave soldering techniques can be used for all SO

packages if the following conditions are observed:

• A double-wave (a turbulent wave with high upward

pressure followed by a smooth laminar wave) soldering

technique should be used.

DIP

• The longitudinal axis of the package footprint must be

parallel to the solder flow.

SOLDERING BY DIPPING OR BY WAVE

The maximum permissible temperature of the solder is

260 °C; solder at this temperature must not be in contact

with the joint for more than 5 seconds. The total contact

time of successive solder waves must not exceed

5 seconds.

• The package footprint must incorporate solder thieves at

the downstream end.

During placement and before soldering, the package must

be fixed with a droplet of adhesive. The adhesive can be

applied by screen printing, pin transfer or syringe

dispensing. The package can be soldered after the

adhesive is cured.

The device may be mounted up to the seating plane, but

the temperature of the plastic body must not exceed the

specified maximum storage temperature (T_{stg max}). If the

printed-circuit board has been pre-heated, forced cooling

may be necessary immediately after soldering to keep the

temperature within the permissible limit.

Maximum permissible solder temperature is 260 °C, and

maximum duration of package immersion in solder is

10 seconds, if cooled to less than 150 °C within

6 seconds. Typical dwell time is 4 seconds at 250 °C.

REPAIRING SOLDERED JOINTS

A mildly-activated flux will eliminate the need for removal

of corrosive residues in most applications.

Apply a low voltage soldering iron (less than 24 V) to the

lead(s) of the package, below the seating plane or not

more than 2 mm above it. If the temperature of the

soldering iron bit is less than 300 °C it may remain in

contact for up to 10 seconds. If the bit temperature is

between 300 and 400 °C, contact may be up to 5 seconds.

REPAIRING SOLDERED JOINTS

Fix the component by first soldering two diagonally-

opposite end leads. Use only a low voltage soldering iron

(less than 24 V) applied to the flat part of the lead. Contact

time must be limited to 10 seconds at up to 300 °C. When

using a dedicated tool, all other leads can be soldered in

one operation within 2 to 5 seconds between

270 and 320 °C.

REFLOW SOLDERING

Reflow soldering techniques are suitable for all SO

packages.

Reflow soldering requires solder paste (a suspension of

fine solder particles, flux and binding agent) to be applied

to the printed-circuit board by screen printing, stencilling or

pressure-syringe dispensing before package placement.

March 1994

Philips Semiconductors

Product speciﬁcation

Versatile telephone transmission circuit with

dialler interface

TEA1065

DEFINITIONS

Data sheet status

Objective speciﬁcation

Preliminary speciﬁcation

Product speciﬁcation

This data sheet contains target or goal speciﬁcations for product development.

This data sheet contains preliminary data; supplementary data may be published later.

This data sheet contains ﬁnal product speciﬁcations.

Limiting values

Limiting values given are in accordance with the Absolute Maximum Rating System (IEC 134). Stress above one or

more of the limiting values may cause permanent damage to the device. These are stress ratings only and operation

of the device at these or at any other conditions above those given in the Characteristics sections of the speciﬁcation

is not implied. Exposure to limiting values for extended periods may affect device reliability.

Application information

Where application information is given, it is advisory and does not form part of the speciﬁcation.

LIFE SUPPORT APPLICATIONS

These products are not designed for use in life support appliances, devices, or systems where malfunction of these

products can reasonably be expected to result in personal injury. Philips customers using or selling these products for

use in such applications do so at their own risk and agree to fully indemnify Philips for any damages resulting from such

improper use or sale.

March 1994

Philips Semiconductors

Product speciﬁcation

Versatile telephone transmission circuit with

dialler interface

TEA1065

NOTES

March 1994

Philips Semiconductors – a worldwide company

Argentina: see South America

Middle East: see Italy

Australia: 34 Waterloo Road, NORTH RYDE, NSW 2113,

Netherlands: Postbus 90050, 5600 PB EINDHOVEN, Bldg. VB,

Tel. +61 2 9805 4455, Fax. +61 2 9805 4466

Tel. +31 40 27 82785, Fax. +31 40 27 88399

Austria: Computerstr. 6, A-1101 WIEN, P.O. Box 213, Tel. +43 160 1010,

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Fax. +43 160 101 1210

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Norway: Box 1, Manglerud 0612, OSLO,

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Tel. +47 22 74 8000, Fax. +47 22 74 8341

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Philippines: Philips Semiconductors Philippines Inc.,

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Metro MANILA, Tel. +63 2 816 6380, Fax. +63 2 817 3474

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Portugal: see Spain

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72 Tat Chee Avenue, Kowloon Tong, HONG KONG,

Tel. +852 2319 7888, Fax. +852 2319 7700

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Tel. +41 1 488 2741 Fax. +41 1 488 3263

Indonesia: PT Philips Development Corporation, Semiconductors Division,

Gedung Philips, Jl. Buncit Raya Kav.99-100, JAKARTA 12510,

Tel. +62 21 794 0040 ext. 2501, Fax. +62 21 794 0080

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TAIPEI, Taiwan Tel. +886 2 2134 2865, Fax. +886 2 2134 2874

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Tel. +353 1 7640 000, Fax. +353 1 7640 200

Israel: RAPAC Electronics, 7 Kehilat Saloniki St, PO Box 18053,

Turkey: Talatpasa Cad. No. 5, 80640 GÜLTEPE/ISTANBUL,

TEL AVIV 61180, Tel. +972 3 645 0444, Fax. +972 3 649 1007

Tel. +90 212 279 2770, Fax. +90 212 282 6707

Italy: PHILIPS SEMICONDUCTORS, Piazza IV Novembre 3,

Ukraine: PHILIPS UKRAINE, 4 Patrice Lumumba str., Building B, Floor 7,

20124 MILANO, Tel. +39 2 6752 2531, Fax. +39 2 6752 2557

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Japan: Philips Bldg 13-37, Kohnan 2-chome, Minato-ku,

United Kingdom: Philips Semiconductors Ltd., 276 Bath Road, Hayes,

TOKYO 108-8507, Tel. +81 3 3740 5130, Fax. +81 3 3740 5077

MIDDLESEX UB3 5BX, Tel. +44 181 730 5000, Fax. +44 181 754 8421

Korea: Philips House, 260-199 Itaewon-dong, Yongsan-ku, SEOUL,

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Tel. +82 2 709 1412, Fax. +82 2 709 1415

Tel. +1 800 234 7381

Malaysia: No. 76 Jalan Universiti, 46200 PETALING JAYA, SELANGOR,

Tel. +60 3 750 5214, Fax. +60 3 757 4880

Uruguay: see South America

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Mexico: 5900 Gateway East, Suite 200, EL PASO, TEXAS 79905,

Tel. +9-5 800 234 7381

Yugoslavia: PHILIPS, Trg N. Pasica 5/v, 11000 BEOGRAD,

Tel. +381 11 625 344, Fax.+381 11 635 777

For all other countries apply to: Philips Semiconductors,

Internet: http://www.semiconductors.philips.com

International Marketing & Sales Communications, Building BE-p, P.O. Box 218,

5600 MD EINDHOVEN, The Netherlands, Fax. +31 40 27 24825

SCA60

All rights are reserved. Reproduction in whole or in part is prohibited without the prior written consent of the copyright owner.

The information presented in this document does not form part of any quotation or contract, is believed to be accurate and reliable and may be changed

without notice. No liability will be accepted by the publisher for any consequence of its use. Publication thereof does not convey nor imply any license

under patent- or other industrial or intellectual property rights.

Printed in The Netherlands

415102/00/02d/pp28

Date of release: March 1994

Document order number: 9397 750 nnnnn

TEA1065 [NXP]

相关型号：

TEA1065T

TEA1066T

TEA1066TD

TEA1066TD-T

TEA1067

TEA1067N

TEA1067PN

TEA1067T

TEA1067T-T

TEA1067TD

TEA1067TD

TEA1067TD-T