TJA1057GTK/3_技术文档

TJA1057

High-speed CAN transceiver

Rev. 5 — 23 May 2016

Product data sheet

1. General description

The TJA1057 is part of the Mantis family of high-speed CAN transceivers. It provides an

interface between a Controller Area Network (CAN) protocol controller and the physical

two-wire CAN bus. The transceiver is designed for high-speed CAN applications in the

automotive industry, providing the differential transmit and receive capability to (a

microcontroller with) a CAN protocol controller.

The TJA1057 offers a feature set optimized for 12 V automotive applications, with

significant improvements over first- and second-generation CAN transceivers from NXP,

such as the TJA1050, and excellent ElectroMagnetic Compatibility (EMC) performance.

The TJA1057 also displays ideal passive behavior to the CAN bus when the supply

voltage is off.

A V_IOpin on the TJA1057GT(K)/3 variants allows for direct interfacing with 3.3 V and

5 V-supplied microcontrollers.

The TJA1057 implements the CAN physical layer as defined in the current

ISO11898-2:2003 standard and the pending updated version of ISO11898-2:2016. The

TJA1057T variant is specified for data rates up to 1 Mbit/s. Pending the release of

ISO11898-2:2016 including CAN FD and SAE-J2284-4/5, additional timing parameters

are specified for the TJA1057GT(/3) and TJA1057GTK(/3) variants. This implementation

enables reliable communication in the CAN FD fast phase at data rates up to 5 Mbit/s.

These features make the TJA1057 an excellent choice for HS-CAN networks that only

require basic CAN functionality.

2. Features and benefits

2.1 General

 Fully ISO 11898-2:2003 compliant

 Optimized for use in 12 V automotive systems

 EMC performance satisfies 'Hardware Requirements for LIN, CAN and FlexRay

Interfaces in Automotive Applications’, Version 1.3, May 2012.

 V_IOoption allows for direct interfacing with 3.3 V and 5 V-supplied microcontrollers

 Non-V_IOvariants can interface with 3.3 V and 5 V-supplied microcontrollers, provided

the microcontroller I/Os are 5 V tolerant.

 AEC-Q100 qualified

 Dark green product (halogen free and Restriction of Hazardous Substances (RoHS)

compliant)

 Available in SO8 package and leadless HVSON8 package (3.0 mm  3.0 mm) with

improved Automated Optical Inspection (AOI) capability

TJA1057

NXP Semiconductors

High-speed CAN transceiver

2.2 Predictable and fail-safe behavior

 Functional behavior predictable under all supply conditions

 Transceiver disengages from bus when not powered (zero load)

 Transmit Data (TXD) dominant time-out function

 Internal biasing of TXD and S input pins

2.3 Protection

 High ESD handling capability on the bus pins (8 kV IEC and HBM)

 Bus pins protected against transients in automotive environments

 Undervoltage detection on pins V_CCand V_IO

 Thermally protected

2.4 TJA1057GT(/3)/TJA1057GTK(/3)

 Timing guaranteed for data rates up to 5 Mbit/s

 Improved TXD to RXD propagation delay of 210 ns

3. Quick reference data

Table 1.

Symbol

V_CC

Quick reference data

Parameter

Conditions

Min

4.75

2.95

3.5

Typ

Max

5.25

4.3

Unit

V

supply voltage

-

V_IO

supply voltage on pin V_IO

-

V

V_uvd(VCC)

undervoltage detection voltage

on pin V_CC

4

V

V_uvd(VIO)

I_CC

undervoltage detection voltage

on pin V_IO

2.1

-

2.8

V

supply current

Silent mode

0.1

2

-

1.2

10

70

16

mA

A

Normal mode; bus recessive

Normal mode; bus dominant

Silent mode

5

20

-

45

3

I_IO

supply current on pin V_IO

Normal mode

recessive; V_TXD= V_IO

-

7

30

A

kV

V

dominant; V_TXD= 0 V

-

110

320

+8

V_ESD

V_CANH

V_CANL

T_vj

electrostatic discharge voltage

voltage on pin CANH

IEC 61000-4-2 at pins CANH and CANL

limiting value according to IEC60134

8

42

40

-

+42

voltage on pin CANL

V

virtual junction temperature

+150 C

TJA1057

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Product data sheet

Rev. 5 — 23 May 2016

2 of 25

TJA1057

NXP Semiconductors

High-speed CAN transceiver

4. Ordering information

Table 2.

Ordering information

Type number

Package

Name

SO8

Description

Version

TJA1057T

plastic small outline package; 8 leads; body width 3.9 mm

SOT96-1

TJA1057GT

TJA1057GT/3^[1]

TJA1057GTK

TJA1057GTK/3^[1]

HVSON8

plastic thermal enhanced very thin small outline package; no leads;

8 terminals; body 3  3  0.85 mm

SOT782-1

[1] TJA1057GT/3 and TJA1057GTK/3 variants have a V_IOpin.

5. Block diagram

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(1) V_IO= V_CCin non-V_IOproduct variants TJA1057(G)T(K)

Fig 1. Block diagram

TJA1057

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Product data sheet

Rev. 5 — 23 May 2016

3 of 25

TJA1057

NXP Semiconductors

High-speed CAN transceiver

6. Pinning information

6.1 Pinning

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c. HVSON8

Fig 2. Pin configuration diagrams

d. HVSON8 with V_IO

6.2 Pin description

Table 3.

Pin description

Pin Description

Symbol

TXD

GND^[1]

V_CC

1

2

3

4

5

6

7

8

transmit data input

ground

supply voltage

RXD

n.c.

receive data output; reads out data from the bus lines

not connected in TJA1057T, TJA1057GT and TJA1057GTK

V_IO

supply voltage for I/O level adapter in TJA1057GT/3 and TJA1057GTK/3

LOW-level CAN bus line

CANL

CANH

S

HIGH-level CAN bus line

Silent mode control input

[1] HVSON8 package die supply ground is connected to both the GND pin and the exposed center pad. The

GND pin must be soldered to board ground. For enhanced thermal and electrical performance, it is

recommended that the exposed center pad also be soldered to board ground.

TJA1057

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Product data sheet

Rev. 5 — 23 May 2016

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TJA1057

NXP Semiconductors

High-speed CAN transceiver

7. Functional description

7.1 Operating modes

The TJA1057 supports two operating modes, Normal and Silent. The operating mode is

selected via pin S. See Table 4 for a description of the operating modes under normal

supply conditions.

Table 4.

Mode

Operating modes

Inputs

Outputs

Pin S

Pin TXD

LOW

CAN driver

dominant

recessive

Pin RXD

Normal

Silent

LOW

HIGH

LOW when bus dominant

HIGH when bus recessive

HIGH

x^[1]

biased to recessive LOW when bus dominant

HIGH when bus recessive

[1] ‘x’ = don’t care.

7.1.1 Normal mode

A LOW level on pin S selects Normal mode. In this mode, the transceiver can transmit and

receive data via the bus lines, CANH and CANL (see Figure 1 for the block diagram). The

differential receiver converts the analog data on the bus lines into digital data which is

output on pin RXD. The slopes of the output signals on the bus lines are controlled

internally and are optimized in a way that guarantees the lowest possible EME.

7.1.2 Silent mode

A HIGH level on pin S selects Silent mode. The transmitter is disabled in Silent mode,

releasing the bus pins to recessive state. All other IC functions, including the receiver,

continue to operate as in Normal mode. Silent mode can be used to prevent a faulty CAN

controller disrupting all network communications.

7.2 Fail-safe features

7.2.1 TXD dominant time-out function

A 'TXD dominant time-out' timer is started when pin TXD is set LOW. If the LOW state on

this pin persists for longer than t_to(dom)TXD, the transmitter is disabled, releasing the bus

lines to recessive state. This function prevents a hardware and/or software application

failure from driving the bus lines to a permanent dominant state (blocking all network

communications). The TXD dominant time-out timer is reset when pin TXD is set HIGH.

The TXD dominant time-out time also defines the minimum possible bit rate of

approximately 25 kbit/s.

7.2.2 Internal biasing of TXD and S input pins

Pins TXD and S have internal pull-ups to V_CC(or V_IOin TJA1057GT(K)/3 variants) to

ensure a safe, defined state in case one or both of these pins are left floating. Pull-up

currents flow in these pins in all states; both pins should be held HIGH in Silent mode to

minimize supply current.

TJA1057

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Product data sheet

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TJA1057

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High-speed CAN transceiver

7.2.3 Undervoltage detection on pins V_CCand V_IO(TJA1057GT(K)/3)

If V_CCor V_IOdrops below the undervoltage detection level, V_uvd(VCC)/V_uvd(VIO), the

transceiver switches off and disengages from the bus (zero load; bus pins floating) until

the supply voltage has recovered. The output drivers are enabled once both V_CCand V_IO

are again within their operating ranges and TXD has been reset to HIGH.

7.2.4 Overtemperature protection

The output drivers are protected against overtemperature conditions. If the virtual junction

temperature exceeds the shutdown junction temperature, T_j(sd), both output drivers are

disabled. When the virtual junction temperature drops below T_j(sd)again, the output

drivers recover once TXD has been reset to HIGH (waiting for TXD to go HIGH prevents

output driver oscillation due to small variations in temperature).

7.2.5 V_IOsupply pin (TJA1057GT(K)/3 variants only)

Pin V_IOshould be connected to the microcontroller supply voltage (see Figure 6). The

signal levels on pins TXD, RXD and S will then be adjusted to the I/O levels of the

microcontroller, allowing for direct interfacing without additional glue logic.

For versions of the TJA1057 without a V_IOpin, the V_IOinput is internally connected to V_CC

The signal levels of pins TXD, RXD and S are set to levels compatible with 5 V

microcontrollers.

.

TJA1057

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Product data sheet

Rev. 5 — 23 May 2016

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TJA1057

NXP Semiconductors

High-speed CAN transceiver

8. Limiting values

Table 5.

Limiting values

In accordance with the Absolute Maximum Rating System (IEC 60134). All voltages are referenced to GND.

Symbol

Parameter

voltage on pin x^[1]

Conditions

Min Max

42 +42

Unit

V

V_x

on pins CANH, CANL

on pins V_CC, V_IO

on any other pin

0.3 +7

0.3 V_IO^[3]+ 0.3

V

[2]

V

V_(CANH-CANL)voltage between pin CANH

and pin CANL

27

+27

V

[4]

V_trt

transient voltage

on pins CANH, CANL

pulse 1

100

-

V

pulse 2a

-

75

-

pulse 3a

150

pulse 3b

-

100

[5]

[6]

V_ESD

electrostatic discharge

voltage

IEC 61000-4-2 (150 pF, 330 )

on pins CANH and CANL

Human Body Model (HBM); 100 pF, 1.5 k

on pins CANH and CANL

on any other pin

8

+8

kV

8

4

+8

+4

kV

[7]

Machine Model (MM); 200 pF, 0.75 H, 10 

on any pin

200 +200

V

[8]

Charged Device Model (CDM); field Induced

charge; 4 pF

on corner pins

750 +750

500 +500

V

on any other pin

V

[9]

T_vj

virtual junction temperature

storage temperature

40

55

+150

C

T_stg

[1] The device can sustain voltages up to the specified values over the product lifetime, provided applied voltages (including transients)

never exceed these values.

[2] Maximum voltage should never exceed 7 V.

[3] V_IO+ 0.3 = V_CC+ 0.3 in the non-V_IOproduct variants TJA1057(G)T(K).

[4] According to IEC TS 62228 (2007), Section 4.2.4; parameters for standard pulses defined in ISO7637 part 2: 2004-06.

[5] According to IEC TS 62228 (2007), Section 4.3; DIN EN 61000-4-2.

[6] According to AEC-Q100-002.

[7] According to AEC-Q100-003.

[8] According to AEC-Q100-011; grade C4B.

[9] In accordance with IEC 60747-1. An alternative definition of virtual junction temperature is: T_vj= T_amb+ P  R_th(vj-a), where R_th(vj-a)is a

fixed value to be used for the calculation of T_vj. The rating for T_vjlimits the allowable combinations of power dissipation (P) and ambient

temperature (T_amb).

TJA1057

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Product data sheet

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TJA1057

NXP Semiconductors

High-speed CAN transceiver

9. Thermal characteristics

Table 6.

Thermal characteristics

According to IEC 60747-1.

Symbol Parameter

Conditions

Value

Unit

R_th(vj-a)

thermal resistance from virtual junction SO8 package; in free air

97

K/W

to ambient

HVSON8 package; in free air

[1]

[2]

dual-layer board

four-layer board

91

52

K/W

[1] According to JEDEC JESD51-2, JESD51-3 and JESD51-5 at natural convection on 1s board with thermal via array under the exposed

pad connected to the second copper layer.

[2] According to JEDEC JESD51-2, JESD51-5 and JESD51-7 at natural convection on 2s2p board. Board with two inner copper layers

(thickness: 35 m) and thermal via array under the exposed pad connected to the first inner copper layer.

10. Static characteristics

Table 7.

Static characteristics

T_vj= 40 C to +150 C; V_CC= 4.75 V to 5.25 V; V_IO= 2.95 V to 5.25 V^[1]; R_L= 60 ; C_L= 100 pF unless specified otherwise;

All voltages are defined with respect to ground. Positive currents flow into the IC.^[2]

Symbol

Parameter

Conditions

Min

Typ

Max

Unit

Supply; pin V_CC

V_CC

supply voltage

4.75

3.5

-

5.25

4.3

V

V_uvd(VCC)

undervoltage detection

voltage on pin V_CC

4

[3]

I_CC

supply current

Silent mode; V_TXD= V_IO

Normal mode

0.1

-

1.2

mA

[3]

recessive; V_TXD= V_IO

dominant; V_TXD= 0 V

2

5

10

70

mA

20

45

[1]

I/O level adapter supply; pin V_IO

V_IO

supply voltage on pin V_IO

2.95

2.1

-

5.25

2.8

V

V_uvd(VIO)

undervoltage detection

voltage on pin V_IO

I_IO

supply current on pin V_IO

Silent mode

-

3

16

A

Normal mode

[3]

recessive; V_TXD= V_IO

dominant; V_TXD= 0 V

-

7

30

A

110

320

Silent mode control input; pin S

V_IH

V_IL

I_IH

HIGH-level input voltage

LOW-level input voltage

HIGH-level input current

LOW-level input current

2

-

V_IO^[3]+ 0.3

V

0.3

1

0.8

+1

1

V

[3]

V_S= V_IO

A

I_IL

V_S= 0 V

15

CAN transmit data input; pin TXD

V_IH

V_IL

I_IH

HIGH-level input voltage

LOW-level input voltage

HIGH-level input current

2

-

V_IO^[3]+ 0.3

V

0.3

5

0.8

+5

V

[3]

V_TXD= V_IO

A

TJA1057

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Product data sheet

Rev. 5 — 23 May 2016

8 of 25

TJA1057

NXP Semiconductors

High-speed CAN transceiver

Table 7.

Static characteristics …continued

T_vj= 40 C to +150 C; V_CC= 4.75 V to 5.25 V; V_IO= 2.95 V to 5.25 V^[1]; R_L= 60 ; C_L= 100 pF unless specified otherwise;

All voltages are defined with respect to ground. Positive currents flow into the IC.^[2]

Symbol

Parameter

Conditions

Min

260

-

Typ

Max

30

10

Unit

A

I_IL

C_i

LOW-level input current

input capacitance

V_TXD= 0 V

-

[4]

5

pF

CAN receive data output; pin RXD

I_OH

I_OL

HIGH-level output current

LOW-level output current

V_RXD= V_IO^[3] 0.4 V

8

3

1

mA

V_RXD= 0.4 V; bus dominant

1

-

12

Bus lines; pins CANH and CANL

V_O(dom)dominant output voltage

V_TXD= 0 V; t < t_to(dom)TXD

pin CANH; R_L= 50  to 65 

pin CANL; R_L= 50  to 65 

2.75

0.5

3.5

1.5

-

4.5

V

2.25

+400

V

V_dom(TX)symtransmitter dominant voltage V_dom(TX)sym= V_CC V_CANH V_CANL

400

mV

symmetry

[4]

[5]

V_TXsym

V_O(dif)

transmitter voltage

symmetry

V_TXsym= V_CANH+ V_CANL

;

0.9V_CC

-

1.1V_CC

V

f_TXD= 250 kHz; C_SPLIT= 4.7 nF

dominant; V_TXD= 0 V; t < t_to(dom)TXD

R_L= 50 to 65 

differential output voltage

1.5

1.4

1.5

50

2

-

3

V

R_L= 45 to 70 

-

3.3

5

V

R_L= 2240 

-

V

recessive; V_TXD= V_IO^[3]; no load

V_TXD= V_IO^[3]; no load

-

+50

3

mV

V

V_O(rec)

recessive output voltage

0.5V_CC

-

V_th(RX)dif

differential receiver

threshold voltage

Normal/Silent mode;

12 V  V_CANL +12 V;

12 V  V_CANH +12 V

0.5

0.9

V

V_rec(RX)

receiver recessive voltage

receiver dominant voltage

Normal/Silent mode;

12 V  V_CANL +12 V;

12 V  V_CANH +12 V

3

0.9

50

-

0.5

8.0

300

V

V_dom(RX)

V_hys(RX)dif

I_O(sc)dom

Normal/Silent mode;

12 V  V_CANL +12 V;

12 V v V_CANH +12 V

V

differential receiver

hysteresis voltage

Normal mode;

12 V  V_CANL +12 V;

12 V v V_CANH +12 V

mV

dominant short-circuit output V_TXD= 0 V; t < t_to(dom)TXD; V_CC= 5 V

current

pin CANH; V_CANH= 3 V to +40 V

100

40

70

70

-

40

100

+5

mA

pin CANL; V_CANL= 3 V to +40 V

I_O(sc)rec

I_L

recessive short-circuit output Normal mode; V_TXD= V_CC

5

current

V_CANH= V_CANL= 27 V to +32 V

leakage current

V_CC= 0 V or

5

-

+5

A

V_CC= V_IO= shorted to ground via

47 k; V_CANH= V_CANL= 5 V

R_i

input resistance

9

15

-

28

+3

52

k

%

R_i

R_i(dif)

input resistance deviation

differential input resistance

between V_CANHand V_CANL

3

19

30

k

TJA1057

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Product data sheet

Rev. 5 — 23 May 2016

9 of 25

TJA1057

NXP Semiconductors

High-speed CAN transceiver

Table 7.

Static characteristics …continued

T_vj= 40 C to +150 C; V_CC= 4.75 V to 5.25 V; V_IO= 2.95 V to 5.25 V^[1]; R_L= 60 ; C_L= 100 pF unless specified otherwise;

All voltages are defined with respect to ground. Positive currents flow into the IC.^[2]

Symbol

Parameter

Conditions

Min

Typ

Max

Unit

[4]

C_i(cm)

common-mode input

capacitance

-

20

pF

C_i(dif)

differential input capacitance

-

10

-

pF

Temperature detection

T_j(sd)shutdown junction

temperature

[4]

185

C

[1] Only TJA1057GT/3 and TJA1057GTK/3 have a V_IOpin; the V_IOinput is internally connected to V_CCin the other variants.

[2] Factory testing uses correlated test conditions to cover the specified temperature and power supply voltage range.

[3] V_IO= V_CCin non-V_IOproduct variants TJA1057(G)T(K).

[4] Not tested in production; guaranteed by design.

[5] The test circuit used to measure the bus output voltage symmetry (which includes C_SPLIT) is shown in Figure 8.

TJA1057

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Product data sheet

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TJA1057

NXP Semiconductors

High-speed CAN transceiver

11. Dynamic characteristics

Table 8.

Dynamic characteristics

T_vj= 40 C to +150 C; V_CC= 4.75 V to 5.25 V; V_IO= 2.95 V to 5.25 V^[1]; R_L= 60 ; C_L= 100 pF unless specified otherwise.

All voltages are defined with respect to ground.^[2]

Symbol

Parameter

Conditions

Min Typ Max Unit

Transceiver timing; pins CANH, CANL, TXD and RXD; see Figure 7 and Figure 3

t_{d(TXD-busdom)}delay time from TXD to bus dominant

t_{d(TXD-busrec)}delay time from TXD to bus recessive

t_{d(busdom-RXD)}delay time from bus dominant to RXD

t_{d(busrec-RXD)}delay time from bus recessive to RXD

Normal mode

-

65

90

60

65

-

ns

-

t_d(TXDL-RXDL)delay time from TXD LOW to RXD LOW TJA1057T; Normal mode

50

230 ns

210 ns

TJA1057GT(/3), TJA1057GTK(/3);

-

Normal mode

t_d(TXDH-RXDH)delay time from TXD HIGH to RXD HIGH TJA1057T; Normal mode

50

-

230 ns

210 ns

TJA1057GT(/3), TJA1057GTK(/3);

Normal mode

t_bit(bus)

transmitted recessive bit width

bit time on pin RXD

TJA1057GT(/3), TJA1057GTK(/3)

t_bit(TXD)= 500 ns

[3]

435

155

-

530 ns

210 ns

t_bit(TXD)= 200 ns

t_bit(RXD)

TJA1057GT(/3), TJA1057GTK(/3)

[3]

t

_bit(TXD)= 500 ns

400

120

-

550 ns

220 ns

t_bit(TXD)= 200 ns

t_rec

receiver timing symmetry

TXD dominant time-out time

TJA1057GT(/3), TJA1057GTK(/3)

t_bit(TXD)= 500 ns

65

45

0.8

-

+40 ns

+15 ns

t_bit(TXD)= 200 ns

-

t_to(dom)TXD

V_TXD= 0 V; Normal mode

3

6.5

ms

[1] Only TJA1057GT/3 and TJA1057GTK/3 have a V_IOpin; the V_IOinput is internally connected to V_CCin the other variants.

[2] Factory testing uses correlated test conditions to cover the specified temperature and power supply voltage range.

[3] See Figure 4.

TJA1057

All information provided in this document is subject to legal disclaimers.

Product data sheet

Rev. 5 — 23 May 2016

11 of 25

TJA1057

NXP Semiconductors

High-speed CAN transceiver

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(1) V_IO= V_CCin non-V_IOproduct variants TJA1057(G)T(K)

Fig 3. CAN transceiver timing diagram

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Fig 4. Loop delay symmetry timing diagram (TJA1057GT(K)(/3) only)

TJA1057

All information provided in this document is subject to legal disclaimers.

Product data sheet

Rev. 5 — 23 May 2016

12 of 25

TJA1057

NXP Semiconductors

High-speed CAN transceiver

12. Application information

12.1 Application diagram

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(1) Optional, depends on regulator.

Fig 6. Typical TJA1057 application with a 3 V microcontroller.

12.2 Application hints

Further information on the application of the TJA1057 can be found in NXP application

hints AH1308 Application Hints - Standalone high speed CAN transceiver Mantis-GT

TJA1044G/TJA1057G.

TJA1057

All information provided in this document is subject to legal disclaimers.

Product data sheet

Rev. 5 — 23 May 2016

13 of 25

TJA1057

NXP Semiconductors

High-speed CAN transceiver

13. Test information

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Fig 7. CAN transceiver timing test circuit

9

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Fig 8. Test circuit for measuring transceiver driver symmetry

13.1 Quality information

This product has been qualified in accordance with the Automotive Electronics Council

(AEC) standard Q100 Rev-G - Failure mechanism based stress test qualification for

integrated circuits, and is suitable for use in automotive applications.

TJA1057

All information provided in this document is subject to legal disclaimers.

Product data sheet

Rev. 5 — 23 May 2016

14 of 25

TJA1057

NXP Semiconductors

High-speed CAN transceiver

14. Package outline

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Fig 9. Package outline SOT96-1 (SO8)

TJA1057

All information provided in this document is subject to legal disclaimers.

Product data sheet

Rev. 5 — 23 May 2016

15 of 25

TJA1057

NXP Semiconductors

High-speed CAN transceiver

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TJA1057

All information provided in this document is subject to legal disclaimers.

Product data sheet

Rev. 5 — 23 May 2016

16 of 25

TJA1057

NXP Semiconductors

High-speed CAN transceiver

15. Handling information

All input and output pins are protected against ElectroStatic Discharge (ESD) under

normal handling. When handling ensure that the appropriate precautions are taken as

described in JESD625-A or equivalent standards.

16. Soldering of SMD packages

This text provides a very brief insight into a complex technology. A more in-depth account

of soldering ICs can be found in Application Note AN10365 “Surface mount reflow

soldering description”.

16.1 Introduction to soldering

Soldering is one of the most common methods through which packages are attached to

Printed Circuit Boards (PCBs), to form electrical circuits. The soldered joint provides both

the mechanical and the electrical connection. There is no single soldering method that is

ideal for all IC packages. Wave soldering is often preferred when through-hole and

Surface Mount Devices (SMDs) are mixed on one printed wiring board; however, it is not

suitable for fine pitch SMDs. Reflow soldering is ideal for the small pitches and high

densities that come with increased miniaturization.

16.2 Wave and reflow soldering

Wave soldering is a joining technology in which the joints are made by solder coming from

a standing wave of liquid solder. The wave soldering process is suitable for the following:

• Through-hole components

• Leaded or leadless SMDs, which are glued to the surface of the printed circuit board

Not all SMDs can be wave soldered. Packages with solder balls, and some leadless

packages which have solder lands underneath the body, cannot be wave soldered. Also,

leaded SMDs with leads having a pitch smaller than ~0.6 mm cannot be wave soldered,

due to an increased probability of bridging.

The reflow soldering process involves applying solder paste to a board, followed by

component placement and exposure to a temperature profile. Leaded packages,

packages with solder balls, and leadless packages are all reflow solderable.

Key characteristics in both wave and reflow soldering are:

• Board specifications, including the board finish, solder masks and vias

• Package footprints, including solder thieves and orientation

• The moisture sensitivity level of the packages

• Package placement

• Inspection and repair

• Lead-free soldering versus SnPb soldering

16.3 Wave soldering

Key characteristics in wave soldering are:

TJA1057

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Product data sheet

Rev. 5 — 23 May 2016

17 of 25

TJA1057

NXP Semiconductors

High-speed CAN transceiver

• Process issues, such as application of adhesive and flux, clinching of leads, board

transport, the solder wave parameters, and the time during which components are

exposed to the wave

• Solder bath specifications, including temperature and impurities

16.4 Reflow soldering

Key characteristics in reflow soldering are:

• Lead-free versus SnPb soldering; note that a lead-free reflow process usually leads to

higher minimum peak temperatures (see Figure 11) than a SnPb process, thus

reducing the process window

• Solder paste printing issues including smearing, release, and adjusting the process

window for a mix of large and small components on one board

• Reflow temperature profile; this profile includes preheat, reflow (in which the board is

heated to the peak temperature) and cooling down. It is imperative that the peak

temperature is high enough for the solder to make reliable solder joints (a solder paste

characteristic). In addition, the peak temperature must be low enough that the

packages and/or boards are not damaged. The peak temperature of the package

depends on package thickness and volume and is classified in accordance with

Table 9 and 10

Table 9.

SnPb eutectic process (from J-STD-020D)

Package thickness (mm) Package reflow temperature (C)

Volume (mm³)

< 350

 350

220

< 2.5

235

220

 2.5

220

Table 10. Lead-free process (from J-STD-020D)

Package thickness (mm) Package reflow temperature (C)

Volume (mm³)

< 350

260

350 to 2000

> 2000

260

< 1.6

260

250

245

1.6 to 2.5

> 2.5

260

245

250

245

Moisture sensitivity precautions, as indicated on the packing, must be respected at all

times.

Studies have shown that small packages reach higher temperatures during reflow

soldering, see Figure 11.

TJA1057

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Product data sheet

Rev. 5 — 23 May 2016

18 of 25

TJA1057

NXP Semiconductors

High-speed CAN transceiver

maximum peak temperature

= MSL limit, damage level

temperature

minimum peak temperature

= minimum soldering temperature

peak

temperature

time

001aac844

MSL: Moisture Sensitivity Level

Fig 11. Temperature profiles for large and small components

For further information on temperature profiles, refer to Application Note AN10365

“Surface mount reflow soldering description”.

TJA1057

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Product data sheet

Rev. 5 — 23 May 2016

19 of 25

TJA1057

NXP Semiconductors

High-speed CAN transceiver

17. Appendix: ISO 11898-2:2016 parameter cross-reference list

Table 11. ISO 11898-2:2016 to NXP data sheet parameter conversion

ISO 11898-2:2016

NXP data sheet

Notation Symbol Parameter

Parameter

HS-PMA dominant output characteristics

Single ended voltage on CAN_H

Single ended voltage on CAN_L

Differential voltage on normal bus load

Differential voltage on effective resistance during arbitration

Optional: Differential voltage on extended bus load range

HS-PMA driver symmetry

V_{CAN_H}

V_{CAN_L}

V_Diff

V_O(dom)

dominant output voltage

differential output voltage

V_O(dif)

Driver symmetry

V_SYM

V_TXsym

transmitter voltage symmetry

Maximum HS-PMA driver output current

Absolute current on CAN_H

I_{CAN_H}

I_{CAN_L}

I_O(sc)dom

dominant short-circuit output

current

Absolute current on CAN_L

HS-PMA recessive output characteristics, bus biasing active/inactive

Single ended output voltage on CAN_H

Single ended output voltage on CAN_L

Differential output voltage

V_{CAN_H}

V_{CAN_L}

V_Diff

V_O(rec)

recessive output voltage

differential output voltage

TXD dominant time-out time

V_O(dif)

Optional HS-PMA transmit dominant timeout

Transmit dominant timeout, long

t_dom

t_to(dom)TXD

Transmit dominant timeout, short

HS-PMA static receiver input characteristics, bus biasing active/inactive

Recessive state differential input voltage range

Dominant state differential input voltage range

V_Diff

V_th(RX)dif

differential receiver threshold

voltage

V_rec(RX)

receiver recessive voltage

receiver dominant voltage

V_dom(RX)

HS-PMA receiver input resistance (matching)

Differential internal resistance

R_Diff

R_i(dif)

R_i

differential input resistance

input resistance

Single ended internal resistance

R_{CAN_H}

R_{CAN_L}

Matching of internal resistance

HS-PMA implementation loop delay requirement

Loop delay

MR

R_i

input resistance deviation

t_Loop

t_d(TXDH-RXDH)delay time from TXD HIGH to

RXD HIGH

t_d(TXDL-RXDL)

delay time from TXD LOW to RXD

LOW

Optional HS-PMA implementation data signal timing requirements for use with bit rates above 1 Mbit/s up to

2 Mbit/s and above 2 Mbit/s up to 5 Mbit/s

Transmitted recessive bit width @ 2 Mbit/s / @ 5 Mbit/s,

intended

t_Bit(Bus)

t_bit(bus)

transmitted recessive bit width

Received recessive bit width @ 2 Mbit/s / @ 5 Mbit/s

Receiver timing symmetry @ 2 Mbit/s / @ 5 Mbit/s

t_Bit(RXD)

t_bit(RXD)

bit time on pin RXD

t_Rec

t_rec

receiver timing symmetry

TJA1057

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Product data sheet

Rev. 5 — 23 May 2016

20 of 25

TJA1057

NXP Semiconductors

High-speed CAN transceiver

Table 11. ISO 11898-2:2016 to NXP data sheet parameter conversion

ISO 11898-2:2016

NXP data sheet

Parameter

Notation Symbol

Parameter

HS-PMA maximum ratings of V_{CAN_H}, V_{CAN_L}and V_Diff

Maximum rating V_Diff

V_Diff

V_(CANH-CANL)voltage between pin CANH and

pin CANL

General maximum rating V_{CAN_H}and V_{CAN_L}

V_{CAN_H}

V_{CAN_L}

V_x

voltage on pin x

Optional: Extended maximum rating VCAN_H and VCAN_L

HS-PMA maximum leakage currents on CAN_H and CAN_L, unpowered

Leakage current on CAN_H, CAN_L

I_{CAN_H}

I_{CAN_L}

I_L

leakage current

HS-PMA bus biasing control timings

CAN activity filter time, long

CAN activity filter time, short

Wake-up timeout, short

[1]

t_Filter

t_wake(busdom)

bus dominant wake-up time

bus recessive wake-up time

bus wake-up time-out time

[1]

t_wake(busrec)

t_to(wake)bus

t_Wake

Wake-up timeout, long

Timeout for bus inactivity

Bus Bias reaction time

t_Silence

t_Bias

t_to(silence)

bus silence time-out time

t_{d(busact-bias)}

delay time from bus active to bias

[1] t_{fltr(wake)bus}- bus wake-up filter time, in devices with basic wake-up functionality

TJA1057

All information provided in this document is subject to legal disclaimers.

Product data sheet

Rev. 5 — 23 May 2016

21 of 25

TJA1057

NXP Semiconductors

High-speed CAN transceiver

18. Revision history

Table 12. Revision history

Document ID

Release date

Data sheet status

Change notice

Supersedes

TJA1057 v.5.01 20160523

Product data sheet

-

TJA1057 v.5

Modifications:

• Section 1: text of 4th paragraph amended

• Table 5: Table note 1 added; Table note 8 amended; values for parameter V_(CANH-CANL)amended

• Table 7: measurement conditions changed for parameters I_Land I_IO(ref. to Table note 3 added);

values changed for parameter V_O(dif)

• Table 8: referenceS to Table note 3 added to parameter t_bit(bus)

• Figure 8: amended

TJA1057 v.5

20160128

Product data sheet

-

TJA1057 v.4

Modifications:

• TJA1057GT/3 and TJA1057GTK/3 variants added:

–

Section 1: 3rd paragraph added

Section 2.1: feature added

Section 2.3: feature amended to include V_IO

Section 2.4: heading amended to include TJA1057GT/3 and TJA1057GTK/3; text of 1st feature

amended

–

Table 1, Table 7: parameters V_IO, V_uvd(VIO)and I_IOadded

Table 2: ordering information updated

Figure 1, Figure 2, Figure 3 and Table 3 amended; Figure 6 added

Section 7.2.2 and Section 7.2.3: text amended

Section 7.2.5 added

Table 5, Table 7, Table 8: measurement conditions revised to include new variants

• ISO 11898-2:2016 compliance:

–

Section 1: text amended (4th paragraph)

Table 5: parameter V_(CANH-CANL)added

Table 7:

- measurement conditions changed for parameters V_O(dom), V_th(RX)dif(associated table note

removed), V_hys(RX)dif, I_O(sc)domand I_L

- parameters V_TXsym(and associated table note), V_rec(RX)and V_dom(RX)added

- additional measurement included for parameter V_O(dif)(R_L= 2240  )

–

Table 8: parameters t_bit(bus)and t_recadded

Figure 4 amended and Figure 8 added

Section 17 added

• Table 3, Table note 1revised

• Table 4 revised (RXD in Silent mode)

• Section 7.2.4: text amended

• Table 5, Table note 2 added

• Table 7: parameters I_O(dom)and I_O(rec)renamed as I_O(sc)domand I_O(sc)rec

• Specification status changed to Product data sheet

TJA1057 v.4

TJA1057 v.3

TJA1057 v.2

TJA1057 v.1

20150710

20141119

20131030

20130530

Product data sheet

Preliminary data sheet

-

TJA1057 v.3

TJA1057 v.2

TJA1057 v.1

-

TJA1057

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Product data sheet

Rev. 5 — 23 May 2016

22 of 25

TJA1057

NXP Semiconductors

High-speed CAN transceiver

19. Legal information

19.1 Data sheet status

Document status^[1][2]

Product status^[3]

Development

Definition

Objective [short] data sheet

This document contains data from the objective specification for product development.

This document contains data from the preliminary specification.

This document contains the product specification.

Preliminary [short] data sheet Qualification

Product [short] data sheet Production

[1]

[2]

[3]

Please consult the most recently issued document before initiating or completing a design.

The term ‘short data sheet’ is explained in section “Definitions”.

The product status of device(s) described in this document may have changed since this document was published and may differ in case of multiple devices. The latest product status

information is available on the Internet at URL http://www.nxp.com.

Suitability for use in automotive applications — This NXP

19.2 Definitions

Semiconductors product has been qualified for use in automotive

applications. Unless otherwise agreed in writing, the product is not designed,

authorized or warranted to be suitable for use in life support, life-critical or

safety-critical systems or equipment, nor in applications where failure or

malfunction of an NXP Semiconductors product can reasonably be expected

to result in personal injury, death or severe property or environmental

damage. NXP Semiconductors and its suppliers accept no liability for

inclusion and/or use of NXP Semiconductors products in such equipment or

applications and therefore such inclusion and/or use is at the customer's own

risk.

Draft — The document is a draft version only. The content is still under

internal review and subject to formal approval, which may result in

modifications or additions. NXP Semiconductors does not give any

representations or warranties as to the accuracy or completeness of

information included herein and shall have no liability for the consequences of

use of such information.

Short data sheet — A short data sheet is an extract from a full data sheet

with the same product type number(s) and title. A short data sheet is intended

for quick reference only and should not be relied upon to contain detailed and

full information. For detailed and full information see the relevant full data

sheet, which is available on request via the local NXP Semiconductors sales

office. In case of any inconsistency or conflict with the short data sheet, the

full data sheet shall prevail.

Applications — Applications that are described herein for any of these

products are for illustrative purposes only. NXP Semiconductors makes no

representation or warranty that such applications will be suitable for the

specified use without further testing or modification.

Customers are responsible for the design and operation of their applications

and products using NXP Semiconductors products, and NXP Semiconductors

accepts no liability for any assistance with applications or customer product

design. It is customer’s sole responsibility to determine whether the NXP

Semiconductors product is suitable and fit for the customer’s applications and

products planned, as well as for the planned application and use of

customer’s third party customer(s). Customers should provide appropriate

design and operating safeguards to minimize the risks associated with their

applications and products.

Product specification — The information and data provided in a Product

data sheet shall define the specification of the product as agreed between

NXP Semiconductors and its customer, unless NXP Semiconductors and

customer have explicitly agreed otherwise in writing. In no event however,

shall an agreement be valid in which the NXP Semiconductors product is

deemed to offer functions and qualities beyond those described in the

Product data sheet.

NXP Semiconductors does not accept any liability related to any default,

damage, costs or problem which is based on any weakness or default in the

customer’s applications or products, or the application or use by customer’s

third party customer(s). Customer is responsible for doing all necessary

testing for the customer’s applications and products using NXP

Semiconductors products in order to avoid a default of the applications and

the products or of the application or use by customer’s third party

customer(s). NXP does not accept any liability in this respect.

19.3 Disclaimers

Limited warranty and liability — Information in this document is believed to

be accurate and reliable. However, NXP Semiconductors does not give any

representations or warranties, expressed or implied, as to the accuracy or

completeness of such information and shall have no liability for the

consequences of use of such information. NXP Semiconductors takes no

responsibility for the content in this document if provided by an information

source outside of NXP Semiconductors.

Limiting values — Stress above one or more limiting values (as defined in

the Absolute Maximum Ratings System of IEC 60134) will cause permanent

damage to the device. Limiting values are stress ratings only and (proper)

operation of the device at these or any other conditions above those given in

the Recommended operating conditions section (if present) or the

Characteristics sections of this document is not warranted. Constant or

repeated exposure to limiting values will permanently and irreversibly affect

the quality and reliability of the device.

In no event shall NXP Semiconductors be liable for any indirect, incidental,

punitive, special or consequential damages (including - without limitation - lost

profits, lost savings, business interruption, costs related to the removal or

replacement of any products or rework charges) whether or not such

damages are based on tort (including negligence), warranty, breach of

contract or any other legal theory.

Notwithstanding any damages that customer might incur for any reason

whatsoever, NXP Semiconductors’ aggregate and cumulative liability towards

customer for the products described herein shall be limited in accordance

with the Terms and conditions of commercial sale of NXP Semiconductors.

Terms and conditions of commercial sale — NXP Semiconductors

products are sold subject to the general terms and conditions of commercial

sale, as published at http://www.nxp.com/profile/terms, unless otherwise

agreed in a valid written individual agreement. In case an individual

agreement is concluded only the terms and conditions of the respective

agreement shall apply. NXP Semiconductors hereby expressly objects to

applying the customer’s general terms and conditions with regard to the

purchase of NXP Semiconductors products by customer.

Right to make changes — NXP Semiconductors reserves the right to make

changes to information published in this document, including without

limitation specifications and product descriptions, at any time and without

notice. This document supersedes and replaces all information supplied prior

to the publication hereof.

TJA1057

All information provided in this document is subject to legal disclaimers.

Product data sheet

Rev. 5 — 23 May 2016

23 of 25

TJA1057

NXP Semiconductors

High-speed CAN transceiver

No offer to sell or license — Nothing in this document may be interpreted or

construed as an offer to sell products that is open for acceptance or the grant,

conveyance or implication of any license under any copyrights, patents or

other industrial or intellectual property rights.

Translations — A non-English (translated) version of a document is for

reference only. The English version shall prevail in case of any discrepancy

between the translated and English versions.

Export control — This document as well as the item(s) described herein

may be subject to export control regulations. Export might require a prior

authorization from competent authorities.

19.4 Trademarks

Notice: All referenced brands, product names, service names and trademarks

are the property of their respective owners.

Quick reference data — The Quick reference data is an extract of the

product data given in the Limiting values and Characteristics sections of this

document, and as such is not complete, exhaustive or legally binding.

Mantis — is a trademark of NXP B.V.

20. Contact information

For more information, please visit: http://www.nxp.com

For sales office addresses, please send an email to: salesaddresses@nxp.com

TJA1057

All information provided in this document is subject to legal disclaimers.

Product data sheet

Rev. 5 — 23 May 2016

24 of 25

TJA1057

NXP Semiconductors

High-speed CAN transceiver

21. Contents

1

General description. . . . . . . . . . . . . . . . . . . . . . 1

19.2

19.3

19.4

Definitions . . . . . . . . . . . . . . . . . . . . . . . . . . . 23

Disclaimers . . . . . . . . . . . . . . . . . . . . . . . . . . 23

Trademarks . . . . . . . . . . . . . . . . . . . . . . . . . . 24

2

Features and benefits . . . . . . . . . . . . . . . . . . . . 1

General. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1

Predictable and fail-safe behavior . . . . . . . . . . 2

Protection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2

TJA1057GT(/3)/TJA1057GTK(/3). . . . . . . . . . . 2

2.1

2.2

2.3

2.4

20

21

Contact information . . . . . . . . . . . . . . . . . . . . 24

Contents. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25

3

4

5

Quick reference data . . . . . . . . . . . . . . . . . . . . . 2

Ordering information. . . . . . . . . . . . . . . . . . . . . 3

Block diagram . . . . . . . . . . . . . . . . . . . . . . . . . . 3

6

6.1

6.2

Pinning information. . . . . . . . . . . . . . . . . . . . . . 4

Pinning . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4

Pin description . . . . . . . . . . . . . . . . . . . . . . . . . 4

7

7.1

Functional description . . . . . . . . . . . . . . . . . . . 5

Operating modes . . . . . . . . . . . . . . . . . . . . . . . 5

Normal mode . . . . . . . . . . . . . . . . . . . . . . . . . . 5

Silent mode. . . . . . . . . . . . . . . . . . . . . . . . . . . . 5

Fail-safe features . . . . . . . . . . . . . . . . . . . . . . . 5

TXD dominant time-out function. . . . . . . . . . . . 5

Internal biasing of TXD and S input pins . . . . . 5

Undervoltage detection on pins V_CCand V_IO

7.1.1

7.1.2

7.2

7.2.1

7.2.2

7.2.3

(TJA1057GT(K)/3) . . . . . . . . . . . . . . . . . . . . . . 6

Overtemperature protection . . . . . . . . . . . . . . . 6

V_IOsupply pin (TJA1057GT(K)/3 variants only) 6

7.2.4

7.2.5

8

Limiting values. . . . . . . . . . . . . . . . . . . . . . . . . . 7

Thermal characteristics . . . . . . . . . . . . . . . . . . 8

Static characteristics. . . . . . . . . . . . . . . . . . . . . 8

Dynamic characteristics . . . . . . . . . . . . . . . . . 11

9

10

11

12

12.1

12.2

Application information. . . . . . . . . . . . . . . . . . 13

Application diagram . . . . . . . . . . . . . . . . . . . . 13

Application hints . . . . . . . . . . . . . . . . . . . . . . . 13

13

13.1

14

Test information. . . . . . . . . . . . . . . . . . . . . . . . 14

Quality information . . . . . . . . . . . . . . . . . . . . . 14

Package outline . . . . . . . . . . . . . . . . . . . . . . . . 15

Handling information. . . . . . . . . . . . . . . . . . . . 17

15

16

Soldering of SMD packages . . . . . . . . . . . . . . 17

Introduction to soldering . . . . . . . . . . . . . . . . . 17

Wave and reflow soldering . . . . . . . . . . . . . . . 17

Wave soldering. . . . . . . . . . . . . . . . . . . . . . . . 17

Reflow soldering. . . . . . . . . . . . . . . . . . . . . . . 18

16.1

16.2

16.3

16.4

17

Appendix: ISO 11898-2:2016 parameter

cross-reference list . . . . . . . . . . . . . . . . . . . . . 20

18

Revision history. . . . . . . . . . . . . . . . . . . . . . . . 22

Legal information. . . . . . . . . . . . . . . . . . . . . . . 23

Data sheet status . . . . . . . . . . . . . . . . . . . . . . 23

19

19.1

Please be aware that important notices concerning this document and the product(s)

described herein, have been included in section ‘Legal information’.

For more information, please visit: http://www.nxp.com

For sales office addresses, please send an email to: salesaddresses@nxp.com

Date of release: 23 May 2016

Document identifier: TJA1057


型号：	TJA1057GTK/3
厂家：	NXP
描述：	DATACOM, INTERFACE CIRCUIT 电信光电二极管电信集成电路
文件：	总25页 (文件大小：228K)
中文：	中文翻译
下载：	下载PDF数据表文档文件

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