TJA1102_技术文档

TJA1102

100BASE-T1 dual/single PHY for automotive Ethernet

Rev. 1 — 1 November 2017

Product short data sheet

1. General description

The TJA1102 is a 100BASE-T1 compliant dual-port Ethernet PHY optimized for

automotive use cases such as gateways, IP camera links, driver assistance systems and

back-bone networks. The device provides 100 Mbit/s transmit and receive capability over

two unshielded twisted-pair cables, supporting a cable length of up to at least 15 m. The

TJA1102 has been designed for automotive robustness, while minimizing power

consumption and system costs. For added flexibility, a single PHY version is available

(TJA1102S) in which one of the PHYs is disabled.

For the full data sheet and application hints, please register with DocStore at

https://www.docstore.nxp.com.

2. Features and benefits

2.1 General

 Dual-port 100BASE-T1 PHY

 Single-port operation possible

 MII- and RMII-compliant interfaces to the bus

 HVQFN 56-pin package (8  8 mm)

2.2 Optimized for automotive use cases

 Transmitter optimized for capacitive coupling to unshielded twisted-pair cable

 Adaptive receive equalizer optimized for automotive cable length of up to at least 15 m

 Enhanced integrated PAM-3 pulse shaping for low RF emissions

 EMC-optimized output driver strength for MII and RMII

 MDI pins protected against transients in automotive environment

 MDI pins do not need external filtering or ESD protection

 Automotive-grade temperature range from 40 C to +125 C

 Automotive product qualification in accordance with AEC-Q100

2.3 Low-power mode

 Dedicated PHY enable/disable input pin to minimize power consumption

 Inhibit output for voltage regulator control

 OPEN Alliance-compliant wake-up concept (global wake-up support)

 Robust remote wake-up detection via bus lines

 Wake-up forwarding on PHY level

 OPEN Alliance-compliant sleep concept

TJA1102

NXP Semiconductors

100BASE-T1 Dual PHY for Automotive Ethernet

 Local wake-up pin

 Wake-up via SMI-access

2.4 Diagnosis

 Real-time monitoring of link stability and transmitted data quality

 Diagnosis of cable errors (shorts and opens)

 Gap-free supply undervoltage detection with fail-silent behavior

 Internal, external and remote loopback modes for diagnosis

2.5 Miscellaneous

 Internal reverse MII mode for repeater operation

 On-chip regulators to provide 3.3 V single-supply operation

 Supports optional 1.8 V external supply for digital core

 On-chip termination resistors for the differential cable pair

 Jumbo frame support up to 16 kB

3. Ordering information

Table 1.

Ordering information

Type number

Package

Name

Description

Version

TJA1102HN^[1]

TJA1102SHN^[2]

HVQFN56 plastic thermal enhanced very thin quad flat package; no leads; 56

SOT684-13

terminals; body 8  8  0.85 mm

[1] Dual PHY.

[2] Single PHY.

TJA1102_SDS

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Product short data sheet

Rev. 1 — 1 November 2017

2 of 19

TJA1102

NXP Semiconductors

100BASE-T1 Dual PHY for Automotive Ethernet

4. Block diagram

A block diagram of the TJA1102 is shown in Figure 1. The 100BASE-T1 sections contain

the functional blocks specified in the 100BASE-T1 standard that make up the Physical

Coding Sublayer (PCS) and the Physical Medium Attachment (PMA) layer for both the

transmit and receive signal paths. The MII/RMII interface (including the Serial

Management Interface (SMI)) conforms to IEEE802.3 clause 22.

Additional blocks are defined for mode control, register configuration, interrupt control,

system configuration, reset control, local wake-up, remote wake-up, undervoltage

detection and configuration control. A number of power-supply-related functional blocks

are defined: an internal 1.8 V regulator for the digital core, a Very Low Power (VLP) supply

for Sleep mode, the reset circuit, supply monitoring and inhibit control.

The clock signals needed for the operation of the PHY are generated in the PLL block,

derived from an external crystal or an oscillator input signal.

Pin strapping allows a number of default PHY settings (e.g. Master or Slave configuration)

to be hardware-configured at power-up.

TJA1102_SDS

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Product short data sheet

Rev. 1 — 1 November 2017

3 of 19

TJA1102

NXP Semiconductors

100BASE-T1 Dual PHY for Automotive Ethernet

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Fig 1. Block diagram (PHY1 is disabled in TJA1102S)

TJA1102_SDS

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Product short data sheet

Rev. 1 — 1 November 2017

4 of 19

TJA1102

NXP Semiconductors

100BASE-T1 Dual PHY for Automotive Ethernet

5. Functional description

5.1 System configuration

The TJA1102 comprises two 100BASE-T1 compliant Ethernet PHYs, with 100 Mbit/s

transmit and receive capability over a single unshielded twisted-pair cable. The TJA1102

supports a cable length of up to at least 15 m, with a bit error rate of 1E-10 or less. It is

optimized for capacitive signal coupling to the twisted-pair lines. A common-mode choke

is typically inserted into the signal path to comply with automotive EMC requirements.

The TJA1102 is designed to provide a cost-optimized system solution for automotive

Ethernet links. It communicates with the Media Access Control (MAC) unit via the MII or

RMII interface. In combination with other devices, it offers a highly flexible 4-port switch

solution, with two TJA1102 Dual PHYs providing the 100BASE-T1 physical layer ports.

The TJA1102 can operate with a crystal or an external clock. The clock can be forwarded

to other PHYs (in the application diagram in Figure 2, the clock of one TJA1102 is used as

reference for a second TJA1102). The clocking and power supply schemes are

independent of each other.

Control and status information is exchanged with the host controller via the SMI interface.

The INH output can be used to switch off the external regulator when all ports are in Sleep

mode.

Note that the Dual PHY can be configured to operate as a single PHY via pin strapping or

the SMI. Alternatively, a TJA1102S could be used when only a single PHY is needed.

TJA1102_SDS

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Product short data sheet

Rev. 1 — 1 November 2017

5 of 19

TJA1102

NXP Semiconductors

100BASE-T1 Dual PHY for Automotive Ethernet

5.1.1 Clocking scheme with MII and clock provided by the switch and one of the

TJA1102 devices

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One of the TJA1102 devices could be replaced by a TJA1102S if only three PHYs are needed.

Fig 2. Typical TJA1102 MII switch application with SJA1105

TJA1102_SDS

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Product short data sheet

Rev. 1 — 1 November 2017

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TJA1102

NXP Semiconductors

100BASE-T1 Dual PHY for Automotive Ethernet

5.1.2 Clocking scheme with RMII and clock provided by the switch

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Fig 3. Typical RMII switch application with SJA1105 (XTAL at SJA1105)

TJA1102_SDS

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Product short data sheet

Rev. 1 — 1 November 2017

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TJA1102

NXP Semiconductors

100BASE-T1 Dual PHY for Automotive Ethernet

5.2 MII and RMII

The TJA1102 supports a number of MII modes that can be selected via pin strapping or

the SMI. The PHYs should be configured to operate in the same mode, with common

clocking. The following modes are supported:

• MII

• RMII (25 MHz XTAL or external 50 MHz via REF_CLK)

• Reverse MII (connected externally or internally to the second PHY)

5.2.1 MII

The connections between the PHY and the MAC are shown in more detail in Figure 4.

Data is exchanged via 4-bit wide data nibbles on TXD[3:0] and RXD[3:0]. Transmit and

receive data is synchronized with the transmit (TXC) and receive (RXC) clocks. Both clock

signals are provided by the PHY and are typically derived from an external clock or crystal

running at a nominal frequency of 25 MHz (100 ppm). Normal data transmission is

initiated with a HIGH level on TXEN, while a HIGH level on RXDV indicates normal data

reception.

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Fig 4. MII signaling

5.2.2 RMII

5.2.2.1 Signaling and encoding

RMII data is exchanged via 2-bit wide data nibbles on TXD[1:0] and RXD[1:0], as

illustrated in Figure 5. To achieve the same data rate as MII, the interface is clocked at a

nominal frequency of 50 MHz. A single clock signal, REF_CLK, is provided for both

transmit and received data. This clock signal is provided by the PHY and is typically

derived from an external 25 MHz (100 ppm) crystal (see Figure 5 (a)). Alternatively, a

50 MHz clock signal (50 ppm) generated by an external oscillator can be connected to

pin REF_CLK (see Figure 5 (b)). A third option is to connect a 25 MHz (100 ppm) clock

signal generated by another PHY or switch to pin CLK_IN_OUT (see Figure 5 (c)).

TJA1102_SDS

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Product short data sheet

Rev. 1 — 1 November 2017

8 of 19

TJA1102

NXP Semiconductors

100BASE-T1 Dual PHY for Automotive Ethernet

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Fig 5. RMII signaling

5.2.3 Reverse MII

In Reverse MII mode, two PHYs are connected back-to-back via the MII interface to

realize a repeater function on the physical layer. The MII signals are cross-connected: RX

output signals from one PHY are connected to the TX inputs on the other PHY. The TXC

and RXC clock signals become inputs on the PHY connected in Reverse MII mode (P0).

Reverse MII mode is selected by setting bits MII_MODE = 11.

Two configuration options are available on the TJA1102. The P0 and P1 MII pins can be

connected externally on the PCB (INT_REV_MII = 0). Alternatively, the MII ports can

communicate via existing internal connections (INT_REV_MII = 1), as illustrated in

Figure 6.

TJA1102_SDS

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Product short data sheet

Rev. 1 — 1 November 2017

9 of 19

TJA1102

NXP Semiconductors

100BASE-T1 Dual PHY for Automotive Ethernet

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Fig 6. 100BASE-T1 repeater with TJA1102 Reverse MII

The TJA1102S can be configured in reverse MII mode by connecting the MII pins

externally to a fast Ethernet product, is illustrated in Figure 7.

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Fig 7. Fast Ethernet to 100BASE-T1 media converter with TJA1102S in Reverse MII

5.3 Sleep and wake-up forwarding concept

The sleep and wake-up forwarding concept of the TJA1102 is compliant with the OPEN

Alliance Sleep wake-up specification. The TJA1102 features a wake-up request

forwarding function that enables fast wake-up forwarding without the need for a switch,

MAC or C action. The wake-forwarding principle is illustrated in Figure 8. The wake-up

can be forwarded via non-active (gray PHYs in the figure) or active links (white PHY). In

the case of a non-active link, a wake-up pulse (WUP; duration t_w(wake)) is transmitted to be

detected as activity at the link partner. For an active link, wake up request (WUR)

scrambler code groups are sent.

TJA1102_SDS

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Product short data sheet

Rev. 1 — 1 November 2017

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TJA1102

NXP Semiconductors

100BASE-T1 Dual PHY for Automotive Ethernet

The wake-up behavior of the PHYs can be configured individually. This arrangement

allows WAKE_IN_OUT to be used as a local wake-up or to have a mixed system with only

some ports forwarding a wake-up request. The following configuration options are

available and are selected via the SMI Configuration register 1:

REMWUPHY determines whether a PHY reacts to a remote wake-up request.

FWDPHYREM determines whether a PHY forwards a wake-up request (from another

port or via WAKE_IN_OUT) to its MDI. A WUP or WUR is sent, depending on the link

status.

LOCWUPHY determines whether a PHY should be woken up in response to a local

wake-up event (forwarded from another port or via WAKE_IN_OUT)

FWDPHYLOC determines whether wake-up event should be forwarded to other ports

(i.e. should the second PHY be informed and/or the WAKE_IN_OUT signal activated).

The WAKE_IN_OUT signal features a programmable timeout to enable it to support a

number of wake-up concepts (e.g. wake-up line). It reacts on a rising edge.

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6. Application information

The MDI circuit used for each PHY port is shown in Figure 9. The common mode

termination depends on OEM requirements and might vary, depending on the application.

The common mode choke is expected to be compliant with the OPEN Alliance CMC

specification. The 100 nF coupling capacitors should have a voltage range  50 V with

10 % (max) tolerance.

TJA1102_SDS

All information provided in this document is subject to legal disclaimers.

Product short data sheet

Rev. 1 — 1 November 2017

11 of 19

TJA1102

NXP Semiconductors

100BASE-T1 Dual PHY for Automotive Ethernet

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Further information can be found in the TJA1102 application hints [Ref. 2].

7. Package information

The TJA1102 comes in the HVQFN-56 package as shown in Figure 10. Measuring just

64 mm²with a pitch of 0.5 mm, it is particularly suited to PCB space-constrained

applications, such as an integrated IP camera module. The package features wettable

sides/flanks to allow for optical inspection of the soldering process. The exposed die pad

shown in the package diagram should be connected to ground.

TJA1102_SDS

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Product short data sheet

Rev. 1 — 1 November 2017

12 of 19

TJA1102

NXP Semiconductors

100BASE-T1 Dual PHY for Automotive Ethernet

8. Package outline

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Fig 10. Package outline SOT684-13 (HVQFN56)

TJA1102_SDS

All information provided in this document is subject to legal disclaimers.

Product short data sheet

Rev. 1 — 1 November 2017

13 of 19

TJA1102

NXP Semiconductors

100BASE-T1 Dual PHY for Automotive Ethernet

9. Soldering of SMD packages

This text provides a very brief insight into a complex technology. A more in-depth account

of soldering ICs can be found in Application Note AN10365 “Surface mount reflow

soldering description”.

9.1 Introduction to soldering

Soldering is one of the most common methods through which packages are attached to

Printed Circuit Boards (PCBs), to form electrical circuits. The soldered joint provides both

the mechanical and the electrical connection. There is no single soldering method that is

ideal for all IC packages. Wave soldering is often preferred when through-hole and

Surface Mount Devices (SMDs) are mixed on one printed wiring board; however, it is not

suitable for fine pitch SMDs. Reflow soldering is ideal for the small pitches and high

densities that come with increased miniaturization.

9.2 Wave and reflow soldering

Wave soldering is a joining technology in which the joints are made by solder coming from

a standing wave of liquid solder. The wave soldering process is suitable for the following:

• Through-hole components

• Leaded or leadless SMDs, which are glued to the surface of the printed circuit board

Not all SMDs can be wave soldered. Packages with solder balls, and some leadless

packages which have solder lands underneath the body, cannot be wave soldered. Also,

leaded SMDs with leads having a pitch smaller than ~0.6 mm cannot be wave soldered,

due to an increased probability of bridging.

The reflow soldering process involves applying solder paste to a board, followed by

component placement and exposure to a temperature profile. Leaded packages,

packages with solder balls, and leadless packages are all reflow solderable.

Key characteristics in both wave and reflow soldering are:

• Board specifications, including the board finish, solder masks and vias

• Package footprints, including solder thieves and orientation

• The moisture sensitivity level of the packages

• Package placement

• Inspection and repair

• Lead-free soldering versus SnPb soldering

9.3 Wave soldering

Key characteristics in wave soldering are:

• Process issues, such as application of adhesive and flux, clinching of leads, board

transport, the solder wave parameters, and the time during which components are

exposed to the wave

• Solder bath specifications, including temperature and impurities

TJA1102_SDS

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Product short data sheet

Rev. 1 — 1 November 2017

14 of 19

TJA1102

NXP Semiconductors

100BASE-T1 Dual PHY for Automotive Ethernet

9.4 Reflow soldering

Key characteristics in reflow soldering are:

• Lead-free versus SnPb soldering; note that a lead-free reflow process usually leads to

higher minimum peak temperatures (see Figure 11) than a SnPb process, thus

reducing the process window

• Solder paste printing issues including smearing, release, and adjusting the process

window for a mix of large and small components on one board

• Reflow temperature profile; this profile includes preheat, reflow (in which the board is

heated to the peak temperature) and cooling down. It is imperative that the peak

temperature is high enough for the solder to make reliable solder joints (a solder paste

characteristic). In addition, the peak temperature must be low enough that the

packages and/or boards are not damaged. The peak temperature of the package

depends on package thickness and volume and is classified in accordance with

Table 2 and 3

Table 2.

SnPb eutectic process (from J-STD-020D)

Package thickness (mm) Package reflow temperature (C)

Volume (mm³)

< 350

 350

220

< 2.5

235

220

 2.5

220

Table 3.

Lead-free process (from J-STD-020D)

Package thickness (mm) Package reflow temperature (C)

Volume (mm³)

< 350

260

350 to 2000

> 2000

260

< 1.6

260

250

245

1.6 to 2.5

> 2.5

260

245

250

245

Moisture sensitivity precautions, as indicated on the packing, must be respected at all

times.

Studies have shown that small packages reach higher temperatures during reflow

soldering, see Figure 11.

TJA1102_SDS

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Product short data sheet

Rev. 1 — 1 November 2017

15 of 19

TJA1102

NXP Semiconductors

100BASE-T1 Dual PHY for Automotive Ethernet

maximum peak temperature

= MSL limit, damage level

temperature

minimum peak temperature

= minimum soldering temperature

peak

temperature

time

001aac844

MSL: Moisture Sensitivity Level

Fig 11. Temperature profiles for large and small components

For further information on temperature profiles, refer to Application Note AN10365

“Surface mount reflow soldering description”.

10. References

[1] IEEE Std 802.3bw-2015, 26 October 2015

[2] AH1508_TJA1102 Application Hints

11. Revision history

Table 4.

Revision history

Document ID

Release date

Data sheet status

Change notice

Supersedes

TJA1102_SDS v.1

20171101

Product short data sheet

-

TJA1102_SDS

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Product short data sheet

Rev. 1 — 1 November 2017

16 of 19

TJA1102

NXP Semiconductors

100BASE-T1 Dual PHY for Automotive Ethernet

12. Legal information

12.1 Data sheet status

Document status^[1][2]

Product status^[3]

Development

Definition

Objective [short] data sheet

This document contains data from the objective specification for product development.

This document contains data from the preliminary specification.

This document contains the product specification.

Preliminary [short] data sheet Qualification

Product [short] data sheet Production

[1]

[2]

[3]

Please consult the most recently issued document before initiating or completing a design.

The term ‘short data sheet’ is explained in section “Definitions”.

The product status of device(s) described in this document may have changed since this document was published and may differ in case of multiple devices. The latest product status

information is available on the Internet at URL http://www.nxp.com.

Suitability for use in automotive applications — This NXP

12.2 Definitions

Semiconductors product has been qualified for use in automotive

applications. Unless otherwise agreed in writing, the product is not designed,

authorized or warranted to be suitable for use in life support, life-critical or

safety-critical systems or equipment, nor in applications where failure or

malfunction of an NXP Semiconductors product can reasonably be expected

to result in personal injury, death or severe property or environmental

damage. NXP Semiconductors and its suppliers accept no liability for

inclusion and/or use of NXP Semiconductors products in such equipment or

applications and therefore such inclusion and/or use is at the customer's own

risk.

Draft — The document is a draft version only. The content is still under

internal review and subject to formal approval, which may result in

modifications or additions. NXP Semiconductors does not give any

representations or warranties as to the accuracy or completeness of

information included herein and shall have no liability for the consequences of

use of such information.

Short data sheet — A short data sheet is an extract from a full data sheet

with the same product type number(s) and title. A short data sheet is intended

for quick reference only and should not be relied upon to contain detailed and

full information. For detailed and full information see the relevant full data

sheet, which is available on request via the local NXP Semiconductors sales

office. In case of any inconsistency or conflict with the short data sheet, the

full data sheet shall prevail.

Applications — Applications that are described herein for any of these

products are for illustrative purposes only. NXP Semiconductors makes no

representation or warranty that such applications will be suitable for the

specified use without further testing or modification.

Customers are responsible for the design and operation of their applications

and products using NXP Semiconductors products, and NXP Semiconductors

accepts no liability for any assistance with applications or customer product

design. It is customer’s sole responsibility to determine whether the NXP

Semiconductors product is suitable and fit for the customer’s applications and

products planned, as well as for the planned application and use of

customer’s third party customer(s). Customers should provide appropriate

design and operating safeguards to minimize the risks associated with their

applications and products.

Product specification — The information and data provided in a Product

data sheet shall define the specification of the product as agreed between

NXP Semiconductors and its customer, unless NXP Semiconductors and

customer have explicitly agreed otherwise in writing. In no event however,

shall an agreement be valid in which the NXP Semiconductors product is

deemed to offer functions and qualities beyond those described in the

Product data sheet.

NXP Semiconductors does not accept any liability related to any default,

damage, costs or problem which is based on any weakness or default in the

customer’s applications or products, or the application or use by customer’s

third party customer(s). Customer is responsible for doing all necessary

testing for the customer’s applications and products using NXP

Semiconductors products in order to avoid a default of the applications and

the products or of the application or use by customer’s third party

customer(s). NXP does not accept any liability in this respect.

12.3 Disclaimers

Limited warranty and liability — Information in this document is believed to

be accurate and reliable. However, NXP Semiconductors does not give any

representations or warranties, expressed or implied, as to the accuracy or

completeness of such information and shall have no liability for the

consequences of use of such information. NXP Semiconductors takes no

responsibility for the content in this document if provided by an information

source outside of NXP Semiconductors.

Limiting values — Stress above one or more limiting values (as defined in

the Absolute Maximum Ratings System of IEC 60134) will cause permanent

damage to the device. Limiting values are stress ratings only and (proper)

operation of the device at these or any other conditions above those given in

the Recommended operating conditions section (if present) or the

Characteristics sections of this document is not warranted. Constant or

repeated exposure to limiting values will permanently and irreversibly affect

the quality and reliability of the device.

In no event shall NXP Semiconductors be liable for any indirect, incidental,

punitive, special or consequential damages (including - without limitation - lost

profits, lost savings, business interruption, costs related to the removal or

replacement of any products or rework charges) whether or not such

damages are based on tort (including negligence), warranty, breach of

contract or any other legal theory.

Notwithstanding any damages that customer might incur for any reason

whatsoever, NXP Semiconductors’ aggregate and cumulative liability towards

customer for the products described herein shall be limited in accordance

with the Terms and conditions of commercial sale of NXP Semiconductors.

Terms and conditions of commercial sale — NXP Semiconductors

products are sold subject to the general terms and conditions of commercial

sale, as published at http://www.nxp.com/profile/terms, unless otherwise

agreed in a valid written individual agreement. In case an individual

agreement is concluded only the terms and conditions of the respective

agreement shall apply. NXP Semiconductors hereby expressly objects to

applying the customer’s general terms and conditions with regard to the

purchase of NXP Semiconductors products by customer.

Right to make changes — NXP Semiconductors reserves the right to make

changes to information published in this document, including without

limitation specifications and product descriptions, at any time and without

notice. This document supersedes and replaces all information supplied prior

to the publication hereof.

TJA1102_SDS

All information provided in this document is subject to legal disclaimers.

Product short data sheet

Rev. 1 — 1 November 2017

17 of 19

TJA1102

NXP Semiconductors

100BASE-T1 Dual PHY for Automotive Ethernet

No offer to sell or license — Nothing in this document may be interpreted or

construed as an offer to sell products that is open for acceptance or the grant,

conveyance or implication of any license under any copyrights, patents or

other industrial or intellectual property rights.

Translations — A non-English (translated) version of a document is for

reference only. The English version shall prevail in case of any discrepancy

between the translated and English versions.

Export control — This document as well as the item(s) described herein

may be subject to export control regulations. Export might require a prior

authorization from competent authorities.

12.4 Trademarks

Notice: All referenced brands, product names, service names and trademarks

are the property of their respective owners.

13. Contact information

For more information, please visit: http://www.nxp.com

For sales office addresses, please send an email to: salesaddresses@nxp.com

TJA1102_SDS

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Product short data sheet

Rev. 1 — 1 November 2017

18 of 19

TJA1102

NXP Semiconductors

100BASE-T1 Dual PHY for Automotive Ethernet

14. Contents

1

General description. . . . . . . . . . . . . . . . . . . . . . 1

2

Features and benefits . . . . . . . . . . . . . . . . . . . . 1

General. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1

Optimized for automotive use cases. . . . . . . . . 1

Low-power mode . . . . . . . . . . . . . . . . . . . . . . . 1

Diagnosis . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2

Miscellaneous. . . . . . . . . . . . . . . . . . . . . . . . . . 2

2.1

2.2

2.3

2.4

2.5

3

4

Ordering information. . . . . . . . . . . . . . . . . . . . . 2

Block diagram . . . . . . . . . . . . . . . . . . . . . . . . . . 3

5

5.1

5.1.1

Functional description . . . . . . . . . . . . . . . . . . . 5

System configuration . . . . . . . . . . . . . . . . . . . . 5

Clocking scheme with MII and clock provided by

the switch and one of the TJA1102 devices . . . 6

Clocking scheme with RMII and clock provided by

the switch . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7

MII and RMII. . . . . . . . . . . . . . . . . . . . . . . . . . . 8

MII. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8

RMII . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8

Signaling and encoding . . . . . . . . . . . . . . . . . . 8

Reverse MII . . . . . . . . . . . . . . . . . . . . . . . . . . . 9

Sleep and wake-up forwarding concept . . . . . 10

5.1.2

5.2

5.2.1

5.2.2

5.2.2.1

5.2.3

5.3

6

7

8

Application information. . . . . . . . . . . . . . . . . . 11

Package information . . . . . . . . . . . . . . . . . . . . 12

Package outline . . . . . . . . . . . . . . . . . . . . . . . . 13

9

Soldering of SMD packages . . . . . . . . . . . . . . 14

Introduction to soldering . . . . . . . . . . . . . . . . . 14

Wave and reflow soldering . . . . . . . . . . . . . . . 14

Wave soldering. . . . . . . . . . . . . . . . . . . . . . . . 14

Reflow soldering. . . . . . . . . . . . . . . . . . . . . . . 15

9.1

9.2

9.3

9.4

10

11

References . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16

Revision history. . . . . . . . . . . . . . . . . . . . . . . . 16

12

Legal information. . . . . . . . . . . . . . . . . . . . . . . 17

Data sheet status . . . . . . . . . . . . . . . . . . . . . . 17

Definitions. . . . . . . . . . . . . . . . . . . . . . . . . . . . 17

Disclaimers. . . . . . . . . . . . . . . . . . . . . . . . . . . 17

Trademarks. . . . . . . . . . . . . . . . . . . . . . . . . . . 18

12.1

12.2

12.3

12.4

13

14

Contact information. . . . . . . . . . . . . . . . . . . . . 18

Contents . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19

Please be aware that important notices concerning this document and the product(s)

described herein, have been included in section ‘Legal information’.

For more information, please visit: http://www.nxp.com

For sales office addresses, please send an email to: salesaddresses@nxp.com

Date of release: 1 November 2017

Document identifier: TJA1102_SDS


型号：	TJA1102
厂家：	NXP
描述：	100BASE-T1 dual/single PHY for automotive Ethernet
文件：	总19页 (文件大小：220K)
中文：	中文翻译
下载：	下载PDF数据表文档文件

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