TSA5522T-T [NXP]
IC PLL FREQUENCY SYNTHESIZER, 1400 MHz, PDSO16, 3.90 MM, PLASTIC, MS-012AC, SOT-109-1, SOP-16, PLL or Frequency Synthesis Circuit;
| 型号： | TSA5522T-T |
| 厂家： | 
NXP |
| 描述： | IC PLL FREQUENCY SYNTHESIZER, 1400 MHz, PDSO16, 3.90 MM, PLASTIC, MS-012AC, SOT-109-1, SOP-16, PLL or Frequency Synthesis Circuit |
| 文件： | 总20页 (文件大小：175K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
INTEGRATED CIRCUITS
DATA SHEET
TSA5522
1.4 GHz I2C-bus controlled
synthesizer
1996 Jan 23
Product specification
Supersedes data of 1995 Mar 22
File under Integrated Circuits, IC02
Philips Semiconductors
Product specification
1.4 GHz I2C-bus controlled synthesizer
TSA5522
FEATURES
• Complete 1.4 GHz single chip system
• Three PNP band switch buffers (20 mA)
• Four bus-controlled bidirectional ports (NPN
open-collector outputs); only one port in 16-pin version
• 33 V tuning voltage output
APPLICATIONS
• In-lock detector
• TV tuners and front-ends
• VCR tuners.
• 5-step ADC
• Mixer-Oscillator (M/O) band switch output
• 15-bit programmable divider
• Programmable reference divider ratio (512, 640
or 1024)
• Programmable charge-pump current (50 or 250 µA)
• Varicap drive disable
• I2C-bus format
– address plus 4 data bytes transmission (write mode)
– address plus 1 status byte transmission (read mode)
– three independent addresses
• Low power and low radiation.
ORDERING INFORMATION
PACKAGE
TYPE NUMBER
NAME
DESCRIPTION
VERSION
TSA5522M
TSA5522T
SSOP20
SO16
plastic shrink small outline package; 20 leads; body width 4.4 mm
plastic small outline package; 16 leads; body width 3.9 mm
SOT266-1
SOT109-1
1996 Jan 23
2
Philips Semiconductors
Product specification
1.4 GHz I2C-bus controlled synthesizer
TSA5522
QUICK REFERENCE DATA
SYMBOL
PARAMETER
supply voltage (+5 V)
CONDITIONS
MIN.
4.5
TYP.
MAX. UNIT
VCC1
VCC2
ICC1
ICC2
fRF
−
5.5
V
band switch supply voltage (+12 V)
supply current
VCC1
−
12
22
27
−
13.5
30
V
mA
mA
MHz
dBm
dBm
dBm
MHz
mA
mA
°C
band switch supply current
RF input frequency
note 1
−
32
64
1400
3
Vi(RF)
RF input voltage
fi = 80 to 150 MHz
− 25
− 28
− 26
−
−
fi = 150 to 1000 MHz
fi = 1000 to 1400 MHz
−
3
−
3
fxtal
crystal oscillator input frequency
PNP band switch buffers output current
NPN open-collector output current
operating ambient temperature
storage temperature (IC)
4
−
Io(PNP)
Io(NPN)
Tamb
Tstg
−
20
20
−
25
−
25
−20
−40
+85
+150
−
°C
Note
1. One band switch buffer ON; Io = 20 mA.
The ADC is available for digital AFC control. The ADC
code is read during a read operation on the I2C-bus. The
ADC input is combined with the port P6. In the TEST
mode, this port is also used as a TEST output for fref and
1⁄2fdiv (see Table 4).
GENERAL DESCRIPTION (see Fig.1)
The device is a single chip PLL frequency synthesizer
designed for TV and VCR tuning systems. The circuit
consists of a divide-by-eight prescaler with its own
preamplifier, a 15-bit programmable divider, a crystal
oscillator and its programmable reference divider and a
phase/frequency detector combined with a charge-pump
which drives the tuning amplifier, including 33 V output.
Three high-current PNP band switch buffers are provided
for band switching together with four open-collector NPN
outputs (only one open-collector output on 16-pin
devices). These ports can also be used as input ports [one
Analog-to Digital Converter (ADC) and three general
purpose I/O ports (not available on 16-pin devices)]. An
output is provided to control a Philips mixer/oscillator IC in
combination with the PNP buffers state.
I2C-bus format
Five serial bytes (including address byte) are required to
address the device, select the VCO frequency, program
the ports, set the charge-pump current and the reference
divider ratio. The device has three independent I2C-bus
addresses selected by applying a specific voltage on AS
input (see Table 3). The general address C2 is always
valid.
Depending on the reference divider ratio (512, 640
or 1024), the phase comparator operates at 3.90625 kHz,
6.25 kHz or 7.8125 kHz with a 4 MHz crystal. The LOCK
detector bit FL is set to logic 1 when the loop is locked and
is read on the SDA line (status byte) during a read
operation.
1996 Jan 23
3
Philips Semiconductors
Product specification
1.4 GHz I2C-bus controlled synthesizer
TSA5522
BLOCK DIAGRAM
LM2D6
bnok,lfuapgedwith
1996 Jan 23
4
Philips Semiconductors
Product specification
1.4 GHz I2C-bus controlled synthesizer
TSA5522
PINNING
SYMBOL
VCC1
SO16
SSOP20
DESCRIPTION
1
2
1
2
voltage supply (+5 V)
RF signal input 1
RF signal input 2
RF1
RF2
BS
3
3
4
4
band switch output to mixer/oscillator drive
ground
VEE
VCC2
n.c.
P2
5
5
6
6
voltage supply (+12 V)
−
7
not connected
7
8
PNP band switch buffer output 2
PNP band switch buffer output 1
PNP band switch buffer output 0
charge-pump output
P1
8
9
P0
9
10
11
12
13
14
15
16
17
18
19
20
CP
10
11
12
−
Vtune
P6
tuning voltage output
NPN open-collector output/ADC input
NPN open-collector output/comparator input
NPN open-collector output/comparator input
NPN open-collector output/comparator input
serial clock input
P7
P5
−
P4
−
SCL
SDA
AS
13
14
15
16
serial data input/output
address selection input
XTAL
crystal oscillator input
handbook, halfpage
V
1
2
20 XTAL
19 AS
18
CC1
RF1
handbook, halfpage
V
1
2
3
4
5
6
7
8
16
XTAL
CC1
RF1
15 AS
3
RF2
BS
SDA
17 SCL
RF2
BS
14 SDA
13 SCL
4
V
5
16
15
P4
P5
EE
TSA5522T
TSA5522M
V
12
11
10
9
V
P6
V
6
CC2
n.c.
P2
EE
V
7
14 P7
13 P6
CC2
P2
tune
CP
PO
8
P1
V
9
12
11
P1
P0
tune
MLD225
10
CP
MLD230
Fig.2 Pin configuration (SO16).
Fig.3 Pin configuration (SSOP20).
1996 Jan 23
5
Philips Semiconductors
Product specification
1.4 GHz I2C-bus controlled synthesizer
TSA5522
byte transmitted indicates whether frequency data
FUNCTIONAL DESCRIPTION
(first bit = 0) or control and ports data (first bit = 1) will
follow. Until an I2C-bus STOP command is sent by the
controller, additional data bytes can be entered without the
need to re-address the device. The frequency register is
loaded after the 8th clock pulse of the second divider
byte (DB2), the control register is loaded after the 8th clock
pulse of the control byte (CB) and the ports register is
loaded after the 8th clock pulse of the ports byte (PB).
The device is controlled via the two-wire I2C-bus. For
programming, there is one module address (7 bits) and the
R/W bit for selecting the READ or the WRITE mode.
I2C-bus mode
WRITE MODE (R/W = 0); see Table 1
Data bytes can be sent to the device after the address
transmission (first byte). Four data bytes are required to
fully program the device. The bus transceiver has an
auto-increment facility which permits the programming of
the device within one single transmission
I2C-BUS ADDRESS SELECTION
The module address contains programmable address bits
(MA1 and MA0) which offer the possibility of having
several synthesizers (up to 3) in one system by applying a
specific voltage on the AS input.
(address + 4 data bytes).
The device can also be partially programmed providing
that the first data byte following the address is divider
byte 1 (DB1) or control byte (CB). The bits in the data
bytes are defined in Table 1. The first bit of the first data
The relationship between MA1 and MA0 and the input
voltage on the AS input is given in Table 3.
Table 1 I2C-bus data format
BYTE
MSB
1
DATA BYTE
LSB
COMMAND
Address byte (ADB)
Divider byte 1 (DB1)
Divider byte 2 (DB2)
Control byte (CB)
Ports byte (PB)
1
0
0
0
N11
N3
T0
X
MA1
N10
N2
MA0
N9
0
A
A
A
A
A
0
N14
N6
CP
P6
N13
N5
N12
N4
N8
N0
OS
P0
N7
N1
1
P7(1)
T2
P5(1)
T1
RSA
P2
RSB
P1
P4(1)
Note
1. Not available on 16-pin devices.
Table 2 Description of Table 1
SYMBOL
DESCRIPTION
programmable address bits (see Table 3)
programmable divider bits N = N14 × 214 + N13 × 213 + ... + N1 × 2 + N0
charge-pump current; CP = 0 = 50 µA; CP = 1 = 250 µA
test bits (see Table 4). For normal operation T2 = 0; T1 = 0; T0 = 1
reference divider ratio select bits (see Table 5)
MA1, MA0
N14 to N0
CP
T2 to T0
RSA, RSB
OS
tuning amplifier control bit; for normal operation OS = 0 and tuning voltage is ON; when
OS = 1 tuning voltage is OFF (high impedance)
P2 to P0
P7 to P4
X
PNP band switch buffers control bits
NPN open collector control bits when Pn = 0 output n is OFF; when Pn = 1 output n is ON
don’t care
1996 Jan 23
6
Philips Semiconductors
Product specification
1.4 GHz I2C-bus controlled synthesizer
TSA5522
Table 3 Address selection
READ MODE; R/W = 1 (see Table 7)
Data can be read from the device by setting the R/W bit to
logic 1. After the slave address has been recognized, the
device generates an acknowledge pulse and the first data
byte (status byte) is transferred on the SDA line (MSB
first). Data is valid on the SDA line during a HIGH level of
the SCL clock signal. A second data byte can be read from
the device if the microcontroller generates an
VOLTAGE APPLIED ON AS
MA1
MA2
INPUT
0 to 0.1VCC1
Always valid
0
0
1
1
0
1
0
1
0.4VCC1 to 0.6VCC1
0.9VCC1 to VCC1
acknowledge on the SDA line (master acknowledge). End
of transmission will occur if no master acknowledge
occurs. The device will then release the data line to allow
the microcontroller to generate a STOP condition. When
ports P4 to P7 are used as inputs, the corresponding bits
must be logic 0 (high impedance state). The POR flag is
set to logic 1 at power-on. The flag is reset when an
end-of-data is detected by the device (end of a read
sequence). Control of the loop is made possible with the
in-lock flag (FL) which indicates when the loop is locked
(FL = 1).
Table 4 Test bits
T2 T1 T0
DEVICE OPERATION
0
0
1
1
1
1
0
1
1
1
0
0
1
X
0
1
0
1
normal mode
charge-pump is OFF
charge-pump is sinking current
charge-pump is sourcing current
fref is available at LOCK output
1⁄2fdiv is available at LOCK output
The bits I2, to I0 represent the status of the I/O ports
P7, P5 and P4 respectively. A logic 0 indicates a LOW
level and a logic 1 indicates a HIGH level
(see “Characteristics”).
Table 5 Ratio select bits
RSA
RSB
REFERENCE DIVIDER
X
0
1
0
1
1
640
1024
512
A built-in ADC is available at pin P6. This converter can be
used to apply AFC information to the microcontroller from
the IF section of the television. The relationship between
the bits A2 to A0 is given in Table 8.
Table 6 Band switch output levels
VOLTAGE
ON BS
OUTPUT
PHILIPS M/O
BAND
P2
P1
P0
0
1
0
1
0
0
0
0
1
0.25 V
0.4VCC1
0.8VCC1
band A
band B
band C
Table 7 READ data format
BYTE
MSB
DATA BYTE
LSB
1
A0(5)
COMMAND
Address byte (ADB)
Status byte (SB)
1
1
0
I2(4)
0
0
MA1
A2(5)
MA0
A1(5)
A(1)
POR(2) FL(3)
I1(4)
I0(4)
−
Notes
1. A = acknowledge.
2. POR = power-on-reset (POR = 1 at power-on).
3. FL = in-lock flag (FL = 1 when loop is locked).
4. I2 to I0 = digital levels for I/O ports P7, P5 and P4 respectively.
5. A2 to A0 = digital outputs of the 5-level ADC.
1996 Jan 23
7
Philips Semiconductors
Product specification
1.4 GHz I2C-bus controlled synthesizer
TSA5522
Table 8 ADC levels
VOLTAGE APPLIED ON
A2
A1
A0
PORT P6(1)
0.6VCC1 to 13.5V
1
0
0
0
0
0
1
1
0
0
0
1
0
1
0
0.45VCC1 to 0.6VCC1
0.3VCC1 to 0.45VCC1
0.15VCC1 to 0.3VCC1
0 to 0.15VCC1
Note
1. Accuracy is 0.02VCC1
.
LIMITING VALUES
In accordance with the Absolute Maximum System (IEC 134)
SYMBOL PARAMETER
VCC1
MIN.
−0.3
MAX
UNIT
supply voltage +5 V
supply voltage + 12 V
6.0
V
VCC2
Vi(RF)
Vo(BS)
Vo(PNP)
Io(PNP)
VNPN
INPN
−0.3
−0.3
−0.3
− 0.3
−1
16
V
prescaler input voltage
VCC1
VCC1
VCC2
25
V
band switch output voltage
V
PNP band switch buffer output voltage
PNP band switch buffers output current
NPN open-collector output voltage
NPN open-collector output current
charge-pump output voltage
output tuning voltage
V
mA
V
−0.3
−1
16
25
mA
V
Vo(CP)
Vo(tune)
Vi(SCL)
Vi/o(SDA)
Io(SDA)
Vi(AS)
Vi(xtal)
Tstg
−0.3
−0.3
−0.3
−0.3
−1
VCC1
35
V
serial clock input voltage
6.0
V
serial data input/output voltage
serial data output current
6.0
V
5
mA
V
address selection input voltage
crystal oscillator input voltage
storage temperature range (IC)
maximum junction temperature
short circuit time; every pin to VCC1 or GND
−0.3
−0.3
−40
−
VCC1
VCC1
+150
+150
10
V
°C
°C
s
Tj
tsc
−
HANDLING
Inputs and outputs are protected against electrostatic discharge in normal handling. However, to be totally safe, it is
desirable to take normal precautions appropriate to handling bipolar devices. Every pin withstands the ESD test in
accordance with MIL-STD-883C category B (2000 V). Every pin withstands the ESD test in accordance with Philips
Semiconductors Machine Model 0 Ω, 200 pF (200 V).
1996 Jan 23
8
Philips Semiconductors
Product specification
1.4 GHz I2C-bus controlled synthesizer
TSA5522
THERMAL CHARACTERISTICS
SYMBOL
PARAMETER
MAX
UNIT
Rth j-a
thermal resistance from junction to ambient in free air
SO16
110
120
K/W
K/W
SSOP20
CHARACTERISTICS
VCC1 = 4.5 to 5.5 V; VCC2 = VCC1 to 13.2 V; Tamb = −20 to 85 °C; unless otherwise specified; see note 1
SYMBOL
VCC1
PARAMETER
supply voltage (+5 V)
supply voltage (+12 V)
supply current
CONDITIONS
MIN.
4.5
TYP.
MAX
5.5
UNIT
−
−
V
V
VCC2
VCC1
13.5
30
ICC1
−
−
22
27
mA
mA
ICC2
supply current
One band switch buffer is ON;
Isource = 20 mA
32
fRF
RF input frequency
divider ratio
64
−
−
1400
MHz
MHz
DR
15-bit frequency word
256
32767
Crystal oscillator
fxtal
crystal oscillator input
Rxtal = 25 to 300 Ω
3.2
4
4.48
MHz
frequency
Zxtal
crystal oscillator input
fi = 4 MHz
600
1200
−
Ω
impedance (absolute value)
Prescaler
Vi(RF)
RF input level
VCC1 = 4.5 to 5.5 V; see Fig.4; −25
fi = 80 to 150 MHz
−
−
−
3
3
3
dB
dB
dB
VCC1 = 4.5 to 5.5 V; see Fig.4; −28
fi = 150 to 1000 MHz
VCC1 = 4.5 to 5.5 V; see Fig.4; −26
fi = 1000 to 1400 MHz
PNP band switch buffers outputs
|ILO
|
output leakage current
VCC2 = 13.5 V; Vo = 0 V
Isource = 20 mA; note 1
−10
−
−
µA
Vo(sat)
output saturation voltage
-
0.2
0.5
V
NPN open-collector outputs P4, P5, P6 and P7; see note 2
|ILO
|
output leakage current
VCC1 = 5.5 V; Vo = 13.5 V
Isink = 20 mA; note 3
−
−
−
10
0.5
10
µA
V
Vo(sat)
COL
output saturation voltage
0.2
allowed capacitive loading VOL = 13.5 V
on output pins
nF
Input ports P7, P5 and P4; see note 2
VIL
VIH
LOW level input voltage
HIGH level input voltage
−
−
−
1.5
V
V
3
−
AS input (Address Selection)
IIH(AS)
HIGH level input current
VAS = VCC1
−
−
50
µA
1996 Jan 23
9
Philips Semiconductors
Product specification
1.4 GHz I2C-bus controlled synthesizer
TSA5522
SYMBOL
PARAMETER
CONDITIONS
VAS = 0 V
MIN.
−50
TYP.
MAX
UNIT
µA
IIL(AS)
LOW level input current
−
−
SCL and SDA inputs
VIL
VIH
IIH
LOW level input voltage
−
−
−
−
−
−
1.5
5.5
10
10
−
V
HIGH level input voltage
HIGH level input current
3.0
−
V
VIH = 5.5 V; VCC1 = 0 V
IH = 5.5 V; VCC1 = 5.5 V
µA
µA
µA
kHz
V
−
IIL
LOW level input current
input clock frequency
VIL = 0 V; VCC1 = 5.5 V
−10
−
fclk
100
400
SDA output (I2C bus mode)
IILO
Vo
output leakage current
output voltage
VO = 5.5 V
Isink = 3 mA
−
−
−
−
10
µA
µA
0.4
BS output (M/O band selection)
Vo(BS) output voltage
band A; Isource = 20 µA
band B; Isource = 20 µA
band C; Isource = 20 µA
band C; Isource = 50 µA
−
0.25
0.5
V
V
V
V
0.36VCC1 0.4VCC1 0.43VCC1
0.7VCC1
3.1
0.8VCC1 0.9VCC1
−
−
Charge-pump output CP
IICPH HIGH charge pump current CP = 1
(absolute value)
−
−
250
50
−
−
µA
µA
IICPL
LOW charge pump current CP = 0
(absolute value)
Vo(CP)
ILI(off)
output voltage
in-lock; Tamb = +25 °C
−
1.95
1
−
V
off-state leakage current
T2 = 0; T1 = 1
−5
15
nA
Tuning voltage output Vtune
ILO(off)
leakage current when
switched-off
OS = 1; Vtune = 33 V
−
−
−
−
10
µA
V
Vo
output voltage when the
loop is closed
OS = 0; T2 = 0; T1 = 0; T0 = 1; 0.4
RL = 27 k Ω; Vtune = 33 V
32.6
30
Vripple(p-p) acceptable ripple voltage
on VCC1 (peak-to-peak
value)
fripple = 300 Hz to 300 kHz
−
mV
Notes
1. A single PNP band switch buffer is ON.
2. P4, P5 and P7 I/O ports are not available in 16-pin package. In 20-pin package, when a port is active, the collector
voltage must not exceed 6 V.
3. A single NPN open-collector output is ON.
1996 Jan 23
10
Philips Semiconductors
Product specification
1.4 GHz I2C-bus controlled synthesizer
TSA5522
MLD227
12
power
(dBm)
0
12
24
36
48
0
200
400
600
800
1000
1200
1400
1600
f (MHz)
i
Fig.4 Prescaler typical input sensitivity curve.
1996 Jan 23
11
Philips Semiconductors
Product specification
1.4 GHz I2C-bus controlled synthesizer
TSA5522
INTERNAL PIN CONFIGURATION
V
CC1
3 kΩ
V
CC1
XTAL
300 µF
V
CC1
to presscaler
divider
1 kΩ
V
CC1
AS
RF1
V
ref
AS
V
CC1
V
CC1
1 kΩ
RF2
SDA
SCL
V
CC1
V
1 kΩ
CC1
V
CC1
BS
V
V
CC1
CC1
P4
V
EE
V
V
CC1
CC1
TSA5522
P5
P7
V
CC2
V
CC2
n.c.
P2
V
V
CC1
CC1
V
V
CC1
CC1
X4
V
CC2
P6
P1
V
tune
control
V
CC2
V
CC1
down
up
CP
P0
MLD228
Fig.5 Internal pin configuration.
12
1996 Jan 23
Philips Semiconductors
Product specification
1.4 GHz I2C-bus controlled synthesizer
TSA5522
APPLICATION INFORMATION
Tuning amplifier
Crystal oscillator
The crystal oscillator uses a 4 MHz crystal connected in
series with an 18 pF capacitor thereby operating in the
series resonance mode. Connecting the oscillator to the
supply voltage is preferred, but it can, however, also be
connected to ground.
The tuning amplifier is capable of driving the varicap
voltage without an external transistor. The tuning voltage
output must be connected to an external load of 27 kΩ
which is connected to the tuning voltage supply rail.
Figure 6 shows a possible loop filter. The component
values depend on the oscillator characteristics and the
selected reference frequency.
V
tune
27 kΩ
33 V
UHF
39 nF
VHF1
VHF3
12 V
P0
P1
P2
180 nF
CP
22 kΩ
V
V
tune
CC2
P6
SCL
SDA
AS
P6
V
EE
TSA5522T
BS
RF
RF
5 V
SCL
SDA
AS
BS
RF2
RF1
1 nF
1 nF
V
XTAL
CC1
10 nF
MLD229
4 MHz
18 pF
Fig.6 Typical application (SO16).
1996 Jan 23
13
Philips Semiconductors
Product specification
1.4 GHz I2C-bus controlled synthesizer
TSA5522
Flock flag (FL) definition
When the LOCK output is LOW the maximum frequency
deviation (∆f) from stable frequency can be expressed as
K
(C1 + C2)
(C1 × C2)
follows:∆f = ± VCO × I
×
----------------------------
--------------
CP
KO
where:
andbook, halfpage
C2
R
K
vco = oscillator slope Hz/V
C1
ICP = charge-pump current (A)
KO = 4 × 10E6
MBE331
C1, C2 = loop filter capacitors.
In the application:
KVCO = 16 MHz/V (UHF band)
ICP = 250 µA
C1 = 180 nF, C2 = 39 nF
∆f = ±31.2 kHz.
Fig.7 Loop filter.
Table 9 LOCK output / FL flag setting
DESCRIPTION
CONDITION
MIN.
MAX.
1152
2304
UNIT
µs
Time span between actual phase lock and LOCK bit is LOW RSA = 1; RSB = 1
1024
2048
1280
0
(or FL flag = 1)
RSA = 1; RSB = 1
µs
µs
µs
RSB = 0
1440
300
Time span between the loop losing lock and LOCK bit is
HIGH or (FL flag = 0)
1996 Jan 23
14
Philips Semiconductors
Product specification
1.4 GHz I2C-bus controlled synthesizer
TSA5522
PACKAGE OUTLINES
SO16: plastic small outline package; 16 leads; body width 3.9 mm
SOT109-1
D
E
A
X
c
y
H
v
M
A
E
Z
16
9
Q
A
2
A
(A )
3
A
1
pin 1 index
θ
L
p
L
1
8
e
w
M
detail X
b
p
0
2.5
scale
5 mm
DIMENSIONS (inch dimensions are derived from the original mm dimensions)
A
(1)
(1)
(1)
UNIT
A
A
A
b
c
D
E
e
H
L
L
p
Q
v
w
y
Z
θ
1
2
3
p
E
max.
0.25
0.10
1.45
1.25
0.49
0.36
0.25
0.19
10.0
9.8
4.0
3.8
6.2
5.8
1.0
0.4
0.7
0.6
0.7
0.3
mm
1.27
0.050
1.05
0.041
1.75
0.25
0.01
0.25
0.01
0.25
0.1
8o
0o
0.0098 0.057
0.0039 0.049
0.019 0.0098 0.39
0.014 0.0075 0.38
0.16
0.15
0.24
0.23
0.039 0.028
0.016 0.020
0.028
0.012
inches
0.069
0.01 0.004
Note
1. Plastic or metal protrusions of 0.15 mm maximum per side are not included.
REFERENCES
OUTLINE
EUROPEAN
PROJECTION
ISSUE DATE
VERSION
IEC
JEDEC
EIAJ
91-08-13
95-01-23
SOT109-1
076E07S
MS-012AC
1996 Jan 23
15
Philips Semiconductors
Product specification
1.4 GHz I2C-bus controlled synthesizer
TSA5522
SSOP20: plastic shrink small outline package; 20 leads; body width 4.4 mm
SOT266-1
D
E
A
X
c
y
H
v
M
A
E
Z
11
20
Q
A
2
A
(A )
3
A
1
pin 1 index
θ
L
p
L
1
10
detail X
w
M
b
p
e
0
2.5
5 mm
scale
DIMENSIONS (mm are the original dimensions)
A
(1)
(1)
(1)
UNIT
A
A
A
b
c
D
E
e
H
L
L
p
Q
v
w
y
Z
θ
1
2
3
p
E
max.
10o
0o
0.15
0
1.4
1.2
0.32
0.20
0.20
0.13
6.6
6.4
4.5
4.3
6.6
6.2
0.75
0.45
0.65
0.45
0.48
0.18
mm
1.5
0.65
1.0
0.2
0.25
0.13
0.1
Note
1. Plastic or metal protrusions of 0.20 mm maximum per side are not included.
REFERENCES
OUTLINE
EUROPEAN
PROJECTION
ISSUE DATE
VERSION
IEC
JEDEC
EIAJ
90-04-05
95-02-25
SOT266-1
1996 Jan 23
16
Philips Semiconductors
Product specification
1.4 GHz I2C-bus controlled synthesizer
TSA5522
SOLDERING
Introduction
SSOP
Wave soldering is not recommended for SSOP packages.
This is because of the likelihood of solder bridging due to
closely-spaced leads and the possibility of incomplete
solder penetration in multi-lead devices.
There is no soldering method that is ideal for all IC
packages. Wave soldering is often preferred when
through-hole and surface mounted components are mixed
on one printed-circuit board. However, wave soldering is
not always suitable for surface mounted ICs, or for
printed-circuits with high population densities. In these
situations reflow soldering is often used.
If wave soldering cannot be avoided, the following
conditions must be observed:
• A double-wave (a turbulent wave with high upward
pressure followed by a smooth laminar wave)
soldering technique should be used.
This text gives a very brief insight to a complex technology.
A more in-depth account of soldering ICs can be found in
our “IC Package Databook” (order code 9398 652 90011).
• The longitudinal axis of the package footprint must
be parallel to the solder flow and must incorporate
solder thieves at the downstream end.
Reflow soldering
Even with these conditions, only consider wave
soldering SSOP packages that have a body width of
4.4 mm, that is SSOP16 (SOT369-1) or
SSOP20 (SOT266-1).
Reflow soldering techniques are suitable for all SO and
SSOP packages.
Reflow soldering requires solder paste (a suspension of
fine solder particles, flux and binding agent) to be applied
to the printed-circuit board by screen printing, stencilling or
pressure-syringe dispensing before package placement.
METHOD (SO AND SSOP)
During placement and before soldering, the package must
be fixed with a droplet of adhesive. The adhesive can be
applied by screen printing, pin transfer or syringe
dispensing. The package can be soldered after the
adhesive is cured.
Several techniques exist for reflowing; for example,
thermal conduction by heated belt. Dwell times vary
between 50 and 300 seconds depending on heating
method. Typical reflow temperatures range from
215 to 250 °C.
Maximum permissible solder temperature is 260 °C, and
maximum duration of package immersion in solder is
10 seconds, if cooled to less than 150 °C within
Preheating is necessary to dry the paste and evaporate
the binding agent. Preheating duration: 45 minutes at
45 °C.
6 seconds. Typical dwell time is 4 seconds at 250 °C.
A mildly-activated flux will eliminate the need for removal
of corrosive residues in most applications.
Wave soldering
SO
Repairing soldered joints
Wave soldering techniques can be used for all SO
packages if the following conditions are observed:
Fix the component by first soldering two diagonally-
opposite end leads. Use only a low voltage soldering iron
(less than 24 V) applied to the flat part of the lead. Contact
time must be limited to 10 seconds at up to 300 °C. When
using a dedicated tool, all other leads can be soldered in
one operation within 2 to 5 seconds between
270 and 320 °C.
• A double-wave (a turbulent wave with high upward
pressure followed by a smooth laminar wave) soldering
technique should be used.
• The longitudinal axis of the package footprint must be
parallel to the solder flow.
• The package footprint must incorporate solder thieves at
the downstream end.
1996 Jan 23
17
Philips Semiconductors
Product specification
1.4 GHz I2C-bus controlled synthesizer
TSA5522
DEFINITIONS
Data sheet status
Objective specification
Preliminary specification
Product specification
This data sheet contains target or goal specifications for product development.
This data sheet contains preliminary data; supplementary data may be published later.
This data sheet contains final product specifications.
Limiting values
Limiting values given are in accordance with the Absolute Maximum Rating System (IEC 134). Stress above one or
more of the limiting values may cause permanent damage to the device. These are stress ratings only and operation
of the device at these or at any other conditions above those given in the Characteristics sections of the specification
is not implied. Exposure to limiting values for extended periods may affect device reliability.
Application information
Where application information is given, it is advisory and does not form part of the specification.
LIFE SUPPORT APPLICATIONS
These products are not designed for use in life support appliances, devices, or systems where malfunction of these
products can reasonably be expected to result in personal injury. Philips customers using or selling these products for
use in such applications do so at their own risk and agree to fully indemnify Philips for any damages resulting from such
improper use or sale.
PURCHASE OF PHILIPS I2C COMPONENTS
Purchase of Philips I2C components conveys a license under the Philips’ I2C patent to use the
components in the I2C system provided the system conforms to the I2C specification defined by
Philips. This specification can be ordered using the code 9398 393 40011.
1996 Jan 23
18
Philips Semiconductors
Product specification
1.4 GHz I2C-bus controlled synthesizer
TSA5522
NOTES
1996 Jan 23
19
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SCDS47
© Philips Electronics N.V. 1996
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