TZA1000TD-T [NXP]
IC 1 CHANNEL READ WRITE AMPLIFIER CIRCUIT, PDSO24, 7.50 MM, PLASTIC, SOT-137-1, SOP-24, Drive Electronics;
| 型号： | TZA1000TD-T |
| 厂家： | 
NXP |
| 描述： | IC 1 CHANNEL READ WRITE AMPLIFIER CIRCUIT, PDSO24, 7.50 MM, PLASTIC, SOT-137-1, SOP-24, Drive Electronics 放大器 驱动 光电二极管 接口集成电路 |
| 文件： | 总26页 (文件大小：203K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
INTEGRATED CIRCUITS
DATA SHEET
TZA1000
QIC read-write amplifier
1998 Mar 17
Preliminary specification
Supersedes data of 1998 Mar 11
File under Integrated Circuits, IC01
Philips Semiconductors
Preliminary specification
QIC read-write amplifier
TZA1000
• Input for fast reader/writer (track height servo) signal
FEATURES
selection
• 3-wire serial interface for programming
• On-chip Digital-to-Analog Converters (DAC) for:
– MR (Magneto Resistive) sense bias current
– MR DC bias current
• Power fail detection on both 5 and 12 V lines (status can
be read from the read register)
• Write unsafe detection
• Provides an accurate reference voltage (for AD
– Write current
conversion)
• Low noise differential input stage: typically 0.65 nV/√Hz
(Zi = 0 Ω)
• Very simple interconnection with the SZA1000 QIC
digital equalizer
• Magnetic feedback circuit to handle large output signals
• MR DC bias current circuit
• +5 V ±10% and +12 V ±10% supply voltages
• Low power standby, active and test modes.
• Very fast write current rise and fall times with near
rail-to-rail voltage swing
RELATED DOCUMENTS
• Maximum write current of 100 mA: ready for high
coercivity tape
• SZA1000 QIC digital equalizer data sheet
• Application notes for TZA1000 and SZA1000.
• Low noise read amplifier for reading track height servo
signals with the write coil
Both are available from Philips Semiconductors.
• Very few external components required
• On board registers for easy format or bit rate selection
• Fast read-after-write recovery time
GENERAL DESCRIPTION
The TZA1000 is a single-chip read-write amplifier for
single-channel QIC (Quarter Inch Cartridge) systems with
MR heads. It can be used with both SIG (Sensor in Gap)-
and yoke-type MR heads and is designed to be used in
conjunction with the Philips SZA1000 digital equalizer IC
(although it can also function as a stand alone unit). This
combination is flexible enough to be used with all popular
tape backup formats including QIC 80, QIC 3010,
QIC 3020, QIC 3080, QIC 5010, Travan 1, Travan 2,
Travan 3 and Travan 4 and to be forward compatible with
their single channel successors.
• Test circuit for yoke-type heads
• Switchable differentiator for yoke-type heads, with
programmable cut-off frequencies
• Anti-aliasing low-pass filter, with programmable cut-off
frequencies
• AGC (Automatic Gain Control) options: internally
(digitally) controlled, externally controlled or fixed gain
• Hold input for fast AGC freeze
QUICK REFERENCE DATA
SYMBOL
PARAMETER
CONDITIONS
MIN.
4.5
TYP.
MAX.
5.5
UNIT
VDD1
VDD2
VDD3
read circuit supply voltage
FB and write circuit supply voltage
sense current circuit supply voltage
read/FB and write circuit supply current
Read mode
5
5
V
V
V
4.5
5.5
10.8
12
13.2
I
DD1; IDD2
−
−
69
105
16.2
0.65
−
−
mA
Write mode
Iwrite = 30 mA
−
mA
IDD3
Vn(i)(eq)
fclk
sense current circuit supply current
equivalent input noise voltage
clock frequency
Isense = 16 mA 15.0
19.0
0.8
24
70
125
−
mA
Zsource = 0 Ω
−
−
0
0
−
nV/√Hz
MHz
°C
Tamb
Tj
recommended operating temperature
recommended junction temperature
−
−
°C
Rth(j-a)
thermal resistance from junction to ambient in free air
66
K/W
1998 Mar 17
2
Philips Semiconductors
Preliminary specification
QIC read-write amplifier
TZA1000
ORDERING INFORMATION
TYPE
PACKAGE
NUMBER
NAME
DESCRIPTION
VERSION
TZA1000
SO24
plastic small outline package; 24 leads; body width 7.5 mm
SOT137-1
1998 Mar 17
3
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ahdnbok,uflapegwidt
V
5
9
8
DD3
SENSE
CURRENT
SOURCE
0 to 30 mA
V
V
5 V
5 V
12 V
DD1
DD2
DAC
(I)
7+1-bit
ISENSE
17
SIG/
YOKE
6
7
19
18
INA
VARIABLE
GAIN
10 to 25 dB
4 to 19 dB
OUTA
OUTB
PREAMP
22 dB
0 dB
HPF
1 to 10 MHz
LPF
1 to 10 MHz
MR
HEAD
INB
4/34/40 dB
13
HOLD
−10 dB
−4 dB
AGC
CONTROL
CIRCUIT
LEVEL
DETECTOR
INTERNAL
REFERENCE
VOLTAGES
13 dB
20
15
BANDGAP
REF
24
23
BIASA
BIASB
V
ref
TEST
GEN
BIAS
(YOKE)
BIAS
+ FB
DAC
(V)
CLK
5-bit
12
10
11
SDIO
SCLK
SDEN
CONTROL
CIRCUIT
SERVO
PREAMP
TZA1000
V
POWER
FAIL
DETECTOR
DD3
22
21
WRITE
UNSAFE
DETECTOR
1
3
WX
WY
RESET
WRITE
CIRCUIT
10 to 100 mA
V
DD1
WRITER
DAC
(I)
7-bit
CURRENT
REF
I
ref
TOGGLE
WDI to WD
14
4
2
16
MGG660
WD
WGATE
V
V
SS2
SS1
Fig.1 Block diagram.
Philips Semiconductors
Preliminary specification
QIC read-write amplifier
TZA1000
PINNING
SYMBOL PIN
DESCRIPTION
TYPE(1)
WX
1
2
3
4
5
6
7
8
9
write current to head
large signal ground
write current to head
write data
O
P
O
I(2)
P
I
VSS1
WY
WD
handbook, halfpage
WX
BIASA
24
1
2
VDD1
INA
large signal +5 V
V
V
BIASB
23
22
21
20
read signal from MR
read signal from MR
sense current for MR
SS1
WY
INB
I
3
RESET
ISENSE
VDD3
O
P
I
WD
4
ref
+12 V for sense current
supply
V
5
DD1
INA
ref
19 OUTA
6
SCLK
SDEN
SDIO
HOLD
WGATE
CLK
10 serial interface clock
11 serial interface enable
12 serial interface data I/O
13 hold AGC; active LOW
14 write gate; active LOW
15 clock input
I(2)
I(2)
I/O
I(2)
I(2)
I(2)
P
TZA1000
INB
OUTB
18
17
16
15
14
13
7
V
ISENSE
8
DD2
V
V
9
DD3
SS2
SCLK
SDEN
CLK
10
11
WGATE
HOLD
VSS2
16 small signal ground
17 small signal +5 V
SDIO 12
VDD2
P
MGG659
OUTB
OUTA
Vref
18 output to equalizer
19 output to equalizer
20 2 V reference output
21 current reference resistor
O
O
O
Iref
note 3
O
RESET
22 reset for microcontroller;
active LOW
BIASB
BIASA
23 bias current for yoke heads O
24 bias current for yoke heads O
Fig.2 Pin configuration.
Notes
1. Pin type abbreviations: O = output, I = input,
P = power supply.
2. Digital inputs: LOW: <0.3VDD ; HIGH: >0.7VDD
.
3. Use only for connecting current reference resistor.
See Chapter “Equivalent pin circuits” for the I/O
configuration of the analog pins.
1998 Mar 17
5
Philips Semiconductors
Preliminary specification
QIC read-write amplifier
TZA1000
The AGC will maintain outputs OUTA and OUTB at
FUNCTIONAL DESCRIPTION
The preamplifier
1.1 V (p-p). Additional level adjustment points are
provided by the 34 or 40 dB preamplifier gain switch (see
Table 11) and the −10 or −4 dB bias output attenuation
switch (see Table 9).
The gain and dynamic range of the symmetrical low noise
preamplifier can be varied to accommodate a wide
variation in input signal amplitude (see Table 11).
The 40 dB and 34 dB gain settings are provided for normal
use. The 40 dB setting offers the lowest noise figure. The
4 dB gain setting is intended for IC testing only.
High-pass filter
The HPF (High-Pass Filter) is used to differentiate
yoke-type head signals. It is followed by an additional gain
stage (21 dB). The HPF cut-off frequency is coupled to the
cut-off frequency of the LPF (Low-Pass Filter), and is
selectable in 4 steps: 1, 2, 4 and 10 MHz (see Table 2).
The HPF can be bypassed for SIG heads (see Table 8).
The servo preamplifier
This low noise preamplifier can be used for reading
signals, such as QIC 3095 (Travan 4) servo signals, via
the recording head write coil. Servo mode is selected
either by resetting bits AI0 and AI1 in the control register
(see Table 9) or by means of the HOLD pin (the HSM
control bit must be set when HOLD goes LOW; see
Table 7). When servo mode is selected, the maximum
total gain is set automatically regardless of, and without
overwriting, gain settings. Fast switch-over from read
mode to servo mode can thus be achieved without having
to alter register values.
Low-pass filter
The second order low-pass filter is used to attenuate high
frequency noise above the signal bandwidth, mainly to
provide anti-aliasing filtering for the A/D converter in the
digital equalizer. The cut-off frequency of the LPF is
selectable in 4 steps: 1, 2, 4 and 10 MHz (see Table 2).
Sense current circuit
The sense current circuit is a programmable current
source, operating from the 12 V supply (VDD3). It can be
programmed to supply a current between 0 and 15 mA,
with 7-bit resolution. The current range can be doubled,
then ranging from 0 to 30 mA, by setting the SDB bit in the
control register (see Table 15). The sense current circuit
can be disabled by resetting the ENS bit (see Table 4).
Variable gain stage and AGC
The input to the variable gain stage can be switched to the
preamplifier output, to the output of the bias/FB (Feed
Back) circuit, or to the servo preamplifier output. When
using magnetic feedback, the bias/FB circuit output should
be selected (see Table 9).
The AGC range is 15 dB. The gain is programmable in
1 dB steps (see Table 12). If the output signal is too small,
a digital control circuit will increase the gain from minimum
to maximum in approximately 10 ms. If the output signal is
too large, the gain will be reduced from maximum to
minimum in approximately 0.2 ms. These values assume
a 24 MHz clock frequency. The upper limit of the gain
control range can be extended by 6 dB by setting the
G6DB bit in the control register via the serial interface (see
Table 13).
This is the only circuit on the IC that uses the 12 V supply.
The output must be decoupled with a low impedance
capacitor (10 µF recommended) to reduce noise coupling
into the head.
For the current source circuit to operate correctly, the
voltage difference between VDD3 (pin 9) and ISENSE
(pin 8) must be at least 1.6 V.
The AGC is frozen while the HOLD input is LOW, the
TZA1000 is writing, or the IC is in servo mode.
The AGC can be operated internally, running on the CLK
clock signal on pin 15 (HOLD HIGH and GFXD LOW; see
Table 12), or externally by means of a software algorithm
(GFXD HIGH). When operated externally, either the DN bit
in the status read register (see Table 17) or the level
measurement in the digital equalizer IC (SZA1000) can be
used as input to the algorithm.
1998 Mar 17
6
Philips Semiconductors
Preliminary specification
QIC read-write amplifier
TZA1000
Bias and magnetic feedback circuit
Write circuit
This circuit can be used to generate AC and DC bias
currents (for a yoke-type MR head, for instance).
The DC bias output voltage is programmable
between 0 and 1.4 V, with 5-bit resolution (see Table 3).
The DC current generated is this voltage divided by the
total bias resistance (head coil + total series resistance).
The write circuit is a differential current source that can
generate a near rail-to-rail output voltage to get the
shortest current transition time. Writing is enabled when
WGATE is LOW. The polarity of the current depends on
the WD input pin. The WDM bit in the control register
determines the write signal mode: WD (Non-Return to
Zero) or WDI (Return to Zero; see Table 14). When WDI
mode is selected, the polarity of the write current is
reversed at every falling edge of the WD input. When WD
mode is selected, the polarity of the write current is
reversed when the polarity of WD changes. The write
current is programmable between 0 and 125 mA, with
7-bit resolution (see Table 14).
The AC signal input to the circuit can be switched to the
preamplifier output (see Table 10). In this way, magnetic
feedback inside the head can be achieved. This limits
head distortion, and prevents head saturation from large
tape signals, like QIC 80 recordings.
The open loop gain of the feedback loop depends on head
sensitivity, the selected sense current (see Table 15), and
the selected preamplifier gain (see Table 11). The values
of the external resistors connected in series with the bias
conductor can be used to set the gain. For loop stability at
high frequencies, the bandwidth of the magnetic feedback
amplifier is limited to 5 MHz.
The IC is specified for a write current of up to 100 mA.
Overshoot caused by an inductive load can be minimized
by means of a single external resister local to the IC.
Write unsafe detector
The write unsafe detector will detect an open write coil, or
one shorted to ground. The circuit is enabled only while the
TZA1000 is writing. A resistance to GND or VDD of less
than 10 Ω, or a series resistance greater that about 300 Ω,
will be detected (these values are write-current
In closed loop mode, the effective cut-off frequency for the
playback signals will increase with the feedback factor. For
this reason the read signal can be taken from the output of
the bias circuit.
To prevent loop instability at low frequencies, the
preamplifier input capacitors should be chosen such that
the cut-off frequency at that point is well above, or well
below, the internal cut-off frequency of the AC coupling
between the preamplifier and the bias circuit (input
impedance of the preamplifier is typically 2 kΩ).
dependant). If an error occurs, the WUS status bit is set.
This bit can be read via the serial interface. The WUS bit
will remain set until the status byte is read.
Power fail detector
The power fail detector will detect a low voltage on the 5 V
(VDD1) or 12 V (VDD3) supply lines. The thresholds are
3.75 V for VDD1 and 9 V for VDD3. A power failure is
detected if the voltage is below the threshold for 1 µs or
longer. If a 5 V power failure occurs, the status bit PF5 is
set. If a 12 V power failure occurs, the status bit PF12 is
set. These bits can be read via the serial interface, and will
remain HIGH until the status byte is read.
The maximum (peak AC) current that the bias circuit can
deliver can be adjusted to achieve an optimum balance
between required current range and power consumption
(see Table 3). The AC circuit is switched off when the
TZA1000 is writing, and the maximum current is switched
to 10 mA. This limits power dissipation during writing.
Test generator
When a 5 V power failure occurs, the RESET output goes
LOW and the write circuit is disabled (in addition to PF5
being set). The RESET output has an internal 18 kΩ pull
down resistor to guarantee a LOW level at the output even
when a power failure occurs. During normal operation, the
RESET pin should not be held LOW by an external circuit,
since this will switch the IC into test mode.
This circuit generates a test signal with a frequency 1⁄16
that of the signal at the CLK input (pin 15). By switching the
AC input of the bias circuit to the internal test generator
(see Table 10), the read channel can be tested.
The differential output value is typically 100 mV (p-p).
This facility can also be used to adjust the DC bias voltage
while monitoring the signal at the read element in the head.
The optimum DC bias level setting is just before the output
from the read head reaches its peak.
1998 Mar 17
7
Philips Semiconductors
Preliminary specification
QIC read-write amplifier
TZA1000
DACs
Clock handling
There are 3 internal DACs:
The TZA1000 has 2 clock inputs:
1. The Sense DAC: current DAC; 7-bit resolution
2. The Write DAC: current DAC; 7-bit resolution
3. The Bias DAC: voltage DAC; 5-bit resolution.
CLK: the general clock input, pin 15
SCLK: the serial interface clock input, pin 10.
CLK is used for status register read and write cycle timing
and for operating the internal AGC. When the AGC is not
being used and serial communications are not active, CLK
may be switched off. This can help reduce crosstalk on the
printed circuit board.
The Sense and Write DAC current settings are a function
of the reference current Iref (at the Iref pin). Iref is multiplied
by a 7-bit factor: S0 to S6 for the sense DAC, W0 to W6 for
the write DAC (see Tables 14 and 15). If the resistance
between Iref and GND is increased (or decreased), the
DAC output currents will be decreased (or increased) by
the same factor. In this way, the DAC output current
ranges can be adjusted.
When accessing the status register, the CLK frequency
must be at least 16 × SCLK frequency. It is recommended
that the 24 MHz clock supplied by the SZA1000 be used
directly.
The current values specified, and the equations used to
calculate Sense and Write currents (see Tables 14
and 15), are for a 430 Ω resistance between Iref and GND.
This resistance can be varied between 250 Ω and 1 kΩ,
giving a ±2 × DAC modification range. For reasons of
noise and stability, the voltage at the Iref pin should not be
used in any other part of the circuit.
Serial interface
The 3 wire serial interface recognizes 8-bit addresses and
8-bit data. To read data from the status register, hex
address FF must be transmitted. The IC will then respond
with the contents of the 8-bit status register.
1998 Mar 17
8
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g
WRITE SETTINGS
SDEN
SCLK
SDIO
3-STATE
A7 A6 A5 A4 A3 A2 A1 A0 D7 D6 D5 D4 D3 D2 D1 D0
READ STATUS
SDEN
SCLK
SDIO
3-STATE
A7 A6 A5 A4 A3 A2 A1 A0 D7 D6 D5 D4 D3 D2 D1 D0
ADDRESS AND DATA FROM MICROCONTROLLER
D7 D6 D5 D4 D3 D2 D1 D0
DATA FROM IC
MGG661
Fig.3 Timing diagrams.
Philips Semiconductors
Preliminary specification
QIC read-write amplifier
TZA1000
CONTROL REGISTER
The control register contains six 8-bit entries configured as shown in Table 1.
Table 1 Control register settings
ADDRESS
D7
−
D6
FC1
DIFF
−
D5
FC0
AI1
G6DB
−
D4
ENFB1
AI0
D3
ENFB0
FBI1
G3
D2
ENS
FBI0
G2
D1
ENRD
PG1
G1
D0
ENREF
PG0
G0
0
1
2
3
4
5
HSM
−
GFXD
B4
−
−
B3
B2
B1
B0
WDM
SDB
W6
S6
W5
S5
W4
W3
W2
S2
W1
W0
S4
S3
S1
S0
Control bits
Control bit functions are detailed in Tables 2 to 17.
Table 2 HPF and LPF cut-off frequency
FC1
FC0
FREQUENCY
0
0
1
1
0
1
0
1
1 MHz
2 MHz
4 MHz
10 MHz
Table 3 Bias current settings; note 1
ENFB1
ENFB0
BIAS CIRCUIT
Ibias(min)
Ibias(max)
0
0
1
1
0
1
0
1
off
on
on
on
0
0
−10 mA
0
+10 mA
+10 mA
+20 mA
−10 mA
Note
1. Control bits B0 to B4 make up a 5-bit number between 0 and 31. The DC bias voltage between BIASA and BIASB
(pins 23 and 24) is B × 45 mV. BIASA is positive with respect to BIASB.
Table 4 Sense current circuit
Table 6 Internal reference voltages
ENS
SENSE CURRENT CIRCUIT
ENREF
INTERNAL REF. VOLTAGES
0
1
disabled
enabled
0
1
disabled
enabled
Table 5 Read circuits (excluding preamplifiers)
Table 7 HOLD pin function
ENRD
READ CIRCUITS
HSM
FUNCTION
0
1
disabled
enabled
0
AGC hold on or off
1
select servo or data preamplifier
1998 Mar 17
10
Philips Semiconductors
Preliminary specification
QIC read-write amplifier
TZA1000
Table 8 HPF circuit
DIFF
HPF CIRCUIT
0
1
bypassed
on
Table 9 Variable gain circuit input select
HSM
HOLD
AI1
0
AI0
0
INPUT
0
0
0
0
1
1
1
1
1
X
X
X
X
1
1
1
1
0
servo preamplifier
0
1
preamplifier
1
0
bias output −10 dB
bias output −4 dB
servo preamplifier
preamplifier
1
1
0
0
0
1
1
0
bias output −10 dB
bias output −4 dB
servo preamplifier
1
1
X
X
Table 10 Bias circuit input
Table 11 Preamplifier gain
FBI1
FBI0
INPUT
PG1
PG0
GAIN
0
0
1
1
0
1
0
1
no signal
preamplifier
test generator
preamplifier
0
0
1
1
0
1
0
1
0
34 dB
4 dB
40 dB
Table 12 AGC setting
HSM
HOLD
GFXD
AGC
0
0
1
1
X
1
0
1
0
X
0
0
0
0
1
on
frozen at last value
on
no AGC at servo mode: maximum gain
off, gain set by G0 to G3; note 1
Note
1. Control bits G0 to G3 make up a 4-bit number used to program the gain in 1 dB steps (from 4 to 19 dB if G6DB is 0,
from 10 to 25 dB if G6DB is 1; see Table 13).
Table 13 Variable gain circuit range select
G6DB
RANGE
4 to 19 dB
10 to 25 dB
0
1
1998 Mar 17
11
Philips Semiconductors
Preliminary specification
QIC read-write amplifier
TZA1000
Table 14 Write mode select; note 1
WDM
EXPECTED INPUT SIGNAL
FUNCTION
0
1
WDI
WD
on
bypassed
Note
1. Control bits W0 to W6 make up a 7-bit number between 0 and 127. Write current is
125 × (W + 1)
mA (Rref = 430 Ω).
-------------------------------------
128
Table 15 Sense current range select; note 1
SDB
CURRENT
0
1
0 to 15 mA
0 to 30 mA
Note
15 × (S + 1)
1. Control bits S0 to S6 make up a 7-bit number between 0 and 127. Sense current is
mA when SDB = 0
--------------------------------
128
30 × (S + 1)
and
mA when SDB = 1 (Rref = 430 Ω).
--------------------------------
128
Status
A status byte, located at address FF, contains the following status bits:
Table 16 Status byte settings
ADDRESS
D7
D6
D5
D4
D3
D2
PF5(3)
D1
WUS(4)
D0
FF
AG3(1)
AG2(1)
AG1(1)
AG0(1)
DN(2)
PF12(5)
Notes
1. Actual gain. Allows the gain to be determined while the AGC is on.
2. This bit can be used for microcontroller gain control, with the AGC off (see Table 17).
3. Power failure detected on the +5 V supply (VDD1).
4. Write unsafe detected: head open or short circuited.
5. Power failure detected on the +12 V supply (VDD3).
Table 17 Sense current range select.
DN
GAIN
can be increased
can be decreased
0
1
1998 Mar 17
12
Philips Semiconductors
Preliminary specification
QIC read-write amplifier
TZA1000
LIMITING VALUES
In accordance with the Absolute Maximum Rating System (IEC 134).
SYMBOL
PARAMETER
read circuit supply voltage
CONDITIONS
MIN.
−0.3
MAX.
+5.5
UNIT
VDD1
VDD2
VDD3
IDD1
V
V
V
FB and write circuit supply voltage
sense current circuit supply voltage
read circuit supply current
−0.3
−0.3
−
+5.5
+13.2
150
mA
mA
mA
mA
mW
°C
IDD2
FB and write circuit supply current
sense current circuit supply current
input current on remaining pins
maximum total power dissipation
ambient temperature
−
35
IDD3
−
35
II(n)
−10
−
+10
Ptot
1000
+70
Tamb
Tj
0
junction temperature
note 1
0
+135
+150
+1000
+200
°C
Tstg
storage temperature
−50
−1000
−200
°C
VES(HB)
VES(MM)
electrostatic handling: human body model
electrostatic handling: machine model
note 2
note 3
V
V
Notes
1. Maximum permissible ambient temperature is dependent on internal dissipation. Tj is the discriminating factor.
Tj = (Rth(j-a) × Ptot) + Tamb, where Ptot is the total dissipation in the package.
2. Equivalent to discharging a 100 pF capacitor through a 1.5 kΩ series resistor.
3. Equivalent to discharging a 200 pF capacitor through a 25 Ω series resistor and a 2.5 µH series inductance.
THERMAL CHARACTERISTICS
SYMBOL
PARAMETER
VALUE
UNIT
Rth(j-a)
thermal resistance from junction to ambient in free air
66
K/W
QUALITY SPECIFICATION
In accordance with “SNW-FQ-611E”.
1998 Mar 17
13
Philips Semiconductors
Preliminary specification
QIC read-write amplifier
TZA1000
CHARACTERISTICS
VDD1 = VDD2 = 5 V ±5%; VDD3 = 12 V ±5%; Tamb = 25 °C ±5%; unless otherwise specified.
SYMBOL
VDD1
PARAMETER
CONDITIONS
MIN.
4.5
TYP.
5.0
MAX.
5.5
UNIT
read circuit supply voltage
V
VDD2
VDD3
IDD1
FB and write circuit supply
voltage
4.5
5.0
5.5
V
sense current circuit supply
voltage
10.8
12.0
13.2
V
read circuit supply current
Rd
Wr
I
bias = −10 to +10 mA
−
−
31
70
−
−
mA
mA
Iwrite = 30 mA
IDD2
FB and write circuit supply
current
Rd
Wr
max gain
−
38
−
mA
mA
mA
−
36
−
IDD3
sense current circuit supply
current
Isense = 16 mA
15.0
16.2
19.0
Vref
I20
reference voltage
current on pin 20 (Vref)
source
pin 20; IO = 0 to 3 mA
1.9
2.0
2.1
V
−
−
3.0
50
1.4
5
mA
µA
V
sink
−
−
V21
Iref
voltage at pin 21 (Iref)
reference current (pin 21)
1.2
1
1.3
3
mA
Read section
Gv(pa)
preamplifier voltage gain
PG1 = 1; PG0 = 1
PG1 = 0; PG0 = 1
PG1 = 1; PG0 = 0
37
32
3
38.6
32.7
4.1
41
34
6
dB
dB
dB
dB
Gv(agc)
AGC amplifier voltage gain
G6DB = 1; G = 15;
note 1
23
24.4
26
∆Gv(agc)
AGC voltage gain control
range
note 2
−
22
−
dB
Gv(yoke)
yoke amplifier voltage gain
19
2
21
5
23
10
−
dB
fcoupling
−3 dB AC coupling frequency input to output
kHz
f−3dB(cutoff)(HPF)
HPF −3 dB cut-off frequency
FC1 = FC1 = 0
FC1 = 0; FC1 = 1
FC1 = 1; FC1 = 0
FC1 =FC1 = 1
−
−
−
−
−
−
−
−
−
1.0
2.0
4.7
10
1.1
2
MHz
MHz
MHz
MHz
MHz
MHz
MHz
MHz
nV/√Hz
−
−
−
f−3dB(cutoff)(LPF)
LPF −3 dB cut-off frequency
FC1 = FC1 = 0
FC1 = 0; FC1 = 1
FC1 = 1; FC1 = 0
FC1 =FC1 = 1
−
−
4.3
11
−
−
Vn(i)(eq)(preamp)
equivalent input noise voltage: Zsource = 0 Ω
0.65
0.8
preamplifier
1998 Mar 17
14
Philips Semiconductors
Preliminary specification
QIC read-write amplifier
TZA1000
SYMBOL
PARAMETER
input impedance
CONDITIONS
MIN.
TYP.
1.84
MAX.
UNIT
kΩ
Zi
1
4
VI(6,7)
THD
DC input voltage; pins 6 and 7
total harmonic distortion
1.2
1.3
1.4
V
at 34 and 40 dB gain
settings; Vo(p-p) = 1 V
−
−
−40
dB
Gv(servo)
servo preamplifier voltage gain WX-WY to output
62
66
70
dB
Vn(i)(eq)(servo)
equivalent input noise voltage: Zsource = 0 Ω
−
1.8
2.8
nV/√Hz
servo pre-amp
VI(1,3))
Isense
DC input voltage pins 1 and 3
2.4
2.5
2.6
V
sense current
Rref = 430 Ω; S = 64;
14.6
15.2
15.8
mA
note 3
Isense(max)
maximum sense current
all conditions; note 4
33
−
−
−
mA
V
∆VVDD3-ISENSE
voltage difference between
VDD3 and ISENSE
(pins 9 and 8)
1.6
13.2
RESDAC(SENSE) sense DAC resolution
−
7
−
−
bits
Zo(sense)
output impedance of sense
current source
f = 1 kHz;
o(sen) = 16 mA
10
−
kΩ
I
Gv(FB)
B(-3dB)
FB amplifier voltage gain
11.5
13
5
14.5
dB
−3 dB bandwidth of FB
−
−
MHz
amplifier
fcoupling(FBamp)
Ibias
−3 dB AC coupling of FB
amplifier
−
3
−
kHz
bias current amplitude
(peak-to-peak)
ENFB1 = 0; ENFB0 = 1 −10
−
+10
+9
mA
mA
mA
V
ENFB1 = 1; ENFB0 = 0 0
−
ENFB1 = ENFB0 = 1
−10
−
+20
2.0
VO(23,24)
DC voltage level of FB outputs B = 0; see Table 3
(pins 23 and 24)
1.6
1.8
∆VBIASA-BIASB
voltage difference between
BIASA and BIASB
B = 31; see Table 3;
bias load 88 Ω
1.4
1.52
1.6
V
(pins 23 and 24) at maximum
DC bias voltage
RESDAC(BIAS)
VO(18,19)
bias DAC resolution
−
5
−
bits
V
read amplifier DC output
voltage (pins 18 and 19)
2.4
2.5
2.6
∆VOO(18,19)
read amplifier DC offset
voltage (voltage change at
pins 18 and 19)
−
−
−
−
100
0.5
mV
V
Vo(rms)(18,19)
output voltage (RMS value;
pins 18 and 19)
Io
guaranteed output current
1.5
−
−
mA
V
VO(AGCL)
lower AGC detection voltage
level at OUTB
2.15
2.2
2.25
VO(AGCH)
upper AGC detection voltage
level at OUTB
2.75
2.8
2.85
V
1998 Mar 17
15
Philips Semiconductors
Preliminary specification
QIC read-write amplifier
TZA1000
SYMBOL
Vhys(AGC)
PARAMETER
CONDITIONS
MIN.
TYP.
75
MAX.
85
UNIT
mV
hysteresis in AGC detection
level
65
BAGC
fclk
AGC bandwidth
operational clock
−
1.5
24
−
MHz
MHz
note 5
0
24
Write section
Iwrite
write current
Rhead = 10 Ω;
ref = 430Ω;
27.3
28.8
30.3
mA
R
0-peak; W = 32; note 6
Rhead = 10 Ω; note 7
Iwrite = 30 mA;
Iwrite(max)
maximum write current
60
80
0
−
mA
%
∆Iwrite
difference between positive
and negative write currents
−
5
tt(iwrite)(Rload)
write current transition time
resistive load
note 8
resistive load, 10 Ω
−
−
4
6
−
ns
ns
head load
Rhead = 10 Ω;
12
Lhead = 200 nH
Vo(p-p)(1,3)
output voltage swing
(peak-to-peak value)
3
−
−
V
tR-W
read to write time
−
−
−
5
5
−
0.2
10
0
−
µs
µs
ns
ns
ns
Ω
tW-R
write to read time
−
∆tWD
WD pulse asymmetry
WDI pulse time HIGH
WDI pulse time LOW
in WDI mode; note 9
1
tWDIH
tWDIL
Rdet(WUS)
−
−
−
−
WUS detection
resistance level
short circuited to VDD or
VSS; Iwrite = 30 mA
−
10
open; Iwrite = 30 mA
150
−
−
Ω
Notes
1. G is a 4-bit number contained in control bits G0 to G3 (see Table 12).
2. 6 dB step via a fixed setting, and 16 dB (in 1 dB steps) via AGC control.
3. S is a 7-bit number contained in control bits S0 to S6 (see Table 15).
4. The TZA1000 is guaranteed to operate reliably with sense currents of up to 33 mA.
5. The operational clock frequency (pin 15) must be >16 times higher the SCLK frequency to ensure reliable serial
transfer.
6. W is a 7-bit number contained in control bits W0 to W6 (see Table 14). A more accurate calculation of the write
current would be given by: Ic = It − 0.003 × It2, where It = 125 (W + 1) / 128, It the target current and Ic the
write current.
7. The TZA1000 is guaranteed to supply a write current of up to 60 mA.
8. 10 to 90% of a total current reversal.
9. Difference between negative-to-positive and positive-to-negative current slopes.
1998 Mar 17
16
Philips Semiconductors
Preliminary specification
QIC read-write amplifier
TZA1000
EQUIVALENT PIN CIRCUITS
PIN
DESCRIPTION
EQUIVALENT PIN CIRCUIT
1
write output stage
V
DD
1
WX
MGG662
3
write output stage
V
DD
3
WY
MGG663
1,3,20 servo input configuration
1
3
WX
WY
700 Ω
700 Ω
2.5 V
20
V
MGG664
ref
6,7,20 input configuration
6
7
INA
INB
5 kΩ
5 kΩ
1.4 V
20
V
ref
MGG665
8
sense output configuration
12 V
50 Ω
8
ISENSE
MGG666
1998 Mar 17
17
Philips Semiconductors
Preliminary specification
QIC read-write amplifier
TZA1000
PIN
DESCRIPTION
EQUIVALENT PIN CIRCUIT
10
digital input configuration
V
DD
SCLK
10
MGG667
11
digital input configuration
V
DD
SDEN 11
MGG668
13
14
digital input configuration
V
DD
13
HOLD
MGG669
digital input configuration
V
DD
WGATE 14
MGG670
15
digital input configuration
V
DD
CLK
15
MGG671
1998 Mar 17
18
Philips Semiconductors
Preliminary specification
QIC read-write amplifier
TZA1000
PIN
DESCRIPTION
EQUIVALENT PIN CIRCUIT
18
output configuration
V
DD
25 Ω
18
OUTB
2.3
mA
DC: 2.5 V
MGG672
19
output configuration
V
DD
25 Ω
19
OUTA
2.3
mA
DC: 2.5 V
MGG673
20
Vref output configuration
V
DD
50 Ω
V
20
ref
6 kΩ
MGG674
22
reset output configuration
V
DD
22
RESET
18 kΩ
MGG675
1998 Mar 17
19
Philips Semiconductors
Preliminary specification
QIC read-write amplifier
TZA1000
PACKAGE OUTLINE
SO24: plastic small outline package; 24 leads; body width 7.5 mm
SOT137-1
D
E
A
X
c
H
v
M
A
E
y
Z
24
13
Q
A
2
A
(A )
3
A
1
pin 1 index
θ
L
p
L
1
12
w
detail X
e
M
b
p
0
5
10 mm
scale
DIMENSIONS (inch dimensions are derived from the original mm dimensions)
A
max.
(1)
(1)
(1)
UNIT
A
A
A
b
c
D
E
e
H
L
L
Q
v
w
y
θ
1
2
3
p
E
p
Z
0.30
0.10
2.45
2.25
0.49
0.36
0.32
0.23
15.6
15.2
7.6
7.4
10.65
10.00
1.1
0.4
1.1
1.0
0.9
0.4
mm
2.65
0.25
0.01
1.27
0.050
1.4
0.25 0.25
0.01
0.1
8o
0o
0.012 0.096
0.004 0.089
0.019 0.013 0.61
0.014 0.009 0.60
0.30
0.29
0.419
0.394
0.043 0.043
0.016 0.039
0.035
0.016
inches 0.10
0.055
0.01 0.004
Note
1. Plastic or metal protrusions of 0.15 mm maximum per side are not included.
REFERENCES
OUTLINE
EUROPEAN
PROJECTION
ISSUE DATE
VERSION
IEC
JEDEC
EIAJ
95-01-24
97-05-22
SOT137-1
075E05
MS-013AD
1998 Mar 17
20
Philips Semiconductors
Preliminary specification
QIC read-write amplifier
TZA1000
SOLDERING
Introduction
Wave soldering
Wave soldering techniques can be used for all SO
packages if the following conditions are observed:
There is no soldering method that is ideal for all IC
packages. Wave soldering is often preferred when
through-hole and surface mounted components are mixed
on one printed-circuit board. However, wave soldering is
not always suitable for surface mounted ICs, or for
printed-circuits with high population densities. In these
situations reflow soldering is often used.
• A double-wave (a turbulent wave with high upward
pressure followed by a smooth laminar wave) soldering
technique should be used.
• The longitudinal axis of the package footprint must be
parallel to the solder flow.
• The package footprint must incorporate solder thieves at
the downstream end.
This text gives a very brief insight to a complex technology.
A more in-depth account of soldering ICs can be found in
our “IC Package Databook” (order code 9398 652 90011).
During placement and before soldering, the package must
be fixed with a droplet of adhesive. The adhesive can be
applied by screen printing, pin transfer or syringe
dispensing. The package can be soldered after the
adhesive is cured.
Reflow soldering
Reflow soldering techniques are suitable for all SO
packages.
Maximum permissible solder temperature is 260 °C, and
maximum duration of package immersion in solder is
10 seconds, if cooled to less than 150 °C within
Reflow soldering requires solder paste (a suspension of
fine solder particles, flux and binding agent) to be applied
to the printed-circuit board by screen printing, stencilling or
pressure-syringe dispensing before package placement.
6 seconds. Typical dwell time is 4 seconds at 250 °C.
A mildly-activated flux will eliminate the need for removal
of corrosive residues in most applications.
Several techniques exist for reflowing; for example,
thermal conduction by heated belt. Dwell times vary
between 50 and 300 seconds depending on heating
method. Typical reflow temperatures range from
215 to 250 °C.
Repairing soldered joints
Fix the component by first soldering two diagonally-
opposite end leads. Use only a low voltage soldering iron
(less than 24 V) applied to the flat part of the lead. Contact
time must be limited to 10 seconds at up to 300 °C. When
using a dedicated tool, all other leads can be soldered in
one operation within 2 to 5 seconds between
270 and 320 °C.
Preheating is necessary to dry the paste and evaporate
the binding agent. Preheating duration: 45 minutes at
45 °C.
1998 Mar 17
21
Philips Semiconductors
Preliminary specification
QIC read-write amplifier
TZA1000
DEFINITIONS
Data sheet status
Objective specification
Preliminary specification
Product specification
This data sheet contains target or goal specifications for product development.
This data sheet contains preliminary data; supplementary data may be published later.
This data sheet contains final product specifications.
Limiting values
Limiting values given are in accordance with the Absolute Maximum Rating System (IEC 134). Stress above one or
more of the limiting values may cause permanent damage to the device. These are stress ratings only and operation
of the device at these or at any other conditions above those given in the Characteristics sections of the specification
is not implied. Exposure to limiting values for extended periods may affect device reliability.
Application information
Where application information is given, it is advisory and does not form part of the specification.
LIFE SUPPORT APPLICATIONS
These products are not designed for use in life support appliances, devices, or systems where malfunction of these
products can reasonably be expected to result in personal injury. Philips customers using or selling these products for
use in such applications do so at their own risk and agree to fully indemnify Philips for any damages resulting from such
improper use or sale.
1998 Mar 17
22
Philips Semiconductors
Preliminary specification
QIC read-write amplifier
TZA1000
NOTES
1998 Mar 17
23
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For all other countries apply to: Philips Semiconductors,
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International Marketing & Sales Communications, Building BE-p, P.O. Box 218,
5600 MD EINDHOVEN, The Netherlands, Fax. +31 40 27 24825
© Philips Electronics N.V. 1998
SCA57
All rights are reserved. Reproduction in whole or in part is prohibited without the prior written consent of the copyright owner.
The information presented in this document does not form part of any quotation or contract, is believed to be accurate and reliable and may be changed
without notice. No liability will be accepted by the publisher for any consequence of its use. Publication thereof does not convey nor imply any license
under patent- or other industrial or intellectual property rights.
Printed in The Netherlands
545102/00/02/pp24
Date of release: 1998 Mar 17
Document order number: 9397 750 03524
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Description
Consumer Multimedia
Systems
Communications
The TZA1000 is a single-chip read-write amplifier for single-channel QIC (Quarter Inch Cartridge) systems with MR heads. It can be used
with both SIG (Sensor in Gap)-and yoke-type MR heads and is designed to be used in conjunction with the Philips SZA1000 digital
equalizer IC (although it can also function as a stand alone unit). This combination is flexible enough to be used with all popular tape
backup formats including QIC 80, QIC 3010, QIC 3020, QIC 3080, QIC 5010, Travan 1, Travan 2, Travan 3 and Travan 4 and to be
forward compatible with their single channel successors.
PC/PC-peripherals
Cross reference
Models
Packages
Application notes
Selection guides
Other technical documentation
End of Life information
Datahandbook system
Features
l 3-wire serial interface for programming
l On-chip Digital-to-Analog Converters (DAC) for:
- MR (Magneto Resistive) sense bias current
- MR DC bias current
- Write current
Relevant Links
l Low noise differential input stage: typically 0.65 nV/
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count
TZA1000
TZA1000
Type nr. Title
Datasheet
Download
TZA1000 QIC read-write amplifier
17-Mar-98
Preliminary
24
132
Specification
Blockdiagram
Blockdiagram of TZA1000T
Products, packages, availability and ordering
North American
Partnumber
Order code
(12nc)
Partnumber
marking/packing
package device status buy online
SOT137 Full production
Standard Marking * Tube
Dry Pack
TZA1000T/N3 TZA1000TD
9352 101 50512
Please read information about some discontinued variants of this product.
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Royal Philips Electronics
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