UAA3540 [NXP]
DECT receiver; DECT接收器
| 型号： | UAA3540 |
| 厂家： | 
NXP |
| 描述： | DECT receiver |
| 文件： | 总16页 (文件大小：71K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
INTEGRATED CIRCUITS
DATA SHEET
UAA3540TS
DECT receiver
Product specification
2000 Feb 15
File under Integrated Circuits, IC17
Philips Semiconductors
Product specification
DECT receiver
UAA3540TS
FEATURES
GENERAL DESCRIPTION
• Single-chip RF plus IF
• Integrated channel filter
• Low component count
• No production trimming
• High dynamic range
• Low power
The UAA3540TS is a low-power, highly integrated circuit,
for Digital Enhanced Cordless Telecommunication (DECT)
applications.
It features a fully integrated channel selection filter, an
analog Received Signal Strength Indicator (RSSI) and a
switched demodulator output to interface to Philips
Semiconductors ABC baseband chip. The circuit can be
fully powered down during the idle locked state.
• 3.2 V operation
• Built-in power-down mode.
QUICK REFERENCE DATA
VCC = 3.2 V; Tamb = 25 °C; unless otherwise specified.
SYMBOL
VCC
PARAMETER
supply voltage
CONDITIONS
over Tamb
MIN.
3.0
TYP. MAX. UNIT
3.2
34
10
−
3.6
45
V
ICC
supply current
−
mA
µA
°C
ICC(pd)
Tamb
power-down mode supply current
ambient temperature
−
50
−10
+60
ORDERING INFORMATION
TYPE
PACKAGE
NUMBER
NAME
DESCRIPTION
VERSION
UAA3540TS
SSOP20
plastic shrink small outline package; 20 leads; body width 4.4 mm
SOT266-1
2000 Feb 15
2
Philips Semiconductors
Product specification
DECT receiver
UAA3540TS
BLOCK DIAGRAM
LOA
17
LIMITER
LOB
18
MIXER
×
UAA3540TS
D
E
M
O
D
U
L
5
0°
RFA
13
11
RFB
6
+
−
DATA
DATA
90°
A
T
1 kΩ
O
R
LIMITER
×
MIXER
8
15
10
FCA040
RSET
RSSI
SLCCTR
Fig.1 Block diagram.
2000 Feb 15
3
Philips Semiconductors
Product specification
DECT receiver
UAA3540TS
PINNING
SYMBOL
PIN
DESCRIPTION
GND(LO)
PD
1
2
local oscillator ground
power-down control input (logic 1
disables the chip)
VCC(RF)
GND(RF)
RFA
3
4
5
6
7
8
RF positive supply voltage
RF ground
handbook, halfpage
RF balanced input A
RF balanced input B
IF ground
GND
1
2
3
4
5
6
7
8
9
20 TEST4
(LO)
RFB
PD
19
V
CC(LO)
GND(IF)
RSET
V
18 LOB
17 LOA
CC(RF)
set filter (connect to external
resistor)
GND
(RF)
TEST1
9
test 1 (connect to GND)
RFA
16
V
CC(IF)
UAA3540TS
SLCCTR
10 slicer threshold switch control input
(logic 1 closes the switch)
RFB
15 RSSI
GND
(IF)
14 TEST3
DATA−
TEST2
DATA+
TEST3
RSSI
11 switched demodulator output
12 test 2 (connect to GND)
+
13 DATA
RSET
TEST1
12 TEST2
13 demodulator digital signal output
−
14 test 3 (connect to VCC
)
SLCCTR 10
11 DATA
15 received signal strength intensity
voltage output
FCA039
VCC(IF)
LOA
16 IF positive supply
17 local oscillator balanced input A
18 local oscillator balanced input B
19 local oscillator positive supply
20 test 4 (connect to GND)
LOB
VCC(LO)
TEST4
Fig.2 Pin configuration.
2000 Feb 15
4
Philips Semiconductors
Product specification
DECT receiver
UAA3540TS
FUNCTIONAL DESCRIPTION
General
Limiter and RSSI
The main purpose of the limiter circuit is to reduce the
dynamic range of the signals presented to the
demodulator; these have a dynamic range greater than
60 dB.
The UAA3540TS is a fully integrated RF plus IF strip and
demodulator for DECT applications. It provides all the
required channel filtering over the DECT band and
generates analog RSSI and a data output for the
baseband chip. Very few off-chip components are required
and should not require trimming in normal applications.
The chip is designed to operate from a power supply
voltage which can fall to 3.0 V, and features full
power-down capabilities.
The limiter also provides the RSSI output voltage.
The RSSI output has very little filtering applied, and it is
assumed that external circuits will be used to provide the
time constant and peak holding required by the DECT
specification.
Demodulator
The inputs are an RF antenna signal and a Local
Oscillator (LO) signal. The RF antenna signal is from a
band filter or antenna switch. The higher frequency
LO signal is from an external Voltage Controlled
Oscillator (VCO).
The demodulator produces an output voltage directly
proportional to the instantaneous frequency of the
received signal. The output stage of the demodulator
contains a data filter to remove high frequencies from the
signal, prior to data slicing.
The outputs are an RSSI voltage, representing the
instantaneous signal strength, and DATA− and DATA+
which are two high-level demodulator output signals.
DATA− is switched by SLCCTR to generate a threshold
voltage for the internal slicer, and DATA+ is the
comparator digital output.
The demodulator provides a continuous output timing
signal that is applied to an internal data slicer. The same
signal is also switched to generate the threshold voltage of
the slicer during the initial DECT bit sequence.
Power-down
Filter
The power-down control input (pin 2) allows the current
consumption of the chip to be reduced to a very low level
when it is connected to VCC. In this state, some voltages in
the chip become indeterminate requiring time for the
receiver to stabilize after power-up.
The integrated filter provides all the channel selectivity
required for the DECT receiver. An external resistor of
18 kΩ must be connected to RSET (pin 8).
2000 Feb 15
5
Philips Semiconductors
Product specification
DECT receiver
UAA3540TS
LIMITING VALUES
In accordance with the Absolute Maximum Rating System (IEC 134).
SYMBOL
VCC
Vi(PD)
PARAMETER
MIN.
−0.3
MAX.
+3.6
UNIT
supply voltage
V
V
;
input voltage on pins PD and SLCCTR
−0.3
+3.6
Vi(SLCCTR)
Pi(max)
Tj(max)
P(max)
Tstg
maximum input power
−
15
dBm
°C
maximum operating junction temperature
maximum power dissipation in quiet air
storage temperature
−
150
180
+125
−
mW
°C
−55
HANDLING
All pins withstand 1500 V ESD test in accordance with “EIA/JESD22-A114 Class1 (Feb. 96)”.
THERMAL CHARACTERISTICS
SYMBOL
PARAMETER
CONDITIONS
VALUE
UNIT
Rth(j-a)
thermal resistance from junction to ambient in free air
152
K/W
DC CHARACTERISTICS
VCC = 3.2 V; Tamb = 25 °C; unless otherwise specified.
SYMBOL
PARAMETER
CONDITIONS
MIN.
TYP. MAX. UNIT
Supply (Pins VCC(LO), VCC(RF) and VCC(IF)
)
VCC
supply voltage
supply current
Tamb ≥ 25 °C
3.0
3.2
34
10
3.6
45
50
V
ICC
−
−
mA
µA
ICC(pd)
power-down mode supply current
Interface logic input signal levels (Pins PD and SLCCTR)
VIH
HIGH-level input voltage
LOW-level input voltage
input bias current
1.4
−0.3
−5
−
−
−
VCC
+0.4
+5
V
VIL
V
Ii(bias)
logic 1 or 0
µA
2000 Feb 15
6
Philips Semiconductors
Product specification
DECT receiver
UAA3540TS
AC CHARACTERISTICS
VCC = 3.2 V; Tamb = 25 °C; modulation deviation ∆f = 288 kHz; measured on Philips Semiconductors characterization
board at the RF balun input; unless otherwise specified.
SYMBOL
PARAMETER
CONDITIONS
MIN. TYP. MAX. UNIT
Pin RSSI
VRSSI
RSSI output voltage monotonic over range
−96 to −36 dBm
with −36 dBm at RF input
with −96 dBm at RF input
−
−
−
1.7
0.3
25
2
V
−
V
twake
period between power-up signal and valid
RSSI output (wake-up time)
no external capacitor on
the RSSI output
40
µs
Systems
SB.3
SB.5
IM3
sensitivity of RF input
sensitivity of RF input
intermodulation rejection
BER ≤ 10−3; note 1
BER ≤ 10−5; note 1
−
−
−95 −93
−92 −76
dBm
dBm
dBc
unwanted interferers level 33
in channels N + 2 and
N + 4 referred to wanted
at −83 dBm in channel 5
for BER < 10−3; note 1
40
−8
19
40
44
55
−
−
−
−
−
−
Rco
co-channel rejection
co-channel interferer level −10
referred to wanted at
−76 dBm both in
channel 5 for BER < 10−3;
note 1
dBc
dBc
dBc
dBc
dBc
Rj(N + 1)
Rj(N + 2)
Rj(N + ≥3)
adjacent channel rejection
bi-adjacent channel rejection
≥3 channels rejection
adjacent channel
13
34
40
37
interferer level referred to
wanted at −76 dBm in
channel 5 for BER < 10−3;
note 1
bi-adjacent channel
interferer level referred to
wanted at −76 dBm in
channel 5 for BER < 10−3;
note 1
N ≥ 3 adjacent channel
interferer level referred to
wanted at −76 dBm in
channel 5 for BER < 10−3;
note 1
Bl∆f > 6 MHz rejection of a blocking signal in the range
unwanted CW level
referred to wanted at
−83 dBm in channel 5 for
BER < 10−3; note 1
lf − fcl > 6 MHz
Blnear1
Blnear2
rejection of a blocking signal in the ranges:
(RF)(min) − 100 MHz < f < f(RF)(min) − 5 MHz;
f(RF)(max) + 5 MHz < f < f(RF)(max) + 100 MHz
52
52
58
58
−
−
dBc
dBc
f
rejection of a blocking signal in the ranges:
f(RF)(min) − 300 MHz < f < f(RF)(min) − 100 MHz;
f(RF)(max) + 100 MHz < f < f(RF)(max) + 300 MHz
2000 Feb 15
7
Philips Semiconductors
Product specification
DECT receiver
UAA3540TS
SYMBOL
PARAMETER
CONDITIONS
MIN. TYP. MAX. UNIT
Blfarlow
rejection of a blocking signal in the range:
25 MHz < f <f(RF)(min) − 300 MHz
unwanted CW level
referred to wanted at
−83 dBm in channel 5 for
BER < 10−3; note 1
37
58
58
−
−
dBc
dBc
Blfarhigh
rejection of a blocking signal in the range:
f(RF)(max) + 300 MHz < f < 4.32 GHz
unwanted CW level
47
referred to wanted at
−83 dBm in channel 5 for
BER < 10−3; note 1;
except 3 occurrences at
FG1, FG2 and FG3 as
defined in TBR6
BFG1
rejection of a blocking signal in occurrence
around: FG1 = 2835.648 MHz
unwanted CW level
referred to wanted at
−83 dBm in channel 5 for
BER < 10−3; note 1
37
45
−
dBc
BFG2
BFG3
rejection of a blocking signal in occurrence
around: FG1 = 3150.144 MHz
37
20
49
30
−
−
dBc
dBc
rejection of a blocking signal in occurrence
around: FG1 = 3779.136 MHz
Receive section
Ri(RF) RF input resistance (real part of the parallel
balanced; at 1890 MHz
−
−
70
−
−
Ω
input impedance)
Ci(RF)
RF input capacitance (imaginary part of the
parallel input impedance)
0.8
pF
f(RF)(max)
f(RF)(min)
RLi(RF)(m)
maximum RF input frequency
minimum RF input frequency
return loss on matched RF input
−
−
1930 MHz
1880
11
−
−
−
MHz
dB
balanced; note 1
15
Local oscillator section
Ri(lo)
LO input resistance (real part of the parallel
input impedance)
balanced; at 1890 MHz
−
−
140
0.3
−
−
Ω
Ci(lo)
LO input capacitance (imaginary part of the
parallel input impedance)
pF
RLi(lo)
Pi(lo)
return loss on matched LO input
LO input power level
balanced; note 2
9
12
−
−
dB
−
−15
dBm
Demodulator section
Gdem
demodulator gain
−
1.5
−
V/MHz
Notes
1. Measured on the Philips Semiconductors characterisation board at the RF balun input.
2. Measured on the Philips Semiconductors characterisation board at the LO balun input.
2000 Feb 15
8
Philips Semiconductors
Product specification
DECT receiver
UAA3540TS
FCA090
2.4
V
RSSI
(V)
2.0
1.6
1.2
0.8
0.4
0
−102 −96 −90 −84 −78 −72 −66
−60 −54 −48 −42 −36 −30 −24 −18 −12 −6
0
6
12
18
P
(dBm)
i(RF)
VCC = 3.2 V; Tamb = 25oC.
Fig.3 RSSI output voltage as a function of RF input power.
APPLICATION INFORMATION
GND
V
(LO)
TEST4
1
2
3
4
5
6
7
8
9
10
20
19
18
17
16
V
CC(LO)
PD
power down
control signal
V
CC
8.2 pF
8.2 pF
CC(RF)
LOB
LOA
V
symmetrical
LO signal
from VCO
CC
GND
L = 6.8 nH
(RF)
2.7 pF
2.7 pF
1.2 pF
V
CC(IF)
RFA
RFB
V
V
CC
CC
RF input
L = 6.8 nH
UAA3540TS
RSSI
L = 6.8 nH
1.2 pF
15
14
13
12
11
RSSI output
27 pF
GND
(IF)
TEST3
digital
data
output
+
DATA
RSET
TEST1
TEST2
18 kΩ
−
slicer control
input signal
SLCCTR
DATA
4.7 nF
FCA041
Fig.4 Application diagram.
9
2000 Feb 15
Philips Semiconductors
Product specification
DECT receiver
UAA3540TS
PACKAGE OUTLINE
SSOP20: plastic shrink small outline package; 20 leads; body width 4.4 mm
SOT266-1
D
E
A
X
c
y
H
v
M
A
E
Z
11
20
Q
A
2
A
(A )
3
A
1
pin 1 index
θ
L
p
L
1
10
detail X
w
M
b
p
e
0
2.5
5 mm
scale
DIMENSIONS (mm are the original dimensions)
A
(1)
(1)
(1)
UNIT
A
A
A
b
c
D
E
e
H
L
L
p
Q
v
w
y
Z
θ
1
2
3
p
E
max.
10o
0o
0.15
0
1.4
1.2
0.32
0.20
0.20
0.13
6.6
6.4
4.5
4.3
6.6
6.2
0.75
0.45
0.65
0.45
0.48
0.18
mm
1.5
0.65
1.0
0.2
0.25
0.13
0.1
Note
1. Plastic or metal protrusions of 0.20 mm maximum per side are not included.
REFERENCES
OUTLINE
EUROPEAN
PROJECTION
ISSUE DATE
VERSION
IEC
JEDEC
EIAJ
95-02-22
99-12-27
SOT266-1
MO-152
2000 Feb 15
10
Philips Semiconductors
Product specification
DECT receiver
UAA3540TS
SOLDERING
• Use a double-wave soldering method comprising a
turbulent wave with high upward pressure followed by a
smooth laminar wave.
Introduction to soldering surface mount packages
This text gives a very brief insight to a complex technology.
A more in-depth account of soldering ICs can be found in
our “Data Handbook IC26; Integrated Circuit Packages”
(document order number 9398 652 90011).
• For packages with leads on two sides and a pitch (e):
– larger than or equal to 1.27 mm, the footprint
longitudinal axis is preferred to be parallel to the
transport direction of the printed-circuit board;
There is no soldering method that is ideal for all surface
mount IC packages. Wave soldering is not always suitable
for surface mount ICs, or for printed-circuit boards with
high population densities. In these situations reflow
soldering is often used.
– smaller than 1.27 mm, the footprint longitudinal axis
must be parallel to the transport direction of the
printed-circuit board.
The footprint must incorporate solder thieves at the
downstream end.
Reflow soldering
• For packages with leads on four sides, the footprint must
be placed at a 45° angle to the transport direction of the
printed-circuit board. The footprint must incorporate
solder thieves downstream and at the side corners.
Reflow soldering requires solder paste (a suspension of
fine solder particles, flux and binding agent) to be applied
to the printed-circuit board by screen printing, stencilling or
pressure-syringe dispensing before package placement.
During placement and before soldering, the package must
be fixed with a droplet of adhesive. The adhesive can be
applied by screen printing, pin transfer or syringe
dispensing. The package can be soldered after the
adhesive is cured.
Several methods exist for reflowing; for example,
infrared/convection heating in a conveyor type oven.
Throughput times (preheating, soldering and cooling) vary
between 100 and 200 seconds depending on heating
method.
Typical dwell time is 4 seconds at 250 °C.
A mildly-activated flux will eliminate the need for removal
of corrosive residues in most applications.
Typical reflow peak temperatures range from
215 to 250 °C. The top-surface temperature of the
packages should preferable be kept below 230 °C.
Manual soldering
Wave soldering
Fix the component by first soldering two
diagonally-opposite end leads. Use a low voltage (24 V or
less) soldering iron applied to the flat part of the lead.
Contact time must be limited to 10 seconds at up to
300 °C.
Conventional single wave soldering is not recommended
for surface mount devices (SMDs) or printed-circuit boards
with a high component density, as solder bridging and
non-wetting can present major problems.
When using a dedicated tool, all other leads can be
soldered in one operation within 2 to 5 seconds between
270 and 320 °C.
To overcome these problems the double-wave soldering
method was specifically developed.
If wave soldering is used the following conditions must be
observed for optimal results:
2000 Feb 15
11
Philips Semiconductors
Product specification
DECT receiver
UAA3540TS
Suitability of surface mount IC packages for wave and reflow soldering methods
SOLDERING METHOD
PACKAGE
WAVE
REFLOW(1)
BGA, SQFP
not suitable
suitable
suitable
suitable
suitable
suitable
HLQFP, HSQFP, HSOP, HTSSOP, SMS not suitable(2)
PLCC(3), SO, SOJ
LQFP, QFP, TQFP
SSOP, TSSOP, VSO
suitable
not recommended(3)(4)
not recommended(5)
Notes
1. All surface mount (SMD) packages are moisture sensitive. Depending upon the moisture content, the maximum
temperature (with respect to time) and body size of the package, there is a risk that internal or external package
cracks may occur due to vaporization of the moisture in them (the so called popcorn effect). For details, refer to the
Drypack information in the “Data Handbook IC26; Integrated Circuit Packages; Section: Packing Methods”.
2. These packages are not suitable for wave soldering as a solder joint between the printed-circuit board and heatsink
(at bottom version) can not be achieved, and as solder may stick to the heatsink (on top version).
3. If wave soldering is considered, then the package must be placed at a 45° angle to the solder wave direction.
The package footprint must incorporate solder thieves downstream and at the side corners.
4. Wave soldering is only suitable for LQFP, TQFP and QFP packages with a pitch (e) equal to or larger than 0.8 mm;
it is definitely not suitable for packages with a pitch (e) equal to or smaller than 0.65 mm.
5. Wave soldering is only suitable for SSOP and TSSOP packages with a pitch (e) equal to or larger than 0.65 mm; it is
definitely not suitable for packages with a pitch (e) equal to or smaller than 0.5 mm.
DEFINITIONS
Data sheet status
Objective specification
Preliminary specification
Product specification
This data sheet contains target or goal specifications for product development.
This data sheet contains preliminary data; supplementary data may be published later.
This data sheet contains final product specifications.
Limiting values
Limiting values given are in accordance with the Absolute Maximum Rating System (IEC 134). Stress above one or
more of the limiting values may cause permanent damage to the device. These are stress ratings only and operation
of the device at these or at any other conditions above those given in the Characteristics sections of the specification
is not implied. Exposure to limiting values for extended periods may affect device reliability.
Application information
Where application information is given, it is advisory and does not form part of the specification.
LIFE SUPPORT APPLICATIONS
These products are not designed for use in life support appliances, devices, or systems where malfunction of these
products can reasonably be expected to result in personal injury. Philips customers using or selling these products for
use in such applications do so at their own risk and agree to fully indemnify Philips for any damages resulting from such
improper use or sale.
2000 Feb 15
12
Philips Semiconductors
Product specification
DECT receiver
UAA3540TS
NOTES
2000 Feb 15
13
Philips Semiconductors
Product specification
DECT receiver
UAA3540TS
NOTES
2000 Feb 15
14
Philips Semiconductors
Product specification
DECT receiver
UAA3540TS
NOTES
2000 Feb 15
15
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Tel. +41 1 488 2741 Fax. +41 1 488 3263
Indonesia: PT Philips Development Corporation, Semiconductors Division,
Gedung Philips, Jl. Buncit Raya Kav.99-100, JAKARTA 12510,
Tel. +62 21 794 0040 ext. 2501, Fax. +62 21 794 0080
Taiwan: Philips Semiconductors, 6F, No. 96, Chien Kuo N. Rd., Sec. 1,
TAIPEI, Taiwan Tel. +886 2 2134 2886, Fax. +886 2 2134 2874
Ireland: Newstead, Clonskeagh, DUBLIN 14,
Tel. +353 1 7640 000, Fax. +353 1 7640 200
Thailand: PHILIPS ELECTRONICS (THAILAND) Ltd.,
209/2 Sanpavuth-Bangna Road Prakanong, BANGKOK 10260,
Tel. +66 2 745 4090, Fax. +66 2 398 0793
Israel: RAPAC Electronics, 7 Kehilat Saloniki St, PO Box 18053,
TEL AVIV 61180, Tel. +972 3 645 0444, Fax. +972 3 649 1007
Turkey: Yukari Dudullu, Org. San. Blg., 2.Cad. Nr. 28 81260 Umraniye,
ISTANBUL, Tel. +90 216 522 1500, Fax. +90 216 522 1813
Italy: PHILIPS SEMICONDUCTORS, Via Casati, 23 - 20052 MONZA (MI),
Tel. +39 039 203 6838, Fax +39 039 203 6800
Ukraine: PHILIPS UKRAINE, 4 Patrice Lumumba str., Building B, Floor 7,
252042 KIEV, Tel. +380 44 264 2776, Fax. +380 44 268 0461
Japan: Philips Bldg 13-37, Kohnan 2-chome, Minato-ku,
TOKYO 108-8507, Tel. +81 3 3740 5130, Fax. +81 3 3740 5057
United Kingdom: Philips Semiconductors Ltd., 276 Bath Road, Hayes,
MIDDLESEX UB3 5BX, Tel. +44 208 730 5000, Fax. +44 208 754 8421
Korea: Philips House, 260-199 Itaewon-dong, Yongsan-ku, SEOUL,
Tel. +82 2 709 1412, Fax. +82 2 709 1415
United States: 811 East Arques Avenue, SUNNYVALE, CA 94088-3409,
Tel. +1 800 234 7381, Fax. +1 800 943 0087
Malaysia: No. 76 Jalan Universiti, 46200 PETALING JAYA, SELANGOR,
Tel. +60 3 750 5214, Fax. +60 3 757 4880
Uruguay: see South America
Vietnam: see Singapore
Mexico: 5900 Gateway East, Suite 200, EL PASO, TEXAS 79905,
Tel. +9-5 800 234 7381, Fax +9-5 800 943 0087
Yugoslavia: PHILIPS, Trg N. Pasica 5/v, 11000 BEOGRAD,
Middle East: see Italy
Tel. +381 11 3341 299, Fax.+381 11 3342 553
For all other countries apply to: Philips Semiconductors,
Internet: http://www.semiconductors.philips.com
International Marketing & Sales Communications, Building BE-p, P.O. Box 218,
5600 MD EINDHOVEN, The Netherlands, Fax. +31 40 27 24825
69
SCA
© Philips Electronics N.V. 2000
All rights are reserved. Reproduction in whole or in part is prohibited without the prior written consent of the copyright owner.
The information presented in this document does not form part of any quotation or contract, is believed to be accurate and reliable and may be changed
without notice. No liability will be accepted by the publisher for any consequence of its use. Publication thereof does not convey nor imply any license
under patent- or other industrial or intellectual property rights.
Printed in The Netherlands
403506/02/pp16
Date of release: 2000 Feb 15
Document order number: 9397 750 06422
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