UAA3559HN_技术文档

INTEGRATED CIRCUITS

DATA SHEET

UAA3559HN

Bluetooth RF transceiver

Objective speciﬁcation

2003 Jul 04

Philips Semiconductors

Objective speciﬁcation

Bluetooth RF transceiver

UAA3559HN

FEATURES

• Low cost solution for a Bluetooth^TM(1)radio

• Fully integrated receiver with high sensitivity

• Integrated low phase noise VCO

The synthesizer comprises a reference divider, main

divider with prescaler, and a phase comparator. The

division ratios of both dividers are programmed by control

signals on a 3-wire bus. The main divider accepts a

frequency range of 2402 MHz to 2481 MHz from the

internal VCO. The reference divider accepts either a

12 MHz or 13 MHz signal from an external crystal

oscillator. The outputs of both dividers are compared by a

phase comparator. A charge-pump in the comparator

produces a current pulse output whenever a phase error

occurs. The current pulse output signal controls and phase

locks the VCO frequency. The charge-pump current

(phase comparator gain) is set to 4 mA.

• Dedicated Bluetooth Phase-Locked Loop (PLL)

synthesizer

• Transmitter preamplifier with programmable output

power of up to 9 dBm

• 3-line serial interface bus

• Low current consumption from 3.0 V supply.

APPLICATIONS

2402 to 2480 MHz Bluetooth radio transmission and

reception in the Industrial Scientific and Medical (ISM)

band conforming to the “Bluetooth Specification

Version 1.1”.

After the synthesizer is programmed, it is activated about

200 µs before the required channel time slot to allow time

for the VCO to lock to the channel frequency. The

synthesizer is then deactivated just before the desired slot

to allow open loop modulation of the VCO in transmit

mode. The synthesizer is also deactivated just before the

desired slot in receive mode. This is required to reduce

power consumption and allows adjustment of the VCO by

an internal carrier follower circuit to maintain an

accurate IF.

GENERAL DESCRIPTION

The UAA3559HN BiCMOS device is a low-power, highly

integrated circuit. It features a fully integrated receiver for

demodulating the output signal from an external antenna

filter, an integrated VCO, a synthesizer to implement

Bluetooth channel frequencies, and a transmitter

preamplifier. The output power of the transmitter

preamplifier can be programmed in eight steps from

−7.5 dBm to +9 dBm (typical) and drives either an antenna

via an external switch diode or an external power amplifier.

The IC is designed to operate from 3.0 V nominal supplies.

Separate power pins are provided for different parts of the

circuit. The ground pins should be connected together

externally to prevent large, potentially harmful, currents

flowing through the IC. All supply pins must be at the same

potential.

(1) The Bluetooth trademarks are owned by Bluetooth SIG, Inc.,

U.S.A. and licensed to Koninklijke Philips Electronics N.V.

ORDERING INFORMATION

PACKAGE

TYPE NUMBER

NAME

DESCRIPTION

VERSION

UAA3559HN

HVQFN32 plastic thermal enhanced very thin quad ﬂat package; no leads;

SOT617-1

32 terminals; body 5 × 5 × 0.85 mm

2003 Jul 04

2

Philips Semiconductors

Objective speciﬁcation

Bluetooth RF transceiver

UAA3559HN

QUICK REFERENCE DATA

V_CC= 3.0 V; T_amb= 25 °C; characteristics for which only a typical value is given are indicative; unless otherwise

speciﬁed.

SYMBOL

V_CC

PARAMETER

supply voltage

CONDITIONS

MIN.

2.7

TYP. MAX. UNIT

3.0

20

3.4

V

I_{CC(RX)(guard)}receiver supply current during

RX guard space

VCO = on; PLL = closed

−

mA

I_CC(RX)

receiver supply current

VCO = on; PLL = open;

receiver = on

−

40

17

33

5

48

−

mA

µA

I_{CC(TX)(guard)}transmitter supply current during VCO = on; PLL = closed

TX guard space

−

I_CC(TX)

I_CC(pd)

f_LO

transmitter supply current

VCO = on; TX preampliﬁer = on;

bits [12:10] = 100

−

40

30

supply current in Power-down

mode

−

synthesized Local Oscillator (LO)

frequency

2402

−

2480 MHz

f_i(xtal)

crystal reference input frequency reference divider ratio

12

13

−

12

13

1

−

MHz

°C

−

f_ph(comp)

T_amb

phase comparator frequency

ambient temperature

−

−30

+25

+85

BLOCK DIAGRAM

V

handbook, full pagewidth

RSSI

1

SS

5

CC(RX)

13

CC(TX)

22

DD

3

REGULATOR

16

RXGND

15

14

RFA

RFB

4

7

LNA

DEMODULATOR

R_DATA

STCTR

×

19

TXGND

20

21

11

TXA

TXB

DC OFFSET

EXTRACTOR

DIVIDER

BY 2

AMP

DATAM

AFC

UAA3559HN

10

12

TEST1

TEST2

VREG

17

18

R_ON

T_ON

CONTROL

LOGIC

26

SYNTHESIZER

VCO

REGULATOR

27

REGGND

9

8

6

2

24

23

30 31

29

32

28

25

MDB179

V

S_CLK S_DATA

S_EN

CP

VTUNE

VCOGND

CC(PLL)

PLLGND

DRIFTCOMP

V

REFCLK

VMOD

CC(REG)

Fig.1 Block diagram.

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Philips Semiconductors

Objective speciﬁcation

Bluetooth RF transceiver

UAA3559HN

PINNING

SYMBOL

DESCRIPTION

RSSI

1

2

received signal strength intensity voltage output

reference frequency input

logic supply voltage

REFCLK

V_DD

3

R_DATA

V_SS

4

digital received data output

logic ground

5

S_DATA

STCTR

S_EN

6

3-wire bus data signal input

7

receiver DC extractor and TX preampliﬁer timing control input

3-wire bus enable signal input

3-wire bus clock signal input

test pin 1; do not connect

receive data analog decision voltage output

test pin 2; do not connect

receiver supply voltage

received signal input B

8

S_CLK

TEST1

DATAM

TEST2

V_CC(RX)

RFB

9

10

11

12

13

14

15

16

17

18

19

20

21

22

23

24

25

26

27

28

29

30

31

32

die pad

RFA

received signal input A

RXGND

R_ON

received ground

receiver PIN diode control digital output

transmitter PIN diode control digital output

transmitter ground

T_ON

TXGND

TXA

transmitted signal output A

transmitted signal output B

transmitter supply voltage

VCO ground

TXB

V_CC(TX)

PLLGND

V_CC(PLL)

V_CC(REG)

VREG

REGGND

VCOGND

VTUNE

CP

PLL supply voltage

regulator supply voltage

regulator output voltage

regulator ground

synthesizer ground

VCO tuning input

charge-pump output

DRIFTCOMP

VMOD

GND

VCO drift compensation

modulation input

ground

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Philips Semiconductors

Objective speciﬁcation

Bluetooth RF transceiver

UAA3559HN

handbook, full pagewidth

S_EN

STCTR

8

7

6

5

4

3

2

1

17 R_ON

18 T_ON

19 TXGND

20 TXA

S_DATA

V

SS

UAA3559HN

R_DATA

21 TXB

V

22 V

DD

CC(TX)

REFCLK

RSSI

23 PLLGND

24

V

CC(PLL)

bottom view

MDB180

Fig.2 Pin configuration.

FUNCTIONAL DESCRIPTION

Transmit chain

TRANSMIT PREAMPLIFIER

The TX preamplifier gain is programmable in seven steps

of up to 4 dB and can either amplify the RF signal up to a

level of 9 dBm (typical), or attenuate the RF signal

to −7.5 dBm (typical), see Table 5.

VCO; BUFFER AND DIVIDER

The VCO has a fully integrated tank circuit with on-chip

inductors, and an on-chip regulator which minimizes any

frequency disturbances caused by V_CCvariations. The

VCO regulator requires a decoupling capacitor to be

connected to pin VREG. The VCO operates at twice the

Bluetooth frequency.

The output of the TX preamplifier at pins TXA and TXB

can directly drive an antenna via a PIN diode switch and

band filter for Bluetooth power class 2 and 3 applications.

The type of TX preamplifier load can affect the frequency

of the VCO when the preamplifier powers up. This ‘pulling’

effect can be counteracted by changing the time at which

the preamplifier powers up, and is implemented by

selecting one of two possible ramp-up modes: ramp-up

mode 0 or ramp-up mode 1. In ramp-up mode 0, the

preamplifier powers up on the rising edge of STCTR.

In ramp-up mode 1, the preamplifier powers up on the

falling edge of STCTR; see Table 3 and timing diagrams

Figs 3 and 4.

The VCO signal is buffered and fed into a divide-by-two

circuit to produce the required Local Oscillator (LO)

frequencies for either transmit (TX) mode or receive

(RX) mode. The large difference between the transmitter

and VCO frequencies reduces transmitter to oscillator

coupling problems.

The output of the divide-by-two circuit drives the main

divider prescaler in the synthesizer and also drives the

TX preamplifier in TX mode, or the RX LO buffer in

RX mode. The high isolation between the VCO buffer and

the main divider ensures that only very small frequency

changes occur when the TX preamplifier or the RX section

are turned on. In the TX mode, the VCO is directly

modulated with GFSK data at pin VMOD.

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Philips Semiconductors

Objective speciﬁcation

Bluetooth RF transceiver

UAA3559HN

Synthesizer

register is shown in Table 1; the first bit entered is bit 31,

the last bit is bit 0.

MAIN DIVIDER

Signal S_EN also controls the operation of the PLL by

either activating or deactivating the internal synthesizer.

The PLL opens for a brief interval after the falling edge of

S_EN.

The main divider is clocked by the RF signal from the VCO

via the divide-by-two circuit at a frequency in the range

2402 MHz to 2481 MHz. The divider ratio is

programmable to any value in the range 2304 to 2559

inclusive; see Table 6.

Receiver

REFERENCE DIVIDER

The receiver is a fully integrated Bluetooth RF and IF strip,

and demodulator. It provides all of the channel filtering

required over the Bluetooth band, and produces either an

analog or a digital signal at output R_DATA. The very few

off-chip components required should not require any trim

adjustment.

The reference divider is clocked by the reference signal at

either 12 MHz or 13 MHz via pin REFCLK. The divider

ratio is programmable to 12 or 13. The circuit operates in

the range 150 mV to 500 mV (RMS); see Table 4.

PHASE COMPARATOR

The receiver input signal is fed from the RF antenna, via

either a band filter or an antenna switch to pins RFA and

RFB. A representation of the instantaneous received

signal strength is output at pin RSSI.

The outputs of both the main divider and reference divider

drive a phase comparator. Its charge-pump circuit outputs

current pulses at pin CP. The CP signal connects to

pin VTUNE to complete the PLL, which controls and phase

locks the VCO frequency. The duration of a current pulse

is equal to the difference in time between the arrival of the

leading edges of both dividers outputs. If the leading edge

from the main divider arrives first, the charge-pump sinks

current. If the leading edge from the reference divider

arrives first, the charge-pump sources current. The

CP signal current can be integrated by connecting an

external RC loop filter to pin VTUNE as shown in Fig.6.

The local oscillator frequency is half the VCO frequency

and must be tuned to 1 MHz above the received channel

frequency to produce a 1 MHz IF. A DC offset extractor

circuit obtains the DC component of the demodulated

analog signal. A comparator compares the extracted DC

with the demodulated analog signal to produce a digital

stream signal at pin R_DATA.

The level of extracted DC at the comparator is carefully

adjusted by the occurrence and duration of signal STCTR.

During the alternating ones and zeroes of the trailer code,

pin STCTR should normally be set HIGH. The baseband

must ensure that STCTR is synchronized with the received

data.

An internal drift compensation circuit maintains the VCO

frequency when the synthesizer is deactivated during

open loop modulation. It requires an external capacitor to

be connected to pin DRIFTCOMP.

Additional internal circuits ensure that the gain of the

phase comparator remains linear even for small phase

errors.

There are two modes for extracting the DC component

from the demodulated signal: mode 0 and mode 1. Both

modes use two methods for DC extraction using a MinMax

circuit and an RC integrating circuit. The MinMax circuit

quickly determines the average DC component from the

maximum and minimum swings of the demodulated signal.

The remaining DC is extracted by one or two RC circuits.

The MinMax circuit is enabled following the 16 µs delay

after the falling edge of S_EN. When pin STCTR goes

HIGH, the MinMax circuit is disabled and the RC circuit is

enabled. In mode 0, an RC circuit with a fast time constant

is enabled. In mode 1 an RC circuit with a slow time

constant is enabled. When STCTR goes LOW, in mode 0,

the fast time constant RC circuit is disabled and a slow

time constant RC circuit is enabled.

Serial programming bus

The IC is programmed by a simple 3-line unidirectional

serial bus comprising data (S_DATA), clock (S_CLK) and

enable (S_EN). The serial data is loaded as a burst that is

framed by S_EN. The programming clock edges and

corresponding data bits are ignored until S_EN goes LOW.

The program data is read directly by the main divider when

S_EN goes HIGH. Signals S_DATA and S_EN should

change value on the falling edge of S_CLK. When inactive,

S_CLK should be held LOW.

The internal register stores only the last 32 bits of data that

are serially clocked into the IC. Additional leading bits are

ignored, and no check is made on the number of clock

pulses received. The allocation of data bits in the IC

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Philips Semiconductors

Objective speciﬁcation

Bluetooth RF transceiver

UAA3559HN

In mode 1, the slow time constant RC circuit remains

enabled. The slow time constant RC circuit in either mode

is disabled on the rising edge of the second S_EN pulse.

The RC resistors for modes 0 and 1 are internal; an

external capacitor has to be connected to pin DATAM.

In RX mode (bit TRX = 1), the receiver is activated on the

falling edge of S_EN and is ready to demodulate data

16 µs later. The falling edge of S_EN is emulated by the

output signal on pin R_ON which is suitable for driving an

external receiver PIN diode.

The timing of these actions is shown in Fig.5.

At the end of a time slot period, a second S_EN pulse is

required to power-down the receiver or transmitter chain

and synthesizer.

Operating mode

The IC timing is controlled by signal S_EN. In TX mode,

after the register is programmed via S_DATA, the

transmitter is activated on the falling edge of STCTR. The

rising edge of S_EN activates the PLL, closes the loop and

powers up the VCO regulator. The falling edge of STCTR

is emulated by the output signal on pin T_ON which can be

used to activate an external power amplifier or antenna

switch. On the falling edge of this first S_EN pulse, the loop

opens, unless bit 9 (PLL) is set; see Figs 3 and 4, and

Table 2.

Power-down mode

In Power-down mode, current consumption is reduced to

below 60 µA. Pins R_ON and T_ON are in 3-state output

mode. The IC enters Power-down mode on the falling

edge of each S_EN pulse that is not preceded by an

S_CLK signal edge.

Register description

Table 1 Register bit allocation

REGISTER BIT⁽¹⁾

VALUE⁽²⁾

NAME

31

1

0

1

0

1

0

−

1

−

0

1

0

−

30

−

29

−

28 to 26

−

25

−

24 to 23

−

22

AFC

21 to 20

−

19

TX ramp-up mode

18

DC extractor mode

17

−

16

−

15

−

14

REF1

13

REF0

12 to 10

9

TX output power

PLL

8

TRX mode

7 to 0

main divider programming

Notes

1. In normal operation, 32 bits are programmed into the register; bit 31 is read in first and bit 0 last.

2. Those bits allocated with values are reserved for test purposes and must be programmed with this value.

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Philips Semiconductors

Objective speciﬁcation

Bluetooth RF transceiver

UAA3559HN

Table 2 Description of register bits

BIT

FUNCTION

DESCRIPTION

22

AFC

Automatic Frequency Control. AFC is used to

follow transmitter carrier in RX mode. 0 = AFC off

and 1 = AFC on.

19

18

TX ramp-up mode

DC extractor mode

See Table 3

DC extractor mode programming. 0 = mode 0,

MinMax - fast RC followed by slow RC time

constants; 1 = mode 1, MinMax - slow RC time

constants; see timing diagrams in Fig.5.

14 to 13

12 to 10

9

REF1 and REF0

TX output power

PLL

These bits deﬁne the reference divider ratio of the

synthesizer; see Table 4.

These bits set the TX preampliﬁer output power;

see Table 5.

PLL mode. 1 = PLL remains ON while the VCO is

ON; 0 = the PLL is opened at the start of the

active slot period.

8

TRX

Transmit or receive mode. 1 = RX mode selected;

0 = TX mode selected.

7 to 0

main divider programming

The main divider ratio is equal to 2304 + n where

the binary code for n is given by bits 7 to 0 with

bit 7 as the MSB; see Table 6.

Table 3 TX ramp-up sequence

TX RAMP-UP MODE BIT 19

RESULT

LOGIC 0

S_EN rising edge

LOGIC 1

STCTR rising edge

STCTR falling edge

S_EN rising edge

TX preampliﬁer bias stage ON

TX preampliﬁer output stage ON

pin T_ON HIGH

STCTR rising edge

STCTR falling edge

S_EN rising edge

PLL ON (closed)

S_EN falling edge

PLL OFF (open; bit 9 = 0)

PLL OFF (closed; bit 9 = 1)

TX preampliﬁer bias stage OFF

TX preampliﬁer output stage OFF

pin T_ON LOW

S_EN reset rising edge

S_EN reset falling edge

S_EN reset rising edge

Table 4 Reference divider programming

BIT 14 BIT 13 REFERENCE DIVIDER RATIO

REFERENCE FREQUENCY INPUT (MHz)

0

1

0

12

13

12

13

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Philips Semiconductors

Objective speciﬁcation

Bluetooth RF transceiver

UAA3559HN

Table 5 Transmitter preampliﬁer output power programming

BIT 12 BIT 11 BIT 10

TX OUTPUT POWER, TYPICAL TARGET (dBm)

0

1

0

1

0

1

0

1

0

1

0

1

0

1

−7.5

−4.5

−0.5

+1.5

+4.5

+8

+9

Table 6 Main divider programming example

BIT

SYNTHESIZED

FREQUENCY (MHz)

MAIN DIVIDER RATIO

CHANNEL

7

6

5

4

3

2

1

0

Binary equivalent of n

2304 + n

2402

1.0 × (2304 + n)

2402

0

1

0

1

0

1

0

1

0

1

0

1

transmit channel 0

receive channel 0

transmit channel 78

receive channel 78

2403

2480

2481

LIMITING VALUES

In accordance with the Absolute Maximum Rating System (IEC 60134); note 1.

SYMBOL PARAMETER

V_CC

MIN. MAX. UNIT

supply voltage

−0.3

0

+3.6

V_CC

0

V

V_n

voltage on any pin

V

P_i(max)

T_stg

T_amb

T_j

maximum power at receiver input

storage temperature

−

dBm

−55

−30

−

+125 °C

ambient temperature

+85

150

°C

junction temperature

Note

1. All ground pins must be connected together externally on the printed circuit board to prevent a large current flowing

through the die.

HANDLING

Inputs and outputs are protected against electrostatic discharge in normal handling. However it is good practice to take

normal precautions appropriate to handling MOS devices (see “Handling MOS devices”).

All pins withstand 1000 V HBM and 50 V MM ESD test in accordance with “EIA/JESD22-A114-B Class1 (June 2002)”.

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Philips Semiconductors

Objective speciﬁcation

Bluetooth RF transceiver

UAA3559HN

THERMAL CHARACTERISTICS

SYMBOL

R_th(j-a)

PARAMETER

CONDITIONS

VALUE

UNIT

thermal resistance from

junction to ambient

in free air, exposed die-pad

soldered on a 4 layer FR4 PCB

30

K/W

CHARACTERISTICS

V_CC= 3.0 V; T_amb= 25 °C; f_dev= 160 kHz; characteristics for which only a typical value is given are not tested, unless

otherwise speciﬁed.

SYMBOL

Supply

V_CC

PARAMETER

CONDITIONS

MIN.

TYP.

MAX.

UNIT

supply voltage

2.7

3.0

3.4

V

I_{CC(RX)(guard)}receiver supply current during VCO = on; PLL = closed

guard space

−

20

40

17

33

5

−

mA

µA

I_CC(RX)

receiver supply current

receiver = on; VCO = on;

PLL = open

48

−

I_{CC(TX)(guard)}

I_CC(TX)

transmitter supply current

during guard space

VCO = on; PLL = closed

transmitter supply current

TX preampliﬁer = on; VCO = on;

bits [12:10] = 100

40

30

I_CC(pd)

supply current in Power-down

mode

Synthesizer main divider

D/D_main

f_o(RF)

main divider ratio

RF output frequency

2402

−

2481

2480

MHz

Synthesizer reference divider input

f_i(xtal)

crystal reference input

frequency

reference divider ratio

12

13

−

12

13

−

2

MHz

V

−

V_i(xtal)(rms)

sinusoidal input signal level

(RMS value)

0.15

R_i

C_i

resistive part of the input

impedance

f_ref= 13 MHz

−

2

−

kΩ

capacitive part of the input

impedance

2.5

pF

Phase detector

f_ph(comp)

phase comparator frequency

−

1

−

MHz

Charge-pump output

I_L

I_o

charge-pump leakage

V_CP= 0.5V_CC; note 1

−

5

nA

charge-pump output current

3.5

−

mA

VCO

f_LO

synthesized Local Oscillator

(LO) frequency

T_amb= −30 to +85 °C; note 2

2402

−

2481

MHz

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Philips Semiconductors

Objective speciﬁcation

Bluetooth RF transceiver

UAA3559HN

SYMBOL

PARAMETER

CONDITIONS

MIN.

TYP.

120

MAX.

UNIT

∆f_VCO(VTUNE)frequency variation with

deﬁned at LO frequency;

−

MHz/V

voltage on pin VTUNE

0.3 < V_CP< (V_CC− 0.3)

∆f_(slope)(l)

∆f_(slope)(h)

∆f_VCO(mod)

tuning slope low band

tuning slope high band

note 3

−

110

1.0

−

MHz/V

note 3

−

frequency variation with

modulation input

deﬁned at LO frequency;

0.8

1.2

V_VMOD(DC)= 0.9 V

TX preampliﬁer

P_o

output power

T_amb= −30 to +85 °C; note 2

bits [12:10] = 000

bits [12:10] = 001

bits [12:10] = 010

bits [12:10] = 011

bits [12:10] = 100

bits [12:10] = 101

bits [12:10] = 110

bits [12:10] = 111

−

−7.5

−4.5

−0.5

1.5

4.5

8

−

dBm

Ω

−

1.5

−

7.5

−

9

−

9

−

R_o

C_o

resistive part of parallel output balanced; at 2450 MHz

impedance

−

tbf

−

capacitive part of parallel

output impedance

balanced; at 2450 MHz

−

tbf

−

pF

VCO_(feedthru)VCO frequency feedthrough

level at TX output

referenced to P_oat 2450 MHz;

note 2

−20

dBc

C/N

carrier-to-noise ratio at

TX output

carrier offset is 500 kHz

carrier offset is 2500 kHz

−

−107

−126

−89

dBc/Hz

−

Receiver section; notes 5 and 6

f_i(RF)

RF input frequency

RSSI output voltage

2402

−

2480

MHz

V_o(RSSI)

monotonic over range

−86 to −36 dBm

with −36 dBm at RF input

with −86 dBm at RF input

−

1.6

0.3

8

1.8

0.5

25

V

tbf

−

V

t_wake

wake-up time between receiver no external capacitor on

µs

power-up and correct RSSI

output

pin RSSI

∆P_i(sens)

input sensitivity

BER ≤ 10⁻³; with TX carrier

−

−85

−73

dBm

frequency offset up to ±115 kHz

for T_amb= −30 to +85 °C; note 2

P_i(max)

maximum useable input level

intermodulation rejection

BER ≤ 10⁻³; note 2

BER ≤ 10⁻³; desired

−23

−

dBm

dBc

α_im

−

34

channel = −67 dBm; interfering

frequency at 5 and 10 channels

away from desired channel;

note 2

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Objective speciﬁcation

Bluetooth RF transceiver

UAA3559HN

SYMBOL

α_co

PARAMETER

CONDITIONS

MIN.

−11

TYP.

−10

MAX.

UNIT

dBc

co-channel rejection

BER ≤ 10⁻³; desired

−

channel = −63 dBm; note 2

α_(n±1)

adjacent channel rejection

(n ± 1)

BER ≤ 10⁻³; desired

0

3

−

dBc

channel = −63 dBm; level of

adjacent channel referenced to

level of desired channel; note 2

α_(n-2)

bi-adjacent channel rejection

BER ≤ 10⁻³; desired

30

33

dBc

(n − 2)

channel = −63 dBm; level of

bi-adjacent channel referenced

to level of desired channel;

note 2

IR_(n+2)

image frequency rejection

(n + 2)

BER ≤ 10⁻³; desired

9

12

23

−

dBc

channel = −63 dBm; level of

image frequency referenced to

level of desired channel; note 2

IR_(n+3)

adjacent image frequency

rejection (n + 3)

BER ≤ 10⁻³; desired

20

channel = −70 dBm; level of

adjacent image frequency

referenced to level of desired

channel; note 2

α_{(n-≥3)(n+≥4)}

rejection with more than three BER ≤ 10⁻³; desired

40

43

−

dBc

channels separation

channel = −70 dBm; level of

0 to (n − 3) and (n + 4) to 78

adjacent channel referenced to

level of desired channel; note 2

α_OOB(block)

rejection of an out-of-band

blocking signal

BER ≤ 10⁻³; desired

channel = −70 dBm; level of CW

interferer referenced to level of

desired channel; range:

2 to 3 GHz; note 2

P_LO(feedthru)

local oscillator feedthrough

level

f_VCO= 2450 MHz

−

−80

76

−

dBm

Ω

R_i

C_i

RF resistive part of the parallel balanced; at 2450 MHz

input impedance

RF capacitive part of the

parallel input impedance

balanced; at 2450 MHz

0.6

pF

Interface logic input and output signal levels; pins S_DATA, S_CLK, S_EN, T_ON, R_ON, R_DATA and STCTR

V_IH

HIGH-level input voltage

LOW-level input voltage

HIGH-level output voltage

LOW-level output voltage

input bias current

note 7

1.4

−

V_CC

0.4

−

V

V_IL

−

V

V_OH

V_OL

I_i(bias)

for R_DATA output; note 7

logic 1 or logic 0

2.4

−

2.5

−

V

0.4

+5

−

V

−5

−

µA

mA

I_{source(R_ON)}

I_{source(T_ON)}

,

output current source

capability on pins R_ON

and T_ON

4

2003 Jul 04

12

Philips Semiconductors

Objective speciﬁcation

Bluetooth RF transceiver

UAA3559HN

SYMBOL

f_{S_CLK}

PARAMETER

CONDITIONS

MIN.

TYP.

MAX.

UNIT

3-wire bus frequency

S_EN pulse duration

−

7

MHz

µs

t_{S_EN}

to enable Power-down mode

to lock the PLL and calibrate

2

−

140

160

µs

Notes

1. Suitable for a typical locking time of 160 µs including filter calibration.

2. Measured and guaranteed only on the Philips evaluation board, including printed-circuit board and balun filter, not

including the PIN diode or band filter loss.

∆f

3. The slope for G_avgis evaluated with V_VTUNE: ∆f_(slope)

=

-----------------------

∆V_VTUNE

4. TX preamplifier power steps form a monotonic sequence.

5. BER measurement conditions are described in “Bluetooth BER method”.

6. All receiver section parameters are measured at the receiver balun input, and a 3 dB loss is assumed for the antenna

path. The values expressed in dBc, refer to the level of the interfering signal and are positive for interfering signal

levels higher than the desired signal level.

7. The output of pin R_DATA is designed to interface with pin R_DATA of the Philips baseband IC.

GUARD SPACE

TX DATA

handbook, full pagewidth

S_CLK

S_DATA

S_EN

STCTR

open

PLL

REFCLK

closed

PREAMPLIFIER BIAS

PREAMPLIFIER OUT

T_ON

3-state

TX POWER

ANTENNA POWER

MDB181

Fig.3 TX slot timing; ramp-up mode 0.

2003 Jul 04

13

Philips Semiconductors

Objective speciﬁcation

Bluetooth RF transceiver

UAA3559HN

GUARD SPACE

TX DATA

handbook, full pagewidth

S_CLK

S_DATA

S_EN

STCTR

open

PLL

REFCLK

closed

PREAMPLIFIER BIAS

PREAMPLIFIER OUT

3-state

T_ON

TX POWER

ANTENNA POWER

MDB182

Fig.4 TX slot timing; ramp-up mode 1.

2003 Jul 04

14

Philips Semiconductors

Objective speciﬁcation

Bluetooth RF transceiver

UAA3559HN

GUARD SPACE

handbook, full pagewidth

Preamble Sync word Trailer code

Header

Payload

S_CLK

S_DATA

S_EN

16 µs delay

RSSI

STCTR

DC extract mode 0: MinMax-RCfast-RCslow

MinMax

RCfast

RCslow

DC extract mode 1: MinMax-RCslow

MinMax

RCslow

INTERNAL VCO ON

PLL

INTERNAL RECEIVER ON

REFCLK

closed

open

R_DATA

3-state

R_ON

MDB183

Fig.5 RX slot timing.

2003 Jul 04

15

Philips Semiconductors

Objective speciﬁcation

Bluetooth RF transceiver

UAA3559HN

APPLICATION INFORMATION

The schematic shows a typical application diagram. Component values depend on the application. Two time constants

are set by an external capacitor, the values given are suitable for most applications:

• When AFC is used, C_DATAMis chosen to optimize the AFC time constant. The value of C_DATAMis chosen to optimize

the time constants of the AFC, and DC extractor modes 0 and 1. The typical value of C_DATAMis 10 nF for AFC. If AFC

is not used, C_DATAMadjusts the RC time constant of extractor modes 0 and 1.

• The value of C_DRIFTCOMPis chosen to set the time constant of the VCO drift compensation. The typical value is 6.8 nF.

V

handbook, full pagewidth

CC

C

6.8 nF

DRIFTCOMP

V

CC

32 31 30 29 28 27 26 25

V

CC

RSSI

1

CC(PLL)

24

23

22

21

20

19

18

17

Transmit

balun

REFCLK

2

PLLGND

V

DD

CC(TX)

3

V

CC

R_DATA

4

TXB

UAA3559HN

V

SS

TXA

5

S_DATA

6

TXGND

T_ON

R_ON

STCTR

7

S_EN

8

15

12 13 14

16

9

10 11

Receive

balun

V

CC

λ/4

C

10 nF

DATAM

MDB184

Fig.6 Application diagram.

2003 Jul 04

16

Philips Semiconductors

Objective speciﬁcation

Bluetooth RF transceiver

UAA3559HN

PACKAGE OUTLINE

HVQFN32: plastic thermal enhanced very thin quad flat package; no leads;

32 terminals; body 5 x 5 x 0.85 mm

SOT617-1

B

A

D

terminal 1

index area

A

1

E

c

detail X

C

e

1

y

e

1/2 e

v

M

b

C

A B

C

1

w M

9

16

L

17

8

e

2

E

h

1/2 e

1

24

terminal 1

index area

32

25

X

D

h

0

2.5

5 mm

scale

DIMENSIONS (mm are the original dimensions)

(1)

A

(1)

UNIT

A

b

c

E

e

2

y

D

E

L

v

w

y

1

h

1

h

max.

0.05 0.30

0.00 0.18

5.1

4.9

3.25

2.95

5.1

4.9

3.25

2.95

0.5

0.3

mm

0.05 0.1

1

0.2

0.5

3.5

0.1

0.05

Note

1. Plastic or metal protrusions of 0.075 mm maximum per side are not included.

REFERENCES

OUTLINE

EUROPEAN

PROJECTION

ISSUE DATE

VERSION

IEC

JEDEC

JEITA

01-08-08

02-10-18

SOT617-1

- - -

MO-220

- - -

2003 Jul 04

17

Philips Semiconductors

Objective speciﬁcation

Bluetooth RF transceiver

UAA3559HN

SOLDERING

To overcome these problems the double-wave soldering

method was specifically developed.

Introduction to soldering surface mount packages

If wave soldering is used the following conditions must be

observed for optimal results:

This text gives a very brief insight to a complex technology.

A more in-depth account of soldering ICs can be found in

our “Data Handbook IC26; Integrated Circuit Packages”

(document order number 9398 652 90011).

• Use a double-wave soldering method comprising a

turbulent wave with high upward pressure followed by a

smooth laminar wave.

There is no soldering method that is ideal for all surface

mount IC packages. Wave soldering can still be used for

certain surface mount ICs, but it is not suitable for fine pitch

SMDs. In these situations reflow soldering is

recommended.

• For packages with leads on two sides and a pitch (e):

– larger than or equal to 1.27 mm, the footprint

longitudinal axis is preferred to be parallel to the

transport direction of the printed-circuit board;

– smaller than 1.27 mm, the footprint longitudinal axis

must be parallel to the transport direction of the

printed-circuit board.

Reﬂow soldering

Reflow soldering requires solder paste (a suspension of

fine solder particles, flux and binding agent) to be applied

to the printed-circuit board by screen printing, stencilling or

pressure-syringe dispensing before package placement.

Driven by legislation and environmental forces the

The footprint must incorporate solder thieves at the

downstream end.

• For packages with leads on four sides, the footprint must

be placed at a 45° angle to the transport direction of the

printed-circuit board. The footprint must incorporate

solder thieves downstream and at the side corners.

worldwide use of lead-free solder pastes is increasing.

Several methods exist for reflowing; for example,

convection or convection/infrared heating in a conveyor

type oven. Throughput times (preheating, soldering and

cooling) vary between 100 and 200 seconds depending

on heating method.

During placement and before soldering, the package must

be fixed with a droplet of adhesive. The adhesive can be

applied by screen printing, pin transfer or syringe

dispensing. The package can be soldered after the

adhesive is cured.

Typical reflow peak temperatures range from

215 to 270 °C depending on solder paste material. The

top-surface temperature of the packages should

preferably be kept:

Typical dwell time of the leads in the wave ranges from

3 to 4 seconds at 250 °C or 265 °C, depending on solder

material applied, SnPb or Pb-free respectively.

• below 220 °C (SnPb process) or below 245 °C (Pb-free

process)

A mildly-activated flux will eliminate the need for removal

of corrosive residues in most applications.

– for all BGA and SSOP-T packages

Manual soldering

– for packages with a thickness ≥ 2.5 mm

– for packages with a thickness < 2.5 mm and a

Fix the component by first soldering two

diagonally-opposite end leads. Use a low voltage (24 V or

less) soldering iron applied to the flat part of the lead.

Contact time must be limited to 10 seconds at up to

300 °C.

volume ≥ 350 mm³so called thick/large packages.

• below 235 °C (SnPb process) or below 260 °C (Pb-free

process) for packages with a thickness < 2.5 mm and a

volume < 350 mm³so called small/thin packages.

When using a dedicated tool, all other leads can be

soldered in one operation within 2 to 5 seconds between

270 and 320 °C.

Moisture sensitivity precautions, as indicated on packing,

must be respected at all times.

Wave soldering

Conventional single wave soldering is not recommended

for surface mount devices (SMDs) or printed-circuit boards

with a high component density, as solder bridging and

non-wetting can present major problems.

2003 Jul 04

18

Philips Semiconductors

Objective speciﬁcation

Bluetooth RF transceiver

UAA3559HN

Suitability of surface mount IC packages for wave and reﬂow soldering methods

SOLDERING METHOD

PACKAGE⁽¹⁾

WAVE

not suitable

REFLOW⁽²⁾

BGA, LBGA, LFBGA, SQFP, SSOP-T⁽³⁾, TFBGA, VFBGA

suitable

DHVQFN, HBCC, HBGA, HLQFP, HSQFP, HSOP, HTQFP,

HTSSOP, HVQFN, HVSON, SMS

not suitable⁽⁴⁾

PLCC⁽⁵⁾, SO, SOJ

suitable

LQFP, QFP, TQFP

not recommended⁽⁵⁾⁽⁶⁾suitable

not recommended⁽⁷⁾

suitable

SSOP, TSSOP, VSO, VSSOP

Notes

1. For more detailed information on the BGA packages refer to the “(LF)BGA Application Note” (AN01026); order a copy

from your Philips Semiconductors sales office.

2. All surface mount (SMD) packages are moisture sensitive. Depending upon the moisture content, the maximum

temperature (with respect to time) and body size of the package, there is a risk that internal or external package

cracks may occur due to vaporization of the moisture in them (the so called popcorn effect). For details, refer to the

Drypack information in the “Data Handbook IC26; Integrated Circuit Packages; Section: Packing Methods”.

3. These transparent plastic packages are extremely sensitive to reflow soldering conditions and must on no account

be processed through more than one soldering cycle or subjected to infrared reflow soldering with peak temperature

exceeding 217 °C ± 10 °C measured in the atmosphere of the reflow oven. The package body peak temperature

must be kept as low as possible.

4. These packages are not suitable for wave soldering. On versions with the heatsink on the bottom side, the solder

cannot penetrate between the printed-circuit board and the heatsink. On versions with the heatsink on the top side,

the solder might be deposited on the heatsink surface.

5. If wave soldering is considered, then the package must be placed at a 45° angle to the solder wave direction.

The package footprint must incorporate solder thieves downstream and at the side corners.

6. Wave soldering is suitable for LQFP, TQFP and QFP packages with a pitch (e) larger than 0.8 mm; it is definitely not

suitable for packages with a pitch (e) equal to or smaller than 0.65 mm.

7. Wave soldering is suitable for SSOP, TSSOP, VSO and VSSOP packages with a pitch (e) equal to or larger than

0.65 mm; it is definitely not suitable for packages with a pitch (e) equal to or smaller than 0.5 mm.

2003 Jul 04

19

Philips Semiconductors

Objective speciﬁcation

Bluetooth RF transceiver

UAA3559HN

DATA SHEET STATUS

DATA SHEET

STATUS⁽¹⁾

PRODUCT

STATUS⁽²⁾⁽³⁾

LEVEL

DEFINITION

I

Objective data

Development This data sheet contains data from the objective speciﬁcation for product

development. Philips Semiconductors reserves the right to change the

speciﬁcation in any manner without notice.

II

Preliminary data Qualiﬁcation

This data sheet contains data from the preliminary speciﬁcation.

Supplementary data will be published at a later date. Philips

Semiconductors reserves the right to change the speciﬁcation without

notice, in order to improve the design and supply the best possible

product.

III

Product data

Production

This data sheet contains data from the product speciﬁcation. Philips

Semiconductors reserves the right to make changes at any time in order

to improve the design, manufacturing and supply. Relevant changes will

be communicated via a Customer Product/Process Change Notiﬁcation

(CPCN).

Notes

1. Please consult the most recently issued data sheet before initiating or completing a design.

2. The product status of the device(s) described in this data sheet may have changed since this data sheet was

published. The latest information is available on the Internet at URL http://www.semiconductors.philips.com.

3. For data sheets describing multiple type numbers, the highest-level product status determines the data sheet status.

DEFINITIONS

DISCLAIMERS

Short-form specification

The data in a short-form

Life support applications

These products are not

specification is extracted from a full data sheet with the

same type number and title. For detailed information see

the relevant data sheet or data handbook.

designed for use in life support appliances, devices, or

systems where malfunction of these products can

reasonably be expected to result in personal injury. Philips

Semiconductors customers using or selling these products

for use in such applications do so at their own risk and

agree to fully indemnify Philips Semiconductors for any

damages resulting from such application.

Limiting values definition Limiting values given are in

accordance with the Absolute Maximum Rating System

(IEC 60134). Stress above one or more of the limiting

values may cause permanent damage to the device.

These are stress ratings only and operation of the device

at these or at any other conditions above those given in the

Characteristics sections of the specification is not implied.

Exposure to limiting values for extended periods may

affect device reliability.

Right to make changes

Philips Semiconductors

reserves the right to make changes in the products -

including circuits, standard cells, and/or software -

described or contained herein in order to improve design

and/or performance. When the product is in full production

(status ‘Production’), relevant changes will be

Application information

Applications that are

communicated via a Customer Product/Process Change

Notification (CPCN). Philips Semiconductors assumes no

responsibility or liability for the use of any of these

products, conveys no licence or title under any patent,

copyright, or mask work right to these products, and

makes no representations or warranties that these

products are free from patent, copyright, or mask work

right infringement, unless otherwise specified.

described herein for any of these products are for

illustrative purposes only. Philips Semiconductors make

no representation or warranty that such applications will be

suitable for the specified use without further testing or

modification.

2003 Jul 04

20

Philips Semiconductors – a worldwide company

Contact information

For additional information please visit http://www.semiconductors.philips.com.

Fax: +31 40 27 24825

For sales ofﬁces addresses send e-mail to: sales.addresses@www.semiconductors.philips.com.

SCA75

All rights are reserved. Reproduction in whole or in part is prohibited without the prior written consent of the copyright owner.

The information presented in this document does not form part of any quotation or contract, is believed to be accurate and reliable and may be changed

without notice. No liability will be accepted by the publisher for any consequence of its use. Publication thereof does not convey nor imply any license

under patent- or other industrial or intellectual property rights.

Printed in The Netherlands

403506/01/pp21

Date of release: 2003 Jul 04

Document order number: 9397 750 10911


型号：	UAA3559HN
厂家：	NXP
描述：	IC SPECIALTY TELECOM CIRCUIT, PQCC32, 5 X 5 MM, 0.85 MM HEIGHT, PLASTIC, SOT-617-1, MO-220, HVQFN-32, Telecom IC:Other 电信信息通信管理电信集成电路
文件：	总21页 (文件大小：97K)
中文：	中文翻译
下载：	下载PDF数据表文档文件

UAA3559HN [NXP]

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