Z0103MA_11 [NXP]
Logic level four-quadrant triac; 逻辑电平四象限三端双向可控硅
| 型号： | Z0103MA_11 |
| 厂家： | 
NXP |
| 描述： | Logic level four-quadrant triac |
| 文件： | 总13页 (文件大小：671K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
Z0103MA
2
9
-
TO
4Q Triac
Rev. 4 — 18 March 2011
Product data sheet
1. Product profile
1.1 General description
Planar passivated very sensitive gate four quadrant triac in a SOT54 (TO-92) plastic
package intended for use in applications requiring direct interfacing to logic ICs and low
power gate drivers.
1.2 Features and benefits
Direct interfacing to logic level ICs
Planar passivated for voltage
ruggedness and reliability
Direct interfacing to low power gate
drive circuits
Triggering in all four quadrants
High blocking voltage capability
Very sensitive gate in four quadrants
1.3 Applications
General purpose low power motor
Industrial process control
control
Low power AC Fan controllers
Home appliances
1.4 Quick reference data
Table 1.
Symbol
VDRM
Quick reference data
Parameter
Conditions
Min Typ Max Unit
repetitive peak
off-state voltage
-
-
600
V
ITSM
non-repetitive
peak on-state
current
full sine wave; Tj(init) = 25 °C;
tp = 20 ms; see Figure 4;
see Figure 5
-
-
8
A
IT(RMS)
RMS on-state
current
full sine wave; Tlead ≤ 45 °C;
see Figure 3; see Figure 1;
see Figure 2
-
-
1
A
Z0103MA
NXP Semiconductors
4Q Triac
Table 1.
Symbol
Static characteristics
Quick reference data …continued
Parameter
Conditions
Min Typ Max Unit
IGT
gate trigger
current
VD = 12 V; IT = 0.1 A; T2+ G+;
Tj = 25 °C; see Figure 7
-
-
-
-
-
-
-
-
3
3
3
5
mA
mA
mA
mA
VD = 12 V; IT = 0.1 A; T2+ G-;
Tj = 25 °C; see Figure 7
VD = 12 V; IT = 0.1 A; T2- G-;
Tj = 25 °C; see Figure 7
VD = 12 V; IT = 0.1 A; T2- G+;
Tj = 25 °C; see Figure 7
2. Pinning information
Table 2.
Pinning information
Symbol Description
Pin
1
Simplified outline
Graphic symbol
T2
G
main terminal 2
gate
T2
T1
G
2
3
T1
main terminal 1
sym051
3 2 1
SOT54 (TO-92)
3. Ordering information
Table 3.
Ordering information
Type number
Package
Name
Description
Version
Z0103MA
TO-92
plastic single-ended leaded (through hole) package; 3 leads
SOT54
Z0103MA
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Product data sheet
Rev. 4 — 18 March 2011
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NXP Semiconductors
4Q Triac
4. Limiting values
Table 4.
Limiting values
In accordance with the Absolute Maximum Rating System (IEC 60134).
Symbol
VDRM
Parameter
Conditions
Min
Max
600
1
Unit
V
repetitive peak off-state voltage
RMS on-state current
-
-
IT(RMS)
full sine wave; Tlead ≤ 45 °C;
A
see Figure 3; see Figure 1; see Figure 2
ITSM
non-repetitive peak on-state
current
full sine wave; Tj(init) = 25 °C;
tp = 20 ms; see Figure 4; see Figure 5
-
-
8
A
A
full sine wave; Tj(init) = 25 °C;
tp = 16.7 ms
8.5
I2t
I2t for fusing
tp = 10 ms; sine-wave pulse
-
-
0.32
50
A2s
dIT/dt
rate of rise of on-state current
IT = 1 A; IG = 20 mA; dIG/dt = 0.1 A/µs;
T2+ G+
A/µs
IT = 1 A; IG = 20 mA; dIG/dt = 0.1 A/µs;
T2+ G-
-
-
-
50
50
20
A/µs
A/µs
A/µs
IT = 1 A; IG = 20 mA; dIG/dt = 0.1 A/µs;
T2- G-
IT = 1 A; IG = 20 mA; dIG/dt = 0.1 A/µs;
T2- G+
IGM
peak gate current
peak gate power
-
1
A
PGM
PG(AV)
Tstg
Tj
-
2
W
W
°C
°C
average gate power
storage temperature
junction temperature
over any 20 ms period
-
0.1
150
125
-40
-
003aac264
003aaf977
1.2
16
I
T(RMS)
(A)
I
T(RMS )
(A)
12
8
0.8
0.4
0
4
0
-2
-1
-50
0
50
100
150
( C)
10
10
1
10
T
surge duration (s)
°
lead
Fig 1. RMS on-state current as a function of lead
temperature; maximum values
Fig 2. RMS on-state current as a function of surge
duration; maximum values
Z0103MA
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© NXP B.V. 2011. All rights reserved.
Product data sheet
Rev. 4 — 18 March 2011
3 of 13
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NXP Semiconductors
4Q Triac
003aac259
2.0
conduction form
P
(W)
tot
angle
factor
a
(degrees)
1.6
1.2
0.8
0.4
0.0
30
60
90
120
180
4
2.8
2.2
1.9
1.57
°
a = 180
Ω
°
120
°
90
°
60
°
30
0
0.2
0.4
0.6
0.8
1
1.2
I
(A)
T(RMS )
Fig 3. Total power dissipation as a function of RMS on-state current; maximum values
003aad318
10
I
TSM
(A)
8
6
4
2
0
I
I
TSM
T
t
1/f
T
= 25 °C max
j(init)
2
3
1
10
10
10
number of cycles
Fig 4. Non-repetitive peak on-state current as a function of the number of sinusoidal current cycles; maximum
values
Z0103MA
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© NXP B.V. 2011. All rights reserved.
Product data sheet
Rev. 4 — 18 March 2011
4 of 13
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NXP Semiconductors
4Q Triac
003aad319
3
10
I
I
T
TSM
I
TS M
(A)
t
t
p
2
10
T
j(init)
= 25 °C max
(1)
(2)
10
1
-5
-4
-3
-2
-1
10
10
10
10
10
t
(s)
p
Fig 5. Non-repetitive peak on-state current as a function of pulse width; maximum values
5. Thermal characteristics
Table 5.
Symbol
Rth(j-lead)
Thermal characteristics
Parameter
Conditions
Min
Typ
Max
Unit
thermal resistance
full cycle; see Figure 6
-
-
60
K/W
from junction to lead
Rth(j-a)
thermal resistance
from junction to
ambient
full cycle; printed circuit board mounted;
lead length = 4 mm
-
150
-
K/W
003aac206
2
10
Z
th(j-lead)
(K/W)
10
1
P
1
-1
10
t
t
p
-2
10
-5
-4
-3
-2
-1
10
10
10
10
10
10
t
(s)
p
Fig 6. Transient thermal impedance from junction to lead as a function of pulse width
Z0103MA
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© NXP B.V. 2011. All rights reserved.
Product data sheet
Rev. 4 — 18 March 2011
5 of 13
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NXP Semiconductors
4Q Triac
6. Characteristics
Table 6.
Symbol
Characteristics
Parameter
Conditions
Min
Typ
Max
Unit
Static characteristics
IGT gate trigger current
VD = 12 V; IT = 0.1 A; T2+ G+;
Tj = 25 °C; see Figure 7
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
3
mA
mA
mA
mA
mA
mA
mA
mA
VD = 12 V; IT = 0.1 A; T2+ G-;
Tj = 25 °C; see Figure 7
3
VD = 12 V; IT = 0.1 A; T2- G-;
Tj = 25 °C; see Figure 7
3
VD = 12 V; IT = 0.1 A; T2- G+;
Tj = 25 °C; see Figure 7
5
IL
latching current
VD = 12 V; IG = 0.1 A; T2+ G+;
Tj = 25 °C; see Figure 8
7
VD = 12 V; IG = 0.1 A; T2+ G-;
Tj = 25 °C; see Figure 8
15
7
VD = 12 V; IG = 0.1 A; T2- G-;
Tj = 25 °C; see Figure 8
VD = 12 V; IG = 0.1 A; T2- G+;
Tj = 25 °C; see Figure 8
7
IH
holding current
VD = 12 V; Tj = 25 °C; see Figure 9
IT = 1.4 A; Tj = 25 °C; see Figure 10
-
-
-
-
7
mA
V
VT
VGT
on-state voltage
gate trigger voltage
1.3
-
1.6
1.3
VD = 12 V; IT = 0.1 A; Tj = 25 °C;
see Figure 11
V
VD = 600 V; IT = 0.1 A; Tj = 125 °C;
see Figure 11
0.2
-
-
-
-
V
ID
off-state current
VD = 600 V; Tj = 125 °C
0.5
mA
Dynamic characteristics
dVD/dt
rate of rise of off-state VDM = 402 V; Tj = 110 °C; exponential
10
-
-
-
-
V/µs
V/µs
voltage
waveform; gate open circuit;
see Figure 12
dVcom/dt
rate of change of
commutating voltage
VD = 400 V; Tj = 110 °C;
dIcom/dt = 0.44 A/ms; IT = 1 A; gate
open circuit
0.5
Z0103MA
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© NXP B.V. 2011. All rights reserved.
Product data sheet
Rev. 4 — 18 March 2011
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NXP Semiconductors
4Q Triac
003aaa205
003aaa203
4
3
I
GT
I
L
I
GT(25°C)
I
L(25°C)
3
(1)
(2)
2
(3)
(4)
2
1
0
1
0
-50
0
50
100
150
-50
0
50
100
150
T (°C)
j
T (°C)
j
(1) T2- G+
(2) T2- G-
(3) T2+ G-
(4) T2+ G+
Fig 7. Normalized gate trigger current as a function of
junction temperature
Fig 8. Normalized latching current as a function of
junction temperature
003aaa204
003aac258
3
2
I
T
I
H
(A)
I
H(25°C)
1.6
2
1.2
0.8
0.4
0
(1)
(2)
(3)
1
0
-50
0
50
100
150
0
0.4
0.8
1.2
1.6
2
V
(V)
T
T (°C)
j
Vo = 1.13 V
Rs = 0.31 Ω
(1) Tj = 125 °C; typical values
(2) Tj = 125 °C; maximum values
(3) Tj = 25 °C; maximum values
Fig 9. Normalized holding current as a function of
junction temperature
Fig 10. On-state current as a function of on-state
voltage
Z0103MA
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© NXP B.V. 2011. All rights reserved.
Product data sheet
Rev. 4 — 18 March 2011
7 of 13
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NXP Semiconductors
4Q Triac
003aaa208
003aaa209
1.6
1.6
1.2
0.8
V
GT
A
V
GT(25°C)
1.2
0.8
0.4
0
0.4
0
0
50
100
150
-50
0
50
100
150
T (°C)
j
T (°C)
j
Fig 11. Normalized gate trigger voltage as a function of
junction temperature
Fig 12. Normalized critical rate of rise of off-state
voltage as a function of junction
temperature;typical values
Z0103MA
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© NXP B.V. 2011. All rights reserved.
Product data sheet
Rev. 4 — 18 March 2011
8 of 13
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NXP Semiconductors
4Q Triac
7. Package outline
Plastic single-ended leaded (through hole) package; 3 leads
SOT54
c
E
d
A
L
b
1
2
e
1
e
D
3
b
1
L
1
0
2.5
5 mm
scale
DIMENSIONS (mm are the original dimensions)
(1)
L
1
UNIT
A
b
b
c
D
d
E
e
e
L
1
1
max.
5.2
5.0
0.48
0.40
0.66
0.55
0.45
0.38
4.8
4.4
1.7
1.4
4.2
3.6
14.5
12.7
mm
2.54
1.27
2.5
Note
1. Terminal dimensions within this zone are uncontrolled to allow for flow of plastic and terminal irregularities.
REFERENCES
OUTLINE
EUROPEAN
PROJECTION
ISSUE DATE
VERSION
IEC
JEDEC
JEITA
04-06-28
04-11-16
SOT54
TO-92
SC-43A
Fig 13. Package outline SOT54 (TO-92)
Z0103MA
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© NXP B.V. 2011. All rights reserved.
Product data sheet
Rev. 4 — 18 March 2011
9 of 13
Z0103MA
NXP Semiconductors
4Q Triac
8. Revision history
Table 7.
Revision history
Document ID
Z0103MA v.4
Modifications:
Z0103MA_3
Release date
Data sheet status
Change notice
Supersedes
20110318
Product data sheet
-
Z0103MA_3
• Various changes to content.
20090805 Product data sheet
-
Z0103_07_09_SERIES-02
Z0103MA
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© NXP B.V. 2011. All rights reserved.
Product data sheet
Rev. 4 — 18 March 2011
10 of 13
Z0103MA
NXP Semiconductors
4Q Triac
9. Legal information
9.1 Data sheet status
Document status [1] [2]
Product status [3]
Development
Definition
Objective [short] data sheet
This document contains data from the objective specification for product development.
This document contains data from the preliminary specification.
This document contains the product specification.
Preliminary [short] data sheet Qualification
Product [short] data sheet Production
[1]
[2]
[3]
Please consult the most recently issued document before initiating or completing a design.
The term 'short data sheet' is explained in section "Definitions".
The product status of device(s) described in this document may have changed since this document was published and may differ in case of multiple devices. The latest product
status information is available on the Internet at URL http://www.nxp.com.
Suitability for use — NXP Semiconductors products are not designed,
9.2 Definitions
authorized or warranted to be suitable for use in life support, life-critical or
safety-critical systems or equipment, nor in applications where failure or
malfunction of an NXP Semiconductors product can reasonably be expected
to result in personal injury, death or severe property or environmental
damage. NXP Semiconductors accepts no liability for inclusion and/or use of
NXP Semiconductors products in such equipment or applications and
therefore such inclusion and/or use is at the customer’s own risk.
Draft — The document is a draft version only. The content is still under
internal review and subject to formal approval, which may result in
modifications or additions. NXP Semiconductors does not give any
representations or warranties as to the accuracy or completeness of
information included herein and shall have no liability for the consequences of
use of such information.
Quick reference data — The Quick reference data is an extract of the
product data given in the Limiting values and Characteristics sections of this
document, and as such is not complete, exhaustive or legally binding.
Short data sheet — A short data sheet is an extract from a full data sheet
with the same product type number(s) and title. A short data sheet is intended
for quick reference only and should not be relied upon to contain detailed and
full information. For detailed and full information see the relevant full data
sheet, which is available on request via the local NXP Semiconductors sales
office. In case of any inconsistency or conflict with the short data sheet, the
full data sheet shall prevail.
Applications — Applications that are described herein for any of these
products are for illustrative purposes only. NXP Semiconductors makes no
representation or warranty that such applications will be suitable for the
specified use without further testing or modification.
Product specification — The information and data provided in a Product
data sheet shall define the specification of the product as agreed between
NXP Semiconductors and its customer, unless NXP Semiconductors and
customer have explicitly agreed otherwise in writing. In no event however,
shall an agreement be valid in which the NXP Semiconductors product is
deemed to offer functions and qualities beyond those described in the
Product data sheet.
Customers are responsible for the design and operation of their applications
and products using NXP Semiconductors products, and NXP Semiconductors
accepts no liability for any assistance with applications or customer product
design. It is customer’s sole responsibility to determine whether the NXP
Semiconductors product is suitable and fit for the customer’s applications and
products planned, as well as for the planned application and use of
customer’s third party customer(s). Customers should provide appropriate
design and operating safeguards to minimize the risks associated with their
applications and products.
9.3 Disclaimers
Limited warranty and liability — Information in this document is believed to
be accurate and reliable. However, NXP Semiconductors does not give any
representations or warranties, expressed or implied, as to the accuracy or
completeness of such information and shall have no liability for the
consequences of use of such information.
NXP Semiconductors does not accept any liability related to any default,
damage, costs or problem which is based on any weakness or default in the
customer’s applications or products, or the application or use by customer’s
third party customer(s). Customer is responsible for doing all necessary
testing for the customer’s applications and products using NXP
Semiconductors products in order to avoid a default of the applications and
the products or of the application or use by customer’s third party
customer(s). NXP does not accept any liability in this respect.
In no event shall NXP Semiconductors be liable for any indirect, incidental,
punitive, special or consequential damages (including - without limitation - lost
profits, lost savings, business interruption, costs related to the removal or
replacement of any products or rework charges) whether or not such
damages are based on tort (including negligence), warranty, breach of
contract or any other legal theory.
Limiting values — Stress above one or more limiting values (as defined in
the Absolute Maximum Ratings System of IEC 60134) will cause permanent
damage to the device. Limiting values are stress ratings only and (proper)
operation of the device at these or any other conditions above those given in
the Recommended operating conditions section (if present) or the
Characteristics sections of this document is not warranted. Constant or
repeated exposure to limiting values will permanently and irreversibly affect
the quality and reliability of the device.
Notwithstanding any damages that customer might incur for any reason
whatsoever, NXP Semiconductors’ aggregate and cumulative liability towards
customer for the products described herein shall be limited in accordance
with the Terms and conditions of commercial sale of NXP Semiconductors.
Right to make changes — NXP Semiconductors reserves the right to make
changes to information published in this document, including without
limitation specifications and product descriptions, at any time and without
notice. This document supersedes and replaces all information supplied prior
to the publication hereof.
Terms and conditions of commercial sale — NXP Semiconductors
products are sold subject to the general terms and conditions of commercial
sale, as published at http://www.nxp.com/profile/terms, unless otherwise
agreed in a valid written individual agreement. In case an individual
agreement is concluded only the terms and conditions of the respective
Z0103MA
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© NXP B.V. 2011. All rights reserved.
Product data sheet
Rev. 4 — 18 March 2011
11 of 13
Z0103MA
NXP Semiconductors
4Q Triac
agreement shall apply. NXP Semiconductors hereby expressly objects to
applying the customer’s general terms and conditions with regard to the
purchase of NXP Semiconductors products by customer.
product for such automotive applications, use and specifications, and (b)
whenever customer uses the product for automotive applications beyond
NXP Semiconductors’ specifications such use shall be solely at customer’s
own risk, and (c) customer fully indemnifies NXP Semiconductors for any
liability, damages or failed product claims resulting from customer design and
use of the product for automotive applications beyond NXP Semiconductors’
standard warranty and NXP Semiconductors’ product specifications.
No offer to sell or license — Nothing in this document may be interpreted or
construed as an offer to sell products that is open for acceptance or the grant,
conveyance or implication of any license under any copyrights, patents or
other industrial or intellectual property rights.
Export control — This document as well as the item(s) described herein may
be subject to export control regulations. Export might require a prior
authorization from national authorities.
9.4 Trademarks
Notice: All referenced brands, product names, service names and trademarks
are the property of their respective owners.
Non-automotive qualified products — Unless this data sheet expressly
states that this specific NXP Semiconductors product is automotive qualified,
the product is not suitable for automotive use. It is neither qualified nor tested
in accordance with automotive testing or application requirements. NXP
Semiconductors accepts no liability for inclusion and/or use of
Adelante, Bitport, Bitsound, CoolFlux, CoReUse, DESFire, EZ-HV,
FabKey, GreenChip, HiPerSmart, HITAG, I²C-bus logo, ICODE, I-CODE,
ITEC, Labelution, MIFARE, MIFARE Plus, MIFARE Ultralight, MoReUse,
QLPAK, Silicon Tuner, SiliconMAX, SmartXA, STARplug, TOPFET,
TrenchMOS, TriMedia and UCODE — are trademarks of NXP B.V.
non-automotive qualified products in automotive equipment or applications.
HD Radio and HD Radio logo — are trademarks of iBiquity Digital
Corporation.
In the event that customer uses the product for design-in and use in
automotive applications to automotive specifications and standards, customer
(a) shall use the product without NXP Semiconductors’ warranty of the
10. Contact information
For more information, please visit: http://www.nxp.com
For sales office addresses, please send an email to: salesaddresses@nxp.com
Z0103MA
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© NXP B.V. 2011. All rights reserved.
Product data sheet
Rev. 4 — 18 March 2011
12 of 13
Z0103MA
NXP Semiconductors
4Q Triac
11. Contents
1
Product profile . . . . . . . . . . . . . . . . . . . . . . . . . . .1
1.1
1.2
1.3
1.4
General description . . . . . . . . . . . . . . . . . . . . . .1
Features and benefits. . . . . . . . . . . . . . . . . . . . .1
Applications . . . . . . . . . . . . . . . . . . . . . . . . . . . .1
Quick reference data . . . . . . . . . . . . . . . . . . . . .1
2
3
4
5
6
7
8
Pinning information. . . . . . . . . . . . . . . . . . . . . . .2
Ordering information. . . . . . . . . . . . . . . . . . . . . .2
Limiting values. . . . . . . . . . . . . . . . . . . . . . . . . . .3
Thermal characteristics . . . . . . . . . . . . . . . . . . .5
Characteristics. . . . . . . . . . . . . . . . . . . . . . . . . . .6
Package outline . . . . . . . . . . . . . . . . . . . . . . . . . .9
Revision history. . . . . . . . . . . . . . . . . . . . . . . . .10
9
Legal information. . . . . . . . . . . . . . . . . . . . . . . .11
Data sheet status . . . . . . . . . . . . . . . . . . . . . . .11
Definitions. . . . . . . . . . . . . . . . . . . . . . . . . . . . .11
Disclaimers. . . . . . . . . . . . . . . . . . . . . . . . . . . .11
Trademarks. . . . . . . . . . . . . . . . . . . . . . . . . . . .12
9.1
9.2
9.3
9.4
10
Contact information. . . . . . . . . . . . . . . . . . . . . .12
Please be aware that important notices concerning this document and the product(s)
described herein, have been included in section ‘Legal information’.
© NXP B.V. 2011.
All rights reserved.
For more information, please visit: http://www.nxp.com
For sales office addresses, please send an email to: salesaddresses@nxp.com
Date of release: 18 March 2011
Document identifier: Z0103MA
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Sensitive Gate Triac Series Silicon Bidirectional ThyristorsWarning: Undefined variable $rtag in /www/wwwroot/website_ic37/www.icpdf.com/pdf/pdf/index.php on line 217
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ONSEMI
Z0103MN,135
Logic level four-quadrant triacWarning: Undefined variable $rtag in /www/wwwroot/website_ic37/www.icpdf.com/pdf/pdf/index.php on line 217
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NXP
Z0103MN/1AA2
TRIAC|600V V(DRM)|1A I(T)RMS|SOT-223Warning: Undefined variable $rtag in /www/wwwroot/website_ic37/www.icpdf.com/pdf/pdf/index.php on line 217
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ETC
Z0103MN/2AL2
TRIAC|600V V(DRM)|1A I(T)RMS|SOT-223Warning: Undefined variable $rtag in /www/wwwroot/website_ic37/www.icpdf.com/pdf/pdf/index.php on line 217
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ETC
Z0103MN/5AA4
TRIAC|600V V(DRM)|1A I(T)RMS|SOT-223Warning: Undefined variable $rtag in /www/wwwroot/website_ic37/www.icpdf.com/pdf/pdf/index.php on line 217
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ETC
Z0103MN/T3
Logic level four-quadrant triacWarning: Undefined variable $rtag in /www/wwwroot/website_ic37/www.icpdf.com/pdf/pdf/index.php on line 217
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NXP
Z0103MN0
4Q Triac Direct interfacing to logic level ICsWarning: Undefined variable $rtag in /www/wwwroot/website_ic37/www.icpdf.com/pdf/pdf/index.php on line 217
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NXP
Z0103MN0,135
4Q Triac Direct interfacing to logic level ICsWarning: Undefined variable $rtag in /www/wwwroot/website_ic37/www.icpdf.com/pdf/pdf/index.php on line 217
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NXP
Z0103MN0135
4Q Triac Direct interfacing to logic level ICsWarning: Undefined variable $rtag in /www/wwwroot/website_ic37/www.icpdf.com/pdf/pdf/index.php on line 217
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NXP
Z0103MN1AA2
1A TRIACSWarning: Undefined variable $rtag in /www/wwwroot/website_ic37/www.icpdf.com/pdf/pdf/index.php on line 217
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STMICROELECTR
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