MSM63188A-XXX [OKI]
Microcontroller, 4-Bit, MROM, 2MHz, CMOS, 6.60 X 6.60 MM, 0.35 MM HEIGHT, DIE-159;
| 型号： | MSM63188A-XXX |
| 厂家： | 
OKI ELECTRONIC COMPONETS |
| 描述： | Microcontroller, 4-Bit, MROM, 2MHz, CMOS, 6.60 X 6.60 MM, 0.35 MM HEIGHT, DIE-159 驱动器 微控制器 CD |
| 文件： | 总33页 (文件大小：300K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
E2E0056-19-62
This version: Jun. 1999
¡ Semiconductor
MSM63188A
4-Bit Microcontroller with Built-in 1024-Dot Matrix LCD Drivers and Melody Circuit,
Operating at 0.9 V (Min.)
GENERAL DESCRIPTION
The MSM63188A is an enhanced version of the MSM63188 in which supply currents have been
improved.
The MSM63188A is a CMOS 4-bit microcontroller with built-in 1024-dot matrix LCD drivers and
operates at 0.9 V (min.). The MSM63188A is suitable for applications such as games, toys,
watches, etc. which are provided with an LCD display.
The MSM63188A is an M6318x series mask ROM-version product of OLMS-63K family, which
employs Oki's original CPU core nX-4/250.
The MSM63P180 is the one-time-programmable ROM version of MSM63188/A, having one-time
PROM (OTP) as internal program memory.
The MSM63P180 is used to evaluate the software development.
FEATURES
• Rich instruction set
439 instructions
Transfer,rotate,increment/decrement,arithmeticoperations,comparison,logicoperations,
mask operations, bit operations, ROM table reference, external memory transfer, stack
operations, flag operations, branch, conditional branch, call/return, control.
• Rich selection of addressing modes
Indirect addressing of four data memory types, with current bank register, extra bank
register, HL register and XY register.
Data memory bank internal direct addressing mode.
• Processing speed
Two clocks per machine cycle, with most instructions executed in one machine cycle.
Minimum instruction execution time : 61 ms (@ 32.768 kHz system clock)
1 ms (@ 2 MHz system clock)
• Clock generation circuit
Low-speed clock
High-speed clock
: 32.768 kHz crystal oscillator
: 2 MHz (Max.) RC or ceramic oscillator select
• Program memory space
16K words
Basic instruction length is 16 bits/1 word
• Data memory space
3584 nibbles
• External data memory space
64 Kbytes (expandable by using an I/O port)
1/32
¡ Semiconductor
MSM63188A
• Stack level
Call stack level
Register stack level
: 16 levels
: 16 levels
• I/O ports
Input ports: Selectable as input with pull-up resistance/input with pull-down resistance/
high-impedance input
Output ports: Selectable as P-channel open drain output/N-channel open drain output/
CMOS output/high-impedance output
Input-output ports: Selectable as input with pull-up resistance/input with pull-down
resistance/high-impedance input
Selectable as P-channel open drain output/N-channel open drain
output/CMOS output/high-impedance output
Canbeinterfacedwithexternalperipheralsthatuseadifferentpowersupplythanthisdevice
uses.
Number of ports:
Input port
Output port
Input-output port
: 2 ports ¥ 4 bits
: 6 ports ¥ 4 bits
: 6 ports ¥ 4 bits
• Melody output function
Melody sound frequency
Tone length
: 529 to 2979 Hz
: 63 types
Tempo
: 15 types
Note data
Buzzer drive signal output
: Resides in the program memory
: 4 kHz
• LCD driver
Number of segments
1/1 to 1/16 duty
: 1024 Max. (64 SEG ¥ 16 COM)
1/4 or 1/5 bias (regulator built-in)
Selectable as all-on mode/all-off mode/power down mode/normal display mode
Adjustable contrast
• Multiplier/divider circuits
Multiplier : (8 bits) ¥ (8 bits) Æ Product (16 bits)
Divider
: (16 bits) ÷ (8 bits) Æ Quotient (16 bits), Remainder (8 bits)
• Reset function
Reset through RESET pin
Power-on reset
Reset by low-speed oscillation halt
• Battery check
Low-voltage supply check
Criterion voltage
: Can be selected as 1.05 ±0.10 V, 1.30 ±0.15 V,
2.20 ±0.20 V or 2.80 ±0.30 V
• Power supply backup
Backup circuit (voltage multiplier) enables operation at 0.9 V minimum
2/32
¡ Semiconductor
MSM63188A
• Timers and counter
8-bit timer ¥ 4
Selectable as auto-reload mode/capture mode/clock frequency measurement mode
Watchdog timer ¥ 1
Overflows in 2 sec.
100 Hz timer ¥ 1
Measurable in steps of 1/100 sec.
15-bit time base counter ¥ 1
1, 2, 4, 8, 16, 32, 64, and 128 Hz signals can be read
• Serial port
Mode
: UART mode, synchronous mode
UART communication speed
Clock frequency in synchronous mode
: 1200 bps, 2400 bps, 4800 bps, 9600 bps
: 32.768 kHz (internal clock mode), external
clock frequency
Data length
: 5 to 8 bits
• Interrupt sources
External interrupt
Internal interrupt
: 4
: 13 (watchdog timer interrupt is a nonmask-
able interrupt)
• Operating voltage
When backup used
: 0.9 to 2.7 V
(Low-speed clock operating)
1.2 to 2.7 V
(Operating frequency: 300 to 500 kHz)
1.5 to 2.7 V
(Operating frequency: 200 kHz to 1 MHz)
: 1.8 to 5.5 V
When backup not used
(Operating frequency: 300 to 500 kHz)
2.2 to 5.5 V
(Operating frequency: 300 kHz to 1 MHz)
2.7 to 5.5 V
(Operating frequency: 200 kHz to 2 MHz)
• Package:
176-pin plastic LQFP (LQFP176-P-2424-0.50-BK) : (Product name: MSM63188A-xxxGS-BK)
Chip
: (Product name: MSM63188A-xxx)
xxx indicates a code number.
Differences Between the MSM63188 and the MSM63188A
The MSM63188A has the following improved characteristics.
• Supply currents (I
, I
, I
) in DC characteristics
DD1 DD2 DD3
• The V
voltage during a halt of high-speed clock oscillation
DDL
3/32
¡ Semiconductor
MSM63188A
BLOCK DIAGRAM
An asterisk (*) indicates the port secondary function.
to the circuits corresponding to the signal names inside
interface).
indicates that the power is supplied
from V
(power supply for
DDI
nX-4/250
H
X
L
CBR
EBR
RA
PC
TIMING
CON-
ROM
16KW
TROL
Y
A
G
C
Z
SP
BUS
D0-7*
ALU
EXTMEM
CON-
TROL
RSP
MIE
A0-15*
RD*
WR*
INSTRUCTION
DECODER
STACK
IR
CAL : 16-level
REG : 16-level
INT
4
TM0CAP/TM1CAP*
TM0OVF/TM1OVF*
T02CK*
TIMER
8bit ¥ 4
RAM
3584N
T13CK*
INT
2
RXC*
TXC*
RXD*
TXD*
INT188
SIO
INT
1
RESET
RST
MD
MULDIV
MELODY
MDB
INT
1
INT
4
TST1
TST2
TST
P0.0-P0.3
P1.0-P1.3
TBC
BLD
INPUT
PORT
XT0
XT1
P2.0-P2.3
P3.0-P3.3
P4.0-P4.3
P5.0-P5.3
P6.0-P6.3
P7.0-P7.3
OSC0
OSC1
INT
1
OSC
100HzTC
WDT
OUTPUT
PORT
TBCCLK*
HSCLK*
INT
1
V
DDH
P8.0-P8.3
P9.0-P9.3
PA.0-PA.3
PB.0-PB.3
PC.0-PC.3
PD.0-PD.3
V
DD
BACK
UP
CB1
CB2
I/O
PORT
V
DD1
DD2
DD3
DD4
V
V
V
V
INT
3
BIAS
DD5
C1
LCD
&
DSPR
COM1-16
SEG0-63
C2
LCLK*
FRAME*
V
DDL
V
V
DDI
SS
4/32
¡ Semiconductor
MSM63188A
PIN CONFIGURATION (TOP VIEW)
SEG43
SEG42
SEG41
SEG40
SEG39
SEG38
SEG37
SEG36
SEG35
SEG34
SEG33
SEG32
SEG31
SEG30
SEG29
SEG28
SEG27
SEG26
SEG25
SEG24
SEG23
SEG22
SEG21
SEG20
SEG19
SEG18
SEG17
SEG16
SEG15
SEG14
SEG13
SEG12
SEG11
SEG10
SEG9
1
132
131
130
129
128
127
126
125
124
123
122
121
120
119
118
117
116
115
114
113
112
111
110
109
108
107
106
105
104
103
102
101
100
99
P5.0
P5.1
P5.2
P5.3
P6.0
P6.1
P6.2
P6.3
P7.0
P7.1
P7.2
P7.3
P8.0
P8.1
P8.2
P8.3
P9.0
P9.1
P9.2
P9.3
PA.0
PA.1
PA.2
PA.3
PB.0
PB.1
PB.2
PB.3
PC.0
PC.1
PC.2
PC.3
PD.0
PD.1
PD.2
PD.3
(NC)
(NC)
(NC)
(NC)
(NC)
(NC)
(NC)
(NC)
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
98
SEG8
97
SEG7
96
SEG6
95
SEG5
94
SEG4
93
SEG3
92
SEG2
91
SEG1
90
SEG0
89
176-Pin Plastic LQFP
Note: Pins marked as (NC) are no-connection pins which are left open.
5/32
¡ Semiconductor
MSM63188A
PAD CONFIGURATION
Pad Layout
84 SEG0
83 SEG1
82 SEG2
81 SEG3
PD.3 124
PD.2 125
PD.1 126
PD.0 127
PC.3 128
PC.2 129
PC.1 130
PC.0 131
PB.3 132
PB.2 133
PB.1 134
PB.0 135
PA.3 136
PA.2 137
PA.1 138
PA.0 139
P9.3 140
P9.2 141
P9.1 142
P9.0 143
P8.3 144
P8.2 145
P8.1 146
P8.0 147
P7.3 148
P7.2 149
P7.1 150
P7.0 151
P6.3 152
P6.2 153
P6.1 154
P6.0 155
80 SEG4
79 SEG5
78 SEG6
77 SEG7
76 SEG8
75 SEG9
74 SEG10
73 SEG11
72 SEG12
71 SEG13
70 SEG14
69 SEG15
68 SEG16
67 SEG17
66 SEG18
65 SEG19
64 SEG20
63 SEG21
62 SEG22
61 SEG23
60 SEG24
59 SEG25
58 SEG26
57 SEG27
56 SEG28
55 SEG29
54 SEG30
53 SEG31
52 SEG32
51 SEG33
50 SEG34
49 SEG35
48 SEG36
47 SEG37
46 SEG38
45 SEG39
44 SEG40
43 SEG41
42 SEG42
41 SEG43
P5.3 156
P5.2 157
P5.1 158
P5.0 159
Y
X
Chip Size
: 6.60 mm ¥ 6.60 mm
: 350 mm (typ.)
: Chip center
: 100 mm ¥ 100 mm
: 110 mm ¥ 110 mm
: 140 mm
Chip Thickness
Coordinate Origin
Pad Hole Size
Pad Size
Minimum Pad Pitch
Note: The chip substrate voltage is V .
SS
6/32
¡ Semiconductor
MSM63188A
Pad Coordinates
Pad
Name
Pad
Name
Pad
Name
Pad No.
X (µm) Y (µm) Pad No.
X (µm) Y (µm) Pad No.
X (µm) Y (µm)
1
P4.3
P4.2
–2837 –3105
–2697 –3105
–2557 –3105
–2417 –3105
–2277 –3105
–2137 –3105
–1997 –3105
–1857 –3105
–1717 –3105
–1577 –3105
–1437 –3105
–1297 –3105
–1157 –3105
–1017 –3105
–877 –3105
–737 –3105
–597 –3105
–457 –3105
–317 –3105
–177 –3105
54 –3105
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
81
82
SEG42
SEG41
SEG40
SEG39
SEG38
SEG37
SEG36
SEG35
SEG34
SEG33
SEG32
SEG31
SEG30
SEG29
SEG28
SEG27
SEG26
SEG25
SEG24
SEG23
SEG22
SEG21
SEG20
SEG19
SEG18
SEG17
SEG16
SEG15
SEG14
SEG13
SEG12
SEG11
SEG10
SEG9
3155 –2870
3155 –2730
3155 –2590
3155 –2450
3155 –2310
3155 –2170
3155 –2030
3155 –1890
3155 –1750
3155 –1610
3155 –1470
3155 –1330
3155 –1190
3155 –1050
83
84
SEG1
SEG0
COM16
COM15
COM14
COM13
COM12
COM11
COM10
COM9
COM8
COM7
COM6
COM5
COM4
COM3
COM2
COM1
VSS
3155
3155
2705
2565
2425
2285
2145
2005
1865
1725
1585
1445
1305
1165
1025
885
2870
3010
3105
3105
3105
3105
3105
3105
3105
3105
3105
3105
3105
3105
3105
3105
3105
3105
3105
3105
3105
3105
3105
3105
3105
3105
3105
3105
3105
3105
3105
3105
3105
3105
3105
3105
3105
3105
3105
3105
3105
2
3
P4.1
85
4
P4.0
86
5
P3.3
87
6
P3.2
88
7
P3.1
89
8
P3.0
90
9
P2.3
91
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
P2.2
92
P2.1
93
P2.0
94
P1.3
95
P1.2
96
P1.1
3155
3155
3155
3155
3155
3155
3155
3155
3155
3155
3155
3155
3155
3155
3155
3155
3155
3155
3155
3155
3155
3155
3155
3155
3155
3155
3155
–910
–770
–630
–490
–350
–210
–70
97
P1.0
98
P0.3
99
745
P0.2
100
101
102
103
104
105
106
107
108
109
110
111
112
113
114
115
116
117
118
119
120
121
122
123
605
P0.1
420
P0.0
VDD1
270
SEG63
SEG62
SEG61
SEG60
SEG59
SEG58
SEG57
SEG56
SEG55
SEG54
SEG53
SEG52
SEG51
SEG50
SEG49
SEG48
SEG47
SEG46
SEG45
SEG44
SEG43
VDD2
120
194 –3105
70
VDD3
–30
334 –3105
210
VDD4
–179
–329
–479
–629
–779
–929
–1079
–1229
–1379
–1529
–1679
–1829
–1979
–2129
–2324
–2464
–2604
–2744
–2884
474 –3105
350
VDD5
614 –3105
490
C1
754 –3105
630
C2
894 –3105
770
VDDH
CB1
1034 –3105
1174 –3105
1314 –3105
1454 –3105
1594 –3105
1734 –3105
1874 –3105
2014 –3105
2154 –3105
2294 –3105
2434 –3105
2574 –3105
2714 –3105
3155 –3010
910
1050
1190
1330
1470
1610
1750
1890
2030
2170
2310
2450
2590
2730
CB2
VDD
VDDL
OSC1
OSC0
RESET
XT1
SEG8
SEG7
XT0
SEG6
TST2
TST1
MD
SEG5
SEG4
SEG3
MDB
VDDI
SEG2
7/32
¡ Semiconductor
MSM63188A
Pad Coordinates (continued)
Pad
Name
Pad
Name
Pad
Name
Pad No.
X (µm) Y (µm) Pad No.
X (µm) Y (µm) Pad No.
X (µm) Y (µm)
124
125
126
127
128
129
130
131
132
133
134
135
PD.3
PD.2
PD.1
PD.0
PC.3
PC.2
PC.1
PC.0
PB.3
PB.2
PB.1
PB.0
–3155
–3155
–3155
–3155
–3155
–3155
–3155
–3155
–3155
–3155
–3155
–3155
2428
2288
2148
2008
1868
1728
1588
1448
1308
1168
1028
888
136
137
138
139
140
141
142
143
144
145
146
147
PA.3
PA.2
PA.1
PA.0
P9.3
P9.2
P9.1
P9.0
P8.3
P8.2
P8.1
P8.0
–3155
–3155
–3155
–3155
–3155
–3155
–3155
–3155
–3155
–3155
–3155
–3155
748
608
148
149
150
151
152
153
154
155
156
157
158
159
P7.3
P7.2
P7.1
P7.0
P6.3
P6.2
P6.1
P6.0
P5.3
P5.2
P5.1
P5.0
–3155
–932
–3155 –1072
–3155 –1212
–3155 –1352
–3155 –1492
–3155 –1632
–3155 –1772
–3155 –1912
–3155 –2172
–3155 –2312
–3155 –2452
–3155 –2592
468
328
188
48
–92
–232
–372
–512
–652
–792
8/32
¡ Semiconductor
MSM63188A
PIN DESCRIPTIONS
The basic functions of each pin of the MSM63188A are described in Table 1.
A symbol with a slash (/) denotes a pin that has a secondary function.
Refer to Table 2 for secondary functions.
Fortype, "—"denotesapowersupplypin, "I"aninputpin, "O"anoutputpin, and"I/O"aninput-
output pin.
Table 1 Pin Descriptions (Basic Functions)
Function Symbol
Pin
73
62
63
64
65
66
67
68
69
Type
—
Description
VDD
VSS
Positive power supply
Negative power supply
—
VDD1
VDD2
VDD3
VDD4
VDD5
Power supply pins for LCD bias (internally generated).
Capacitors (0.1 mF) should be connected between these pins and
—
VSS.
C1
Power
—
—
Capacitor connection pins for LCD bias generation.
C2
A capacitor (0.1 mF) should be connected between C1 and C2.
Positive power supply pin for external interface
Supply
VDDI
VDDL
VDDH
87
74
70
—
—
—
(power supply for input, output, and input-output ports)
Positive power supply pin for internal logic (internally generated).
A capacitor (0.1 mF) should be connected between this pin and VSS
.
Voltage multiplier pin for power supply backup (internally generated).
A capacitor (1.0 mF) should be connected between this pin and VSS
.
CB1
CB2
71
72
—
—
Pins to connect a capacitor for voltage multiplier.
A capacitor (1.0 mF) should be connected between CB1 and CB2.
Low-speed clock oscillation pins.
XT0
79
78
76
75
81
80
I
O
I
A 32.768 kHz crystal should be connected between XT0 and XT1,
XT1
Oscillation
and CG (5 to 25 pF) should be connected between XT0 and VSS
.
High-speed clock oscillation pins.
OSC0
A ceramic resonator and capacitors (CL0, CL1) or external
oscillation resistor (ROS) should be connected to these pins.
Input pins for testing.
OSC1
O
I
TST1
A pull-down resistor is internally connected to these pins.
The user cannot use these pins.
Test
TST2
I
Reset input pin.
Setting this pin to "H" level puts this device into a reset state.
Then, setting this pin to "L" level starts executing an instruction
from address 0000H.
Reset
RESET
77
I
A pull-down resistor is internally connected to this pin.
Melody output pin (non-inverted output)
Melody output pin (inverted output)
MD
84
85
O
O
Melody
MDB
9/32
¡ Semiconductor
MSM63188A
Table 1 Pin Descriptions (Basic Functions) (continued)
Function
Symbol
P0.0/INT5
P0.1/INT5
P0.2/INT5
P0.3/INT5
P1.0/INT5
P1.1/INT5
P1.2/INT5
P1.3/INT5
P2.0
Pin
154
153
152
151
150
149
148
147
146
145
144
143
142
141
140
139
138
137
136
135
132
131
130
129
128
127
126
125
124
123
122
121
Type
Description
4-bit input ports.
Pull-up resistor input, pull-down resistor input, or
high-impedance input is selectable for each bit.
I
I
4-bit output ports.
P2.1
P-channel open drain output, N-channel open drain output,
O
O
O
O
O
O
CMOS output, or high-impedance output is selectable for each
bit.
P2.2
P2.3
P3.0
P3.1
P3.2
P3.3
Port
P4.0/A0
P4.1/A1
P4.2/A2
P4.3/A3
P5.0/A4
P5.1/A5
P5.2/A6
P5.3/A7
P6.0/A8
P6.1/A9
P6.2/A10
P6.3/A11
P7.0/A12
P7.1/A13
P7.2/A14
P7.3/A15
10/32
¡ Semiconductor
MSM63188A
Table 1 Pin Descriptions (Basic Functions) (continued)
Function
Symbol
Type
Description
Pin
120
119
118
117
116
115
114
113
112
111
110
109
4-bit input-output ports.
P8.0/RD
P8.1/WR
P8.2
In input mode, pull-up resistor input, pull-down resistor input,
or high-impedance input is selectable for each bit.
In output mode, P-channel open drain output, N-channel open
drain output, CMOS output, or high-impedance output is
selectable for each bit.
I/O
P8.3/INT4
P9.0/D0
P9.1/D1
P9.2/D2
P9.3/D3
PA.0/D4
PA.1/D5
PA.2/D6
PA.3/D7
I/O
I/O
PB.0/INT0/
TM0CAP/
TM0OVF
108
107
Port
PB.1/INT0/
TM1CAP/
TM1OVF
I/O
PB.2/INT0/T02CK
PB.3/INT0/T13CK
PC.0/INT1/RXD
PC.1/INT1/TXC
PC.2/INT1/RXC
PC.3/INT1/TXD
PD.0/FRAME
106
105
104
103
102
101
100
99
I/O
I/O
PD.1/LCLK
PD.2/TBCCLK
PD.3/HSCLK
98
97
11/32
¡ Semiconductor
MSM63188A
Table 1 Pin Descriptions (Basic Functions) (continued)
Function
Symbol
COM1
COM2
COM3
COM4
COM5
COM6
COM7
COM8
COM9
COM10
COM11
COM12
COM13
COM14
COM15
COM16
SEG0
Pin
61
60
59
58
57
56
55
54
53
52
51
50
49
48
47
46
44
43
42
41
40
39
38
37
36
35
34
33
32
31
30
29
28
27
26
25
24
23
22
21
20
Type
Description
LCD common signal output pins
O
LCD segment signal output pins
SEG1
SEG2
SEG3
LCD
SEG4
SEG5
SEG6
SEG7
SEG8
SEG9
SEG10
SEG11
SEG12
SEG13
SEG14
SEG15
SEG16
SEG17
SEG18
SEG19
SEG20
SEG21
SEG22
SEG23
SEG24
O
12/32
¡ Semiconductor
MSM63188A
Table 1 Pin Descriptions (Basic Functions) (continued)
Function
Symbol
SEG25
SEG26
SEG27
SEG28
SEG29
SEG30
SEG31
SEG32
SEG33
SEG34
SEG35
SEG36
SEG37
SEG38
SEG39
SEG40
SEG41
SEG42
SEG43
SEG44
SEG45
SEG46
SEG47
SEG48
SEG49
SEG50
SEG51
SEG52
SEG53
SEG54
SEG55
SEG56
SEG57
SEG58
SEG59
SEG60
SEG61
SEG62
SEG63
Pin
19
Type
Description
LCD segment signal output pins
18
17
16
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1
LCD
O
175
174
173
172
171
170
169
168
167
166
165
164
163
162
161
160
159
158
157
156
13/32
¡ Semiconductor
MSM63188A
Table 2 shows the secondary functions of each pin of the MSM63188A.
Table 2 Pin Descriptions (Secondary Functions)
Function
Symbol
PB.0/INT0
PB.1/INT0
PB.2/INT0
PB.3/INT0
PC.0/INT1
PC.1/INT1
PC.2/INT1
PC.3/INT1
Pin
108
107
106
105
104
103
102
101
Type
Description
External 0 interrupt input pins.
The change of input signal level causes an interrupt to occur.
The Port B Interrupt Enable register (PBIE) enables or disables
an interrupt for each bit.
I
External 1 interrupt input pins.
The change of input signal level causes an interrupt to occur.
The Port C Interrupt Enable register (PCIE) enables or disables
an interrupt for each bit.
I
I
External
Interrupt
External 4 interrupt input pins.
P8.3/INT4
117
The change of input signal level causes an interrupt to occur.
External 5 interrupt input pins.
P0.0/INT5
P0.1/INT5
P0.2/INT5
P0.3/INT5
P1.0/INT5
P1.1/INT5
P1.2/INT5
P1.3/INT5
154
153
152
151
150
149
148
147
The change of input signal level causes an interrupt to occur.
The Port 0 Interrupt Enable register (P0IE) and Port 1 Interrupt
Enable register (P1IE) enable or disable an interrupt for each bit.
I
14/32
¡ Semiconductor
MSM63188A
Table 2 Pin Descriptions (Secondary Functions) (continued)
Function
Symbol
Pin
108
107
108
107
106
105
Type
Description
Timer 0 capture input pin.
PB.0/TM0CAP
PB.1/TM1CAP
PB.0/TM0OVF
PB.1/TM1OVF
PB.2/T02CK
PB.3/T13CK
I
I
Capture
Timer 1 capture input pin.
O
O
I
Timer 0 overflow flag output pin.
Timer 1 overflow flag output pin.
Timer
External clock input pin for timer 0 and timer 2.
External clock input pin for timer 1 and timer 3.
I
LCD
PD.0/FRAME
PD.1/LCLK
100
99
O
O
Frame output pin for LCD driver expansion
Clock output pin for LCD driver expansion
External
Expansion
Oscillation
Output
PD.2/TBCCLK
PD.3/HSCLK
PC.0/RXD
98
97
O
O
I
Low-speed oscillation clock output pin
High-speed oscillation clock output pin
Serial port receive data input pin
104
Sync serial port clock input-output pin.
PC.1/TXC
103
I/O Transmit clock output when this device is used as a master processor.
Transmit clock input when this device is used as a slave processor.
Sync serial port clock input-output pin.
Serial
Port
PC.2/RXC
PC.3/TXD
102
101
I/O Receive clock output when this device is used as a master processor.
Receive clock input when this device is used as a slave processor.
O
Serial port transmit data output pin.
15/32
¡ Semiconductor
MSM63188A
Table 2 Pin Descriptions (Secondary Functions) (continued)
Function
Symbol
P4.0/A0
P4.1/A1
P4.2/A2
P4.3/A3
P5.0/A4
P5.1/A5
P5.2/A6
P5.3/A7
P6.0/A8
P6.1/A9
P6.2/A10
P6.3/A11
P7.0/A12
P7.1/A13
P7.2/A14
P7.3/A15
P9.0/D0
P9.1/D1
P9.2/D2
P9.3/D3
PA.0/D4
PA.1/D5
PA.2/D6
PA.3/D7
P8.0/RD
P8.1/WR
Pin
138
137
136
135
132
131
130
129
128
127
126
125
124
123
122
121
116
115
114
113
112
111
110
109
120
119
Type
Description
Address output bus for external memory
O
External
Memory
Data bus for external memory
I/O
O
O
Read signal output pin for external memory (negative logic)
Write signal output pin for external memory (negative logic)
16/32
¡ Semiconductor
MSM63188A
ABSOLUTE MAXIMUM RATINGS
(VSS = 0 V)
Parameter
Power Supply Voltage 1
Power Supply Voltage 2
Power Supply Voltage 3
Power Supply Voltage 4
Power Supply Voltage 5
Power Supply Voltage 6
Power Supply Voltage 7
Power Supply Voltage 8
Power Supply Voltage 9
Input Voltage 1
Symbol
VDD1
VDD2
VDD3
VDD4
VDD5
VDD
Condition
Ta = 25°C
Rating
Unit
V
–0.3 to +1.6
–0.3 to +2.9
–0.3 to +4.2
–0.3 to +5.5
–0.3 to +6.8
–0.3 to +6.0
–0.3 to +6.0
–0.3 to +6.0
–0.3 to +6.0
Ta = 25°C
V
Ta = 25°C
V
Ta = 25°C
V
Ta = 25°C
V
Ta = 25°C
V
VDDI
Ta = 25°C
V
VDDH
VDDL
VIN1
Ta = 25°C
V
Ta = 25°C
V
VDD Input, Ta = 25°C
VDDI Input, Ta = 25°C
VDD1 Output, Ta = 25°C
VDD2 Output, Ta = 25°C
VDD3 Output, Ta = 25°C
VDD4 Output, Ta = 25°C
VDD5 Output, Ta = 25°C
VDD Output, Ta = 25°C
VDDI Output, Ta = 25°C
VDDH Output, Ta = 25°C
—
–0.3 to VDD + 0.3
–0.3 to VDDI + 0.3
–0.3 to VDD1 + 0.3
–0.3 to VDD2 + 0.3
–0.3 to VDD3 + 0.3
–0.3 to VDD4 + 0.3
–0.3 to VDD5 + 0.3
–0.3 to VDD + 0.3
–0.3 to VDDI + 0.3
–0.3 to VDDH + 0.3
–55 to +150
V
V
V
V
V
V
V
V
V
V
°C
Input Voltage 2
VIN2
Output Voltage 1
VOUT1
VOUT2
VOUT3
VOUT4
VOUT5
VOUT6
VOUT7
VOUT8
TSTG
Output Voltage 2
Output Voltage 3
Output Voltage 4
Output Voltage 5
Output Voltage 6
Output Voltage 7
Output Voltage 8
Storage Temperature
17/32
¡ Semiconductor
MSM63188A
RECOMMENDED OPERATING CONDITIONS
• When backup is used
(VSS = 0 V)
Parameter
Symbol
Top
Condition
Range
–20 to +70
0.9 to 2.7
0.9 to 5.5
30 to 35
Unit
°C
Operating Temperature
—
VDD
—
V
Operating Voltage
VDDI
fXT
V
—
Crystal Oscillation Frequency
Ceramic Oscillation Frequency
kHz
—
VDD = 1.2 to 2.7 V
VDD = 1.5 to 2.7 V
VDD = 1.2 to 2.7 V
VDD = 1.5 to 2.7 V
300k to 500k
200k to 1M
100 to 300
50 to 300
fCM
Hz
External RC Oscillator Resistance
ROS
kW
• When backup is not used
(VSS = 0 V)
Parameter
Symbol
Top
Condition
—
Range
–20 to +70
1.8 to 5.5
1.8 to 5.5
30 to 35
Unit
°C
Operating Temperature
VDD
—
V
Operating Voltage
VDDI
fXT
V
—
Crystal Oscillation Frequency
kHz
—
VDD = 1.8 to 5.5 V
VDD = 2.2 to 5.5 V
VDD = 2.7 to 5.5 V
VDD = 1.8 to 5.5 V
VDD = 2.2 to 5.5 V
VDD = 2.7 to 5.5 V
300k to 500k
300k to 1M
200k to 2M
100 to 300
50 to 300
30 to 300
Ceramic Oscillation Frequency
External RC Oscillator Resistance
fCM
Hz
ROS
kW
18/32
¡ Semiconductor
MSM63188A
ELECTRICAL CHARACTERISTICS
DC Characteristics
(VDD = VDDI = 0.9 to 5.5 V, VSS = 0 V, Ta = –20 to +70°C unless otherwise specified)
Mea-
suring
Circuit
Parameter
Symbol
Condition
Min.
Typ.
Max. Unit
1/5 bias, 1/4 bias
(Ta = 25°C)
—
VDD2 Voltage
VDD2
1.7
—
1.8
–4
1.9
—
V
VDD2 Voltage Temperature Deviation DVDD2
mV/°C
V
VDD1 Voltage
VDD1
1/5 bias, 1/4 bias
1/5 bias
Typ.– 0.2 1/2 ¥ VDD2 Typ.+ 0.2
Typ.– 0.3 3/2 ¥ VDD2 Typ.+ 0.3
VDD3 Voltage
VDD3
1/4 bias (connect
V
Typ.– 0.2 VDD2 Typ.+ 0.2
VDD3 and VDD2
1/5 bias
)
Typ.– 0.4 2 ¥ VDD2 Typ.+ 0.4
Typ.– 0.3 3/2 ¥ VDD2 Typ.+ 0.3
Typ.– 0.5 5/2 ¥ VDD2 Typ.+ 0.5
Typ.– 0.4 2 ¥ VDD2 Typ.+ 0.4
VDD4 Voltage
VDD5 Voltage
VDD4
V
V
1/4 bias
1/5 bias
VDD5
1/4 bias
High-speed clock oscillation
stopped
2.8
2.0
—
—
3.0
2.7
V
V
VDDH Voltage
VDD = 1.5 V
VDDH
(Backup used)
High-speed clock oscillation
(Ceramic oscillation, 1 MHz)
VDD = 1.5 V
1
High-speed clock
oscillation stopped
0.8
1.2
1.0
1.3
—
—
1.8
5.5
—
V
V
V
VDDL Voltage
VDDL
High-speed clock oscillation
(VDD = 1.2 to 5.5 V)
Oscillation start time:
within 5 seconds
Crystal Oscillation Start Voltage
Crystal Oscillation Hold Voltage
VSTA
Backup
0.9
1.7
0.1
5
—
—
—
—
25
—
—
5.0
25
30
V
V
VHOLD
Backup not used
Crystal Oscillation Stop Detect Time
External Crystal Oscillator Capacitance
Internal Crystal Oscillator Capacitance
TSTOP
CG
—
—
—
ms
pF
pF
CD
20
CSA2.00MG (Murata
MFG.-make) used
External Ceramic Oscillator
Capacitance
CL0, 1
—
30
—
pF
VDD = 3.0 V
Internal RC Oscillator Capacitance
POR Voltage
COS
—
8
12
—
—
—
—
16
0.4
0.7
1.5
3.0
pF
V
VDD = 1.5 V
VDD = 3.0 V
VDD = 1.5 V
VDD = 3.0 V
0.0
0.0
1.2
2.0
VPOR1
V
V
Non-POR Voltage
VPOR2
V
Notes: 1. "T
" indicates that if the crystal oscillator stops over the value of T
, the system
STOP
STOP
reset occurs.
2. "POR" denotes Power On Reset.
3. "V
" indicates that POR occurs when V falls from V to V
and again rises
POR1
DD
DD
POR1
up to V
.
DD
4. "V
" indicates that POR does not occur when V falls from V
to V
and
POR2
DD
DD
POR2
again rises up to V
.
DD
19/32
¡ Semiconductor
MSM63188A
DC Characteristics (continued)
• When backup is used
(VDD = VDDI = 1.5 V, VSS = 0 V, 1/5 bias, Ta = –20 to +70°C unless otherwise specified)
Mea-
Parameter Symbol
Condition
CPU is in HALT state.
(High-speed clock oscillation
stopped)
Min. Typ. Max. Unit
suring
Circuit
Ta = –20 to +50°C
Ta = –20 to +70°C
—
—
5.6
5.6
7.0
8.5
Supply Current 1 IDD1
mA
mA
CPU is in HALT state.
LCD is in Power Down mode.
(High-speed clock oscillation
stopped)
Ta = –20 to +50°C
Ta = –20 to +70°C
—
—
4.5
4.5
5.5
7.0
Supply Current 2 IDD2
1
CPU is in operation at low-speed oscillation.
(High-speed clock oscillation stopped)
Supply Current 3 IDD3
Supply Current 4 IDD4
Supply Current 5 IDD5
—
—
—
18
22
mA
mA
CPU is in operation at high-speed oscillation
(RC oscillation, f = approx. 720 kHz, ROS = 51 kW)
700
900
CPU is in operation at high-speed oscillation
(Ceramic oscillation, 1 MHz)
800 1000 mA
• When backup is not used
(VDD = VDDI = 3.0 V, VSS = 0 V, 1/5 bias, Ta = –20 to +70°C unless otherwise specified)
Mea-
Parameter Symbol
Condition
CPU is in HALT state.
(High-speed clock oscillation
stopped)
Min. Typ. Max. Unit
suring
Circuit
Ta = –20 to +50°C
Ta = –20 to +70°C
—
—
2.7
2.7
3.0
3.5
Supply Current 1 IDD1
mA
mA
CPU is in HALT state.
LCD is in Power Down mode.
(High-speed clock oscillation
stopped)
Ta = –20 to +50°C
Ta = –20 to +70°C
—
—
2.1
2.1
2.4
3.0
Supply Current 2 IDD2
Supply Current 3 IDD3
CPU is in operation at low-speed oscillation.
(High-speed clock oscillation stopped)
1
—
8.5
10.5 mA
f = approx. 800 kHz,
550
390
800
—
—
CPU is in operation at
high-speed oscillation
ROS = 51 kW
Supply Current 4 IDD4
Supply Current 5 IDD5
mA
f = approx. 500 kHz,
(RC oscillation)
450
ROS = 100 kW
CPU is in operation at high-speed oscillation
(Ceramic oscillation, 2 MHz)
—
1000 1500 mA
20/32
¡ Semiconductor
MSM63188A
DC Characteristics (continued)
(VDD = VDDI = VDDH = 3.0 V, VSS = 0 V, VDD1 = 1.1 V, VDD2 = 2.2 V, VDD3 = 3.3 V,
VDD4 = 4.4 V, VDD5 = 5.5 V, Ta = –20 to +70°C unless otherwise specified)
Mea-
Parameter
Symbol
Condition
Unit
Min. Typ. Max.
suring
Circuit
Output Current 1
(P2.0 to P2.3)
(P3.0 to P3.3)
(P4.0 to P4.3)
VDDI = 1.5 V
–2.0 –1.2 –0.2 mA
–5.0 –3.0 –1.0 mA
–8.0 –4.0 –1.5 mA
IOH1
VOH1 = VDDI – 0.5 V VDDI = 3.0 V
VDDI = 5.0 V
V
DDI = 1.5 V
0.2
1.0
1.5
1.2
3.0
4.0
2.0
5.0
8.0
mA
mA
mA
(PC.0 to PC.3)
(PD.0 to PD.3)
IOL1
VOL1 = 0.5 V
VDDI = 3.0 V
VDDI = 5.0 V
Output Current 2
(MD, MDB)
V
DD = 1.5 V
VOH2 = VDD – 0.7 V VDD = 3.0 V
–2.5 –1.3 –0.4 mA
–6.0 –4.0 –2.0 mA
IOH2
VDD = VDDH = 5.0 V –9.0 –5.5 –3.0 mA
V
DD = 1.5 V
0.4
2.0
3.0
—
4
1.3
4.0
5.5
—
—
—
—
—
—
—
—
—
—
2.5
6.0
9.0
–4
—
–4
—
–4
—
–4
—
–4
—
mA
mA
mA
mA
mA
mA
mA
mA
mA
mA
mA
mA
mA
IOL2
IOH3
VOL2 = 0.7 V
VDD = 3.0 V
VDD = VDDH = 5.0 V
Output Current 3
(SEG0 to SEG63)
(COM1 to COM16)
VOH3 = VDD5 – 0.2 V (VDD5 level)
IOHM3 VOHM3 = VDD4 + 0.2 V (VDD4 level)
IOHM3S VOHM3S = VDD4 – 0.2 V (VDD4 level)
IOMH3 VOMH3 = VDD3 + 0.2 V (VDD3 level)
IOMH3S VOMH3S = VDD3 – 0.2 V (VDD3 level)
IOML3 VOML3 = VDD2 + 0.2 V (VDD2 level)
IOML3S VOML3S = VDD2 – 0.2 V (VDD2 level)
IOLM3 VOLM3 = VDD1 + 0.2 V (VDD1 level)
IOLM3S VOLM3S = VDD1 – 0.2 V (VDD1 level)
—
4
—
4
2
—
4
—
4
IOL3
VOL3 = VSS + 0.2 V (VSS level)
Output Current 4
(OSC1)
VOH4R = VDDH – 0.5 V VDD = VDDH = 3.0 V –2.5 –1.5 –0.75 mA
IOH4R
(RC oscillation)
VOL4R = 0.5 V
(RC oscillation)
VDD = VDDH = 5.0 V –3.5 –2.0 –1.0 mA
VDD = VDDH = 3.0 V 0.75
VDD = VDDH = 5.0 V 1.0
1.5
2.0
2.5
3.5
mA
mA
IOL4R
IOH4C
IOL4C
VOH4C = VDDH – 0.5 V VDD = VDDH = 3.0 V –300 –180 –60 mA
(ceramic oscillation)
VOL4C = 0.5 V
VDD = VDDH = 5.0 V –450 –280 –100 mA
VDD = VDDH = 3.0 V
60
120
200
300 mA
450 mA
(ceramic oscillation)
VDD = VDDH = 5.0 V 100
Output Leakage
(P2.0 to P2.3)
(P3.0 to P3.3)
(P4.0 to P4.3)
IOOH
VOH = VDDI
—
—
—
0.3
—
mA
mA
IOOL
VOL = VSS
–0.3
(PD.0 to PD.3)
21/32
¡ Semiconductor
MSM63188A
DC Characteristics (continued)
(VDD = VDDI = VDDH = 3.0 V, VSS = 0 V, VDD1 = 1.1 V, VDD2 = 2.2 V, VDD3 = 3.3 V,
V
DD4 = 4.4 V, VDD5 = 5.5 V, Ta = –20 to +70°C unless otherwise specified)
Mea-
Parameter
Symbol
Condition
Unit
suring
Circuit
Min. Typ. Max.
Input Current 1
(P0.0 to P0.3)
(P1.0 to P1.3)
(P8.0 to P8.3)
(P9.0 to P9.3)
VDDI = 1.5 V
2
10
90
30
mA
VIH1 = VDDI
IIH1
VDDI = 3.0 V
VDDI = 5.0 V
30
180 mA
600 mA
(when pulled down)
70
250
–10
V
DDI = 1.5 V
–30
–2
–30 mA
–600 –250 –70 mA
mA
VIL1 = VSS
IIL1
VDDI = 3.0 V
VDDI = 5.0 V
–180 –90
(when pulled up)
(PD.0 to PD.3)
IIH1Z
IIL1Z
VIH1 = VDDI (in a high impedance state)
VIL1 = VSS (in a high impedance state)
0.0
—
—
1.0
0.0
mA
mA
–1.0
Input Current 2
(OSC0)
VIL2 = VSS
V
DD = VDDH = 3.0 V –200 –110 –30 mA
IIL2
(when pulled up)
VDD = VDDH = 5.0 V –600 –350 –150 mA
IIH2R
IIL2R
VIH2R = VDDH (RC oscillation)
VIL2R = VSS (RC oscillation)
0.0
–1.0
0.1
—
—
1.0
0.0
1.0
3.0
mA
mA
mA
mA
3
VIH2C = VDDH
V
DD = VDDH = 3.0 V
0.5
1.5
IIH2C
IIL2C
(ceramic oscillation)
VIL2C = VSS
VDD = VDDH = 5.0 V 0.75
V
DD = VDDH = 3.0 V –1.0 –0.5 –0.1 mA
(ceramic oscillation)
VDD = VDDH = 5.0 V –3.0 –1.5 –0.75 mA
Input Current 3
(RESET)
VDD = 1.5 V
VDD = 3.0 V
10
150
0.5
–1.0
50
50
350
1.0
—
80
mA
IIH3
IIL3
IIH4
IIL4
VIH3 = VDD
VIL3 = VSS
VIH4 = VDD
VIL4 = VSS
600 mA
VDD = VDDH = 5.0 V
2.0
0.0
mA
mA
Input Current 4
(TST1, TST2)
VDD = 1.5 V
VDD = 3.0 V
150
1.0
2.5
—
300 mA
0.5
1.5
4.0
0.0
mA
mA
mA
VDD = VDDH = 5.0 V 1.25
–1.0
22/32
¡ Semiconductor
MSM63188A
DC Characteristics (continued)
(VDD = VDDI = VDDH = 3.0 V, VSS = 0 V, VDD1 = 1.1 V, VDD2 = 2.2 V, VDD3 = 3.3 V,
VDD4 = 4.4 V, VDD5 = 5.5 V, Ta = –20 to +70°C unless otherwise specified)
Mea-
Parameter
Input Voltage 1
(P0.0 to P0.3)
(P1.0 to P1.3)
(P8.0 to P8.3)
(P9.0 to P9.3)
Symbol
Condition
Unit
suring
Circuit
Min. Typ. Max.
VDDI = 1.5 V
VDDI = 3.0 V
1.2
2.4
4.0
0.0
0.0
0.0
2.4
4.0
0.0
0.0
1.35
2.4
4.0
0.0
0.0
0.0
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
1.5
3.0
5.0
0.3
0.6
1.0
3.0
5.0
0.6
1.0
1.5
3.0
5.0
0.15
0.6
1.0
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
VIH1
VDDI = 5.0 V
VDDI = 1.5 V
VIL1
VDDI = 3.0 V
(PD.0 to PD.3)
VDDI = 5.0 V
Input Voltage 2
(OSC0)
VDD = VDDH = 3.0 V
VDD = VDDH = 5.0 V
VDD = VDDH = 3.0 V
VDD = VDDH = 5.0 V
VIH2
VIL2
Input Voltage 3
(RESET, TST1, TST2)
VDD = 1.5 V
VIH3
VDD = 3.0 V
VDD = VDDH = 5.0 V
VDD = 1.5 V
4
VIL3
VDD = 3.0 V
VDD = VDDH = 5.0 V
Hysteresis Width 1
(P0.0 to P0.3)
(P1.0 to P1.3)
(P8.0 to P8.3)
VDDI = 1.5 V
VDDI = 3.0 V
VDDI = 5.0 V
0.05
0.2
0.1
0.5
1.0
0.3
1.0
1.5
V
V
V
DVT1
0.25
(PD.0 to PD.3)
Hysteresis Width 2
VDD = 1.5 V
VDD = 3.0 V
0.05
0.2
0.1
0.5
1.0
0.3
1.0
1.5
V
V
V
(RESET, TST1, TST2)
DVT2
VDD = VDDH = 5.0 V
0.25
Input Pin Capacitance
(P0.0 to P0.3)
(P1.0 to P1.3)
(P8.0 to P8.3)
(P9.0 to P9.3)
CIN
—
—
—
5
pF
1
(PC.0 to PC.3)
(PD.0 to PD.3)
23/32
¡ Semiconductor
MSM63188A
Measuring circuit 1
CB1
CG
Cb12
XT0
XT1
CB2
C1
32.768 kHz
Crystal
C12
C2
q
*1
OSC0
w
OSC1
VSS VDD VDDI VDD1 VDD2 VDD3 VDD4 VDD5 VDDH VDDL
A
Ca
Cb
Cc
Cd
Ce
Ch
Cl
V
V
V
V
V
V
V
Ca, Cb, Cc, Cd, Ce, Cl, C12 : 0.1 mF
*1 RC Oscillator
ROS
Cb12, Ch
: 1 mF
q
CG
: 15 pF
: 30 pF
: 30 pF
CL0
CL1
w
Ceramic Resonator
: CSA2.00MG (2 MHz)
CSB1000J (1 MHz)
(Murata MFG.-make)
Ceramic Oscillator
q
CL0
Ceramic Resonator
w
CL1
Measuring circuit 2
*3
VIH
A
*2
INPUT
OUTPUT
VIL
VSS VDD VDDI VDD1 VDD2 VDD3 VDD4 VDD5 VDDH VDDL
*2 Input logic circuit to determine the specified measuring conditions.
*3 Measured at the specified output pins.
24/32
¡ Semiconductor
MSM63188A
Measuring circuit 3
*4
A
INPUT
OUTPUT
VSS VDD VDDI VDD1 VDD2 VDD3 VDD4 VDD5 VDDH VDDL
Measuring circuit 4
VIH
Waveform
Monitoring
*4
INPUT
OUTPUT
VIL
VSS VDD VDDI VDD1 VDD2 VDD3 VDD4 VDD5 VDDH VDDL
*4 Measured at the specified input pins.
25/32
¡ Semiconductor
MSM63188A
AC Characteristics (Serial Interface, Serial Port)
(V =0.9 to 5.5V, V
=1.8to5.5V, V =0V, V =5.0V, Ta=–20to+70°Cunlessotherwise
DDI
DD
DDH
SS
specified)
(1) Synchronous Communication
Min.
Typ.
Max.
Parameter
Symbol
Condition
Unit
TXC/RXC Input Fall Time
TXC/RXC Input Rise Time
tf
tr
—
—
—
—
—
—
1.0
1.0
ms
ms
TXC/RXC Input "L" Level
Pulse Width
tCWL
—
0.8
0.8
—
—
—
—
ms
ms
TXC/RXC Input "H" Level
Pulse Width
tCWH
tCYC
—
—
TXC/RXC Input Cycle Time
2.0
—
—
—
—
ms
ms
tCYC1(O) CPU in operation state at 32 kHz
30.5
TXC/RXC Output Cycle Time
CPU in operation at 2 MHz
tCYC2(O)
—
0.5
—
ms
VDD = VDDH = 2.7 V to 5.5 V
TXD Output Delay Time
RXD Input Setup Time
RXD Input Hold Time
tDDR
tDS
Output load capacitance 10 pF
—
0.5
0.8
—
—
—
0.4
—
—
ms
ms
ms
—
—
tDH
Synchronous communication timing
("H" level = 4.0 V, "L" level = 1.0 V)
tCYC
TXC (PC.1)/
RXC (PC.2)
5 V (VDDI
0 V (VSS
)
)
tr
tf
tCWH
tCWL
tDDR
tDDR
TXD (PC.3)
5 V (VDDI
)
0 V (VSS
)
tDS
tDH
tDS
5 V (VDDI
)
RXD (PC.0)
0 V (VSS
)
26/32
¡ Semiconductor
MSM63188A
(2) UART Communication
Parameter
Symbol
Condition
Min.
Typ.
Max. Unit
TBRT = 1/fBRT
TCR = 1/fOSC
Transmit Baud Rate
Receive Baud Rate
TBRT
RBRT
T
BRT–TCR
TBRT
TBRT+TCR
s
s
RBRT = 1/fBRT
RBRT¥0.97 RBRT RBRT¥1.03
fBRT: Baud rates (1200, 2400, 4800, 9600 bps)
UART communication timing
("H" level = 4.0 V, "L" level = 1.0 V)
TBRT
5 V (VDDI
)
TXD (PC.3)
RXD (PC.0)
0 V (VSS
)
RBRT
5 V (VDDI
)
0 V (VSS
)
27/32
¡ Semiconductor
MSM63188A
AC Characteristics (External Memory Interface)
(V =0.9 to 5.5V, V
=1.8to5.5V, V =0V, V =5.0V, Ta=–20to+70°Cunlessotherwise
DDI
DD
DDH
SS
specified)
(1) Reading from External Memory
(a) When CPU operates at 32.768 kHz
Parameter
Read Cycle Time
Symbol
tRC
Condition
Min.
—
Typ.
61.0
—
Max.
—
Unit
ms
—
—
—
—
RD Output Delay Time
Output Valid Time
tOE
—
5.0
ms
tOHA
tDO
—
—
5.0
ms
External Memory Output Delay Time
—
—
5.0
ms
(b) When CPU operates at 2 MHz (VDDH = 2.7 to 5.5 V)
Parameter
Read Cycle Time
Symbol
tRC
Condition
Min.
1.0
—
Typ.
—
Max.
—
Unit
ms
—
—
—
—
RD Output Delay Time
Output Valid Time
tOE
—
100
100
150
ns
tOHA
tDO
—
—
ns
External Memory Output Delay Time
—
—
ns
AC characteristics timing
("H" level = 4.0 V, "L" level = 1.0 V)
MOVXB obj, xadr16
MOVXB obj, [RA]
S2 S1
S1
S2
S1
S2
System clock
tRC
Address output Port setup value
5 V (VDDI
)
P7 - P4
(A15 - A0)
Port setup value
Port setup value
0 V (VSS
)
5 V (VDDI
)
P8.0
(RD)
0 V (VSS
)
tOE
tOHA
5 V (VDDI
)
PA, P9
(D7 - D0)
Input data
tDO
Port setup value
0 V (VSS
)
28/32
¡ Semiconductor
MSM63188A
(2) Writing to External Memory
(a) When CPU operates at 32.768 kHz
Parameter
Write Cycle Time
Symbol
Condition
Min.
—
Typ.
61.0
30.5
15.3
15.3
45.8
15.3
Max.
—
Unit
ms
tWC
tAS
tW
—
—
—
—
—
—
Address Setup Time
Write Time
—
—
ms
—
—
ms
Write Recovery Time
Data Setup Time
Data Hold Time
tWR
tDS
tDH
—
—
ms
—
—
ms
—
—
ms
(b) When CPU operates at 2 MHz (VDDH = 2.7 to 5.5 V)
Parameter
Write Cycle Time
Symbol
tWC
Condition
Min.
1.0
0.4
0.2
0.2
0.7
0.2
Typ.
—
Max.
—
Unit
ms
—
—
—
—
—
—
Address Setup Time
Write Time
tAS
—
—
ms
tW
—
—
ms
Write Recovery Time
Data Setup Time
Data Hold Time
tWR
—
—
ms
tDS
—
—
ms
tDH
—
—
ms
AC characteristics timing
("H" level = 4.0 V, "L" level = 1.0 V)
MOVXB [RA], obj or MOVXB xadr16, obj
S1 S2 S1 S2 S1
S2
System clock
tWC
Address output Port setup value
5 V (VDDI
)
P7 - P4
(A15 - A0)
Port setup value
Port setup value
0 V (VSS
)
PA, P9
(D7 - D0)
5 V (VDDI
)
Output data
Port setup value
0 V (VSS
)
tDS
tDH
5 V (VDDI
)
P8.1
(WR)
0 V (VSS
)
tAS
tW tWR
29/32
¡ Semiconductor
MSM63188A
APPLICATION CIRCUITS
•RC oscillation is selected as high-speed
oscillation.
•Ports are powered from external memory
power source.
LCD
•Cv is an IC power supply bypass capacitor.
•Values of Ca, Cb, Cc, Cd, Ce, Cl, Cb12, C12,
Ch, and CG, are for reference only.
Crystal
32.768 kHz
COM1-16
SEG0-63
XT0
OSC0
OSC1
ROS
CG
5 to
25 pF
1.5 V
XT1
VDDH
Ch
1.0 mF
VDD
Cv 0.1 mF
CB1
P3.3
P3.2
P3.1
P3.0
P2.3
P2.2
P2.1
P2.0
Cb12
Cl
1.0 mF
0.1 mF
CB2
VDDL
Ce
Cd
Cc
Cb
Ca
0.1 mF
0.1 mF
0.1 mF
0.1 mF
0.1 mF
VDD5
VDD4
VDD3
VDD2
SW Matrix
(8 ¥ 8)
P1.3
P1.2
P1.1
P1.0
P0.3
P0.2
P0.1
P0.0
MSM63188A
VDD1
C1
C12
0.1 mF
C2
Push SW
RESET
TST1
TST2
MD
Open
VDDI
Buzzer
VDD
MDB
VSS
A15-0
P4-7
External
Memory
(64K ¥ 8 bits)
5.0 V
P9, PA
P8.0
P8.1
D7-0
RD
WR
VSS
Note:
V
DDI
is the power supply pin for the input, output, and input-output ports.
Be sure to connect the V
pin either to the positive power supply pin (V ) of this
DD
DDI
device or to the positive power supply pin of the external memory.
Application Circuit Example with Power Supply Backup
30/32
¡ Semiconductor
MSM63188A
APPLICATION CIRCUITS (continued)
•Ceramic oscillation is selected as high-speed
oscillation.
•Ports, external memory, and IC share their
power supply.
LCD
•Cv is an IC power supply bypass capacitor.
•Values of Ca, Cb, Cc, Cd, Ce, Cl, C12, CG,
CL0, and CL1 are for reference only.
Crystal
32.768 kHz
CL0 30 pF
COM1-16
SEG0-63
XT0
OSC0
OSC1
Ceramic
Resonator
CG
(Example: 1 MHz)
5 to 25 pF
XT1
VDD
CL1
VDDH
30 pF
5.0 V
VDD
CB1
CB2
VDDL
Open
0.1 mF
P3.3
P3.2
P3.1
P3.0
P2.3
P2.2
P2.1
P2.0
Cv
Cl
Ce
Cd
Cc
Cb
Ca
0.1 mF
0.1 mF
VDD5
VDD4
VDD3
SW Matrix
(8 ¥ 8)
0.1 mF
0.1 mF
0.1 mF
0.1 mF
P1.3
P1.2
P1.1
P1.0
P0.3
P0.2
P0.1
P0.0
MSM63188A
VDD2
VDD1
C1
C12
0.1 mF
C2
Push SW
RESET
TST1
TST2
MD
Open
VDDI
VDD
Buzzer
VDD
A15-0
P4-7
MDB
VSS
External
P9, PA
P8.0
P8.1
D7-0
RD
WR
Memory
(64K ¥ 8 bits)
VSS
Note:
V
DDI
is the power supply pin for the input, output, and input-output ports.
Be sure to connect the V
pin either to the positive power supply pin (V ) of this
DD
DDI
device or to the positive power supply pin of the external memory.
Application Circuit Example with No Power Supply Backup
31/32
¡ Semiconductor
MSM63188A
PACKAGE DIMENSIONS
(Unit : mm)
LQFP176-P-2424-0.50-BK
Mirror finish
Package material
Lead frame material
Pin treatment
Solder plate thickness
Package weight (g)
Epoxy resin
42 alloy
Solder plating
5 mm or more
1.87 TYP.
Notes for Mounting the Surface Mount Type Package
The SOP, QFP, TSOP, TQFP, LQFP, SOJ, QFJ (PLCC), SHP, and BGA are surface mount type
packages, which are very susceptible to heat in reflow mounting and humidity absorbed in
storage. Therefore, before you perform reflow mounting, contact Oki’s responsible sales person
ontheproductname,packagename,pinnumber,packagecodeanddesiredmountingconditions
(reflow method, temperature and times).
32/32
E2Y0002-29-62
NOTICE
1.
The information contained herein can change without notice owing to product and/or
technical improvements. Before using the product, please make sure that the information
being referred to is up-to-date.
2.
The outline of action and examples for application circuits described herein have been
chosen as an explanation for the standard action and performance of the product. When
planning to use the product, please ensure that the external conditions are reflected in the
actual circuit, assembly, and program designs.
3.
4.
When designing your product, please use our product below the specified maximum
ratings and within the specified operating ranges including, but not limited to, operating
voltage, power dissipation, and operating temperature.
Oki assumes no responsibility or liability whatsoever for any failure or unusual or
unexpected operation resulting from misuse, neglect, improper installation, repair, alteration
or accident, improper handling, or unusual physical or electrical stress including, but not
limited to, exposure to parameters beyond the specified maximum ratings or operation
outside the specified operating range.
5.
6.
Neither indemnity against nor license of a third party’s industrial and intellectual property
right, etc. is granted by us in connection with the use of the product and/or the information
and drawings contained herein. No responsibility is assumed by us for any infringement
of a third party’s right which may result from the use thereof.
The products listed in this document are intended for use in general electronics equipment
for commercial applications (e.g., office automation, communication equipment,
measurement equipment, consumer electronics, etc.). These products are not authorized
for use in any system or application that requires special or enhanced quality and reliability
characteristics nor in any system or application where the failure of such system or
application may result in the loss or damage of property, or death or injury to humans.
Such applications include, but are not limited to, traffic and automotive equipment, safety
devices, aerospace equipment, nuclear power control, medical equipment, and life-support
systems.
7.
Certain products in this document may need government approval before they can be
exported to particular countries. The purchaser assumes the responsibility of determining
thelegalityofexportoftheseproductsandwilltakeappropriateandnecessarystepsattheir
own expense for these.
8.
9.
No part of the contents contained herein may be reprinted or reproduced without our prior
permission.
MS-DOS is a registered trademark of Microsoft Corporation.
Copyright 1999 Oki Electric Industry Co., Ltd.
Printed in Japan
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