MSM64162D-XXGS-BK [OKI]
4-Bit Microcontroller with Built-in RC Oscillation Type A/D Converter and LCD Driver; 4 -bit微控制器内建RC振荡型A / D转换器和LCD驱动器
| 型号： | MSM64162D-XXGS-BK |
| 厂家： | 
OKI ELECTRONIC COMPONETS |
| 描述： | 4-Bit Microcontroller with Built-in RC Oscillation Type A/D Converter and LCD Driver |
| 文件： | 总37页 (文件大小：298K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
E2E0034-38-95
This version: Sep. 1998
Previous version: Mar. 1996
¡ Semiconductor
MSM64162D
4-Bit Microcontroller with Built-in RC Oscillation Type A/D Converter and LCD Driver
GENERAL DESCRIPTION
The MSM64162D is a low power 4-bit microcontroller that employs Oki's original CPU core nX-
4/20.
The MSM64162D has 1-channel RC oscillation type A/D converter, LCD driver for up to 80
segments, and buzzer output port. It is best suited for applications such as low power
thermometers and clinical thermometers.
FEATURES
• Operating range
Operating frequencies
Operating voltage
:
:
32.768 kHz
1.25 to 1.7 V (1.5 V spec.)
2.0 to 3.5 V (3 V spec.)
2.2 to 3.5 V (3 V spec., 1/2 duty)
–40 to +85°C
Operating temperature
:
• Memory space
Internal program memory
Internal data memory
• Minimum instruction execution time
• RC oscillation type A/D converter
• LCD driver
(1) At 1/4 duty and 1/3 bias
(2) At 1/3 duty and 1/3 bias
(3) At 1/2 duty and 1/2 bias
• Buzzer driver
:
:
:
:
:
:
:
:
:
:
2016 bytes
128 nibbles
91.6 ms @ 32.768 kHz
1 channel (2 sensors can be connected)
24 outputs; duty ratio switchable by software
80 segments (max)
63 segments (max)
44 segments (max)
1 output (4 output modes selectable)
2 channels
• Capture circuit
• Watchdog timer
• Clock
CPU clock
Time base clock
• Power supply voltage
• I/O port
:
:
:
:
32.768 kHz crystal oscillator
32.768 kHz
32.768 kHz
1.5 V/3 V (selectable by mask option)
Input-output port
Input port
Output port
:
:
:
2 ports ¥ 4 bits
1 port ¥ 4 bits
1 port ¥ 4 bits
(8 out of the 24 LCD driver outputs can be used
as output-only ports by mask option.)
• Interrupt sources
External interrupt
Internal interrupt
• Battery check circuit
:
:
:
2 sources
7 sources
1 (incorporated into the input-only port)
1/37
¡ Semiconductor
MSM64162D
• Package options:
64-pin plastic QFP (QFP64-P-1420-1.00-BK) : (Product name : MSM64162D-¥¥GS-BK)
80-pin plastic QFP (QFP80-P-1420-0.80-BK) : (Product name : MSM64162D-¥¥GS-BK-F)
Chip
: (Product name : MSM64162D-¥¥)
¥¥ indicates a code number.
2/37
¡ Semiconductor
MSM64162D
BLOCK DIAGRAM
CPU CORE: nX-4/20
BSR
TR1
TR2
TR0
(4)
ROM
2016B
PCH
PCM PCL
A11 to A8
A7 to A0
ALU
HALT
MIEF
C
(4)
(4)
B
A
H
L
X
Y
RAM
128N
DB7 to DB0
ROMR
(8)
SP
TIMING
CONTROLLER
(8)
XT
CLKG
RSTG
TBC
INTC
WDT
XT
INT
P3.3
P3.2
P3.1
P3.0
PORT3
RESET
INT
TST1
TST2
P2.3
P2.2
P2.1
P2.0
5
INT
TST
VR
INT
PORT2
BC
VSSL
L0
L1
P1.3
P1.2
P1.1
P1.0
LCD
CAPR
PORT1
L23
INT
VSS1
VSS2
VSS3
C1
P0.3
P0.2
P0.1
P0.0
PORT0
BIAS
PORT ADDRESS
DB7 to DB0
C2
INT
VDD
BD
ADC
3/37
¡ Semiconductor
MSM64162D
PIN CONFIGURATION (TOP VIEW)
1
2
3
4
5
6
7
8
9
P3.1
L0
L1
L2
L3
L4
L5
L6
L7
L8
51
50 P3.0
P2.3
49
48 P2.2
47
46
45
P2.1
P2.0
(NC)
44 (NC)
(NC)
43
L9 10
L10 11
L11 12
L12 13
L13 14
L14 15
L15 16
42 (NC)
41 IN0
40 CS0
39 RS0
38 CRT0
37 RT0
36 P0.3
35 P0.2
34 P0.1
L16/P5.0 17
L17/P5.1 18
19
P0.0
L18/P5.2
33
64-Pin Plastic QFP
Note: Pins marked as (NC) are no-connection pins which are left open.
4/37
¡ Semiconductor
MSM64162D
PIN CONFIGURATION (TOP VIEW) (continued)
64
63
62
61
1
TST2
P0.0
P0.1
P0.2
P0.3
RT0
L19/P5.3
2
L18/P5.2
L17/P5.1
L16/P5.0
3
4
5
60 L15
59
6
(NC)
7
58 L14
(NC)
CRT0
RS0
CS0
57
8
L13
9
56 L12
55
L11
54 L10
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
IN0
53
(NC)
(NC)
(NC)
(NC)
(NC)
P2.0
P2.1
P2.2
P2.3
P3.0
(NC)
P3.1
(NC)
(NC)
52
L9
51 L8
50
49
48
47
L7
L6
L5
L4
46 L3
45
L2
44
L1
43
L0
42
C2
41
C1
80-Pin Plastic QFP
Notes: 1. Pins marked as (NC) are no-connection pins which are left open.
2. V should be supplied from pin 74. Pin 32 is internally connected to V
.
DD
DD
5/37
¡ Semiconductor
MSM64162D
PAD CONFIGURATION
Pad Layout
44 43 42 41 40
3938 37 36 35 34 33 32 31
45
46
47
30
29
28
27
26
48
49
50
51
52
25
(NC)
(NC)
24
53
54
23
22
55
56
57
58
21
20
19
y
1
2 3
4
5 6 7 8 9 10 111213 14 15 16 17 18
x
Chip Size
: 4.69 mm ¥ 4.41 mm
: 350 mm (typ.)
: Chip center
: 110 mm ¥ 110 mm
: 130 mm ¥ 130 mm
: 180 mm
Chip Thickness
Coordinate Origin
Pad Hole Size
Pad Size
Minimum Pad Pitch
Note: The chip substrate voltage is V
.
DD
6/37
¡ Semiconductor
MSM64162D
Pad Coordinates
Pad No.
1
Pad Name
L0
X (µm)
–2168
–1918
–1669
–1426
–1170
–934
–727
–519
–312
–104
104
Y (µm)
–2042
–2042
–2042
–2042
–2042
–2042
–2042
–2042
–2042
–2042
–2042
–2042
–2042
–2042
–2042
–2042
–2042
–2042
–2042
–1714
–1424
–1134
–844
Pad No.
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
Pad Name
TST2
P0.0
P0.1
P0.2
P0.3
RT0
X (µm)
Y (µm)
1766
2042
2042
2042
2042
2042
2042
2042
2042
2042
2042
2042
2042
2042
2042
1829
1563
1382
1017
688
2168
2168
2
L1
3
L2
1899
4
L3
1628
5
L4
1364
6
L5
1100
7
L6
CRT0
RS0
CS0
829
8
L7
565
9
L8
349
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
L9
IN0
141
L10
P2.0
P2.1
P2.2
P2.3
P3.0
P3.1
P3.2
P3.3
BD
–911
L11
311
–1160
–1416
–1666
–1916
–2168
–2168
–2168
–2168
–2168
–2168
–2168
–2168
–2168
–2168
–2168
–2168
–2168
–2168
L12
527
L13
791
L14
1062
1340
1618
1897
2168
2168
2168
2168
2168
2168
2168
2168
2168
2168
2168
L15
L16/P5.0
L17/P5.1
L18/P5.2
L19/P5.3
L20/P6.0
L21/P6.1
L22/P6.2
L23/P6.3
VDD
P1.0
P1.1
P1.2
P1.3
VSS1
VSS2
VSSL
VSS3
C1
328
6
–353
–645
–826
–1254
–1435
–1616
–1796
–554
316
XT
606
XT
896
RESET
TST1
1186
1476
C2
7/37
¡ Semiconductor
MSM64162D
PIN DESCRIPTIONS
Basic Functions
Function
Symbol
VDD
Type
—
Description
0 V power supply
Bias output for driving LCD (–1.5 V), or negative power supply at 1.5 V spec.
Bias output for driving LCD (–3.0 V), or negative power supply at 3.0 V spec.
Bias output for driving LCD (–4.5 V).
VSS1
—
VSS2
—
Power
Supply
VSS3
—
Negative power supply pin for internal logic (internally generated constant
voltage)
VSSL
—
Pins for connecting a capacitor for generating VSS1, VSS2, and VSS3
.
C1, C2
XT
—
I
Oscillation
Ports
32.768 kHz crystal connection pins
XT
O
O
I
Output port (P1.0 : high current output)
Input port
P1.0 to P1.3
P0.0 to P0.3
P2.0 to P3.3
BD
Input-output ports
I/O
O
O
Output pin for the buzzer driver
LCD driver pins
L0 to L15
L16/P5.0 to
L23/P6.3
RT0
LCD driver pins, or output ports by mask option
O
O
O
Resistance temperature sensor connection pin
Resistance/capacitance temperature sensor
connection pin
CRT0
A/D
Reference resistor connection pin
Reference capacitor connection pin
Input pin for RC oscillator circuit
Reset pin
Converter
RS0
CS0
O
O
I
IN0
Reset
Test
RESET
TST1
TST2
I
I
Input pins for testing
I
8/37
¡ Semiconductor
MSM64162D
Secondary Functions
Function
RC Oscillation Monitor
Battery Check
Symbol
Type
Description
P3.3
P0.3
P3.0
P3.1
P3.2
P3.3
P2.0
P2.1
P2.2
P2.3
P0.0
P0.1
P0.2
P0.3
P0.0
P0.1
O
I
I
I
I
I
I
I
I
I
I
I
I
I
I
I
Monitor output pin (MON) for an RC oscillation clock.
Analog comparator input pin for battery check.
Level-triggered external 0 interrupt input pins.
The change of input signal level causes an interrupt to occur.
External
Interrupt
Level-triggered external 1 interrupt input pins.
The change of input signal level causes an interrupt to occur.
Capture circuit trigger input pins.
Capture
9/37
¡ Semiconductor
MSM64162D
MEMORY MAPS
Program Memory
Test program area
07FFH
07E0H
32 bytes
Contents of interrupt area
03BH
038H
032H
02FH
02CH
029H
026H
023H
020H
Watchdog interrupt
External interrupt (0)
External interrupt (1)
ADC interrupt
2016 bytes
256 Hz interrupt
32 Hz interrupt
03EH
16 Hz interrupt
1 Hz interrupt
30
bytes
Interrupt area
020H
4 Hz interrupt
CZP area
010H
Start address
000H
8 bits
Program Memory Map
Address 000H is the instruction execution start address by the system reset.
The CZP area from address 010H to address 01FH is the start address for the CZP subroutine of
1-byte call instruction.
The start address of interrupt subroutine is assigned to the interrupt address from address 020H
to 03DH.
The user area has 2016 bytes of address 000H to address 07DFH. No program can be stored in
the test program area.
10/37
¡ Semiconductor
MSM64162D
Data Memory
The data memory area consists of 8 banks and each bank has 256 nibbles (256 ¥ 4 bits).
The data RAM is assigned to BANK 7 and peripheral ports are assigned to BANK 0.
7FFH
BANK 7
Data/Stack area (128 nibbles)
Data RAM area
780H
77FH
Unused area
700H
Contents of 000H to 07FH
07FH
Inaccessible area
SFR area
100H
0FFH
Unused area
BANK 0
080H
07FH
000H
000H
4 bits
Data Memory Map
The data RAM area (128 nibbles) is shared by the stack area. The stack is a memory starting from
address 7FFH toward the low-order addresses where 4 nibbles are used by Subroutine Call
Instruction and 8 nibbles are used by an interrupt.
The addresses 080H to 0FFH of BANK 0 and the addresses 700H to 77FH of BANK 7 are not
assigned as the data memory, so access to these addresses has no effect. Moreover, it is
impossible to access BANK 1 to BANK 6.
11/37
¡ Semiconductor
MSM64162D
ABSOLUTE MAXIMUM RATINGS (1.5 V Spec.)
(VDD = 0 V)
Parameter
Power Supply Voltage 1
Power Supply Voltage 2
Power Supply Voltage 3
Power Supply Voltage 4
Input Voltage 1
Symbol
VSS1
Condition
Ta = 25°C
Rating
Unit
V
–2.0 to +0.3
VSS2
Ta = 25°C
–4.0 to +0.3
V
VSS3
Ta = 25°C
–5.5 to +0.3
V
VSSL
Ta = 25°C
–2.0 to +0.3
V
VIN1
VSS1 Input, Ta = 25°C
VSSL Input, Ta = 25°C
VSS1 Output, Ta = 25°C
VSS2 Output, Ta = 25°C
VSS3 Output, Ta = 25°C
VSSL Output, Ta = 25°C
—
VSS1 – 0.3 to +0.3
VSSL – 0.3 to +0.3
VSS1 – 0.3 to +0.3
VSS2 – 0.3 to +0.3
VSS3 – 0.3 to +0.3
VSSL – 0.3 to +0.3
–55 to +150
V
Input Voltage 2
VIN2
V
Output Voltage 1
VOUT1
VOUT2
VOUT3
VOUT4
TSTG
V
Output Voltage 2
V
Output Voltage 3
V
Output Voltage 4
V
Storage Temperature
°C
RECOMMENDED OPERATING CONDITIONS (1.5 V Spec.)
(VDD = 0 V)
Parameter
Operating Temperature
Operating Voltage
Symbol
Top
Condition
Range
–40 to +85
–1.7 to –1.25
30 to 35
Unit
°C
—
—
—
VSS1
fXT
V
Crystal Oscillation Frequency
kHz
12/37
¡ Semiconductor
MSM64162D
ELECTRICAL CHARACTERISTICS (1.5 V Spec.)
DC Characteristics
(VDD = 0 V, VSS1 = –1.5 V, Ta = –40 to +85°C unless otherwise specified)
Measuring
Parameter
Symbol
Condition
Min. Typ. Max. Unit
Circuit
+100%
–50%
VSS2 Voltage
VSS3 Voltage
SSL Voltage
VSS2 Ca, Cb, C12 = 0.1 mF
VSS3 Ca, Cb, C12 = 0.1 mF
–3.2
–3.0
–2.8
V
+100%
–50%
–4.7
–1.5
—
–4.5
–1.3
—
–4.3
–0.6
V
V
V
V
VSSL
VSTA
—
Oscillation start time:
within 5 seconds
Crystal Oscillation
Start Voltage
–1.45
Crystal Oscillation
Hold Voltage
VHOLD
TSTOP
CG
—
—
—
—
0.1
10
—
—
15
—
15
—
—
–1.25
1000
20
V
ms
pF
Crystal Oscillation
Stop Detection Time
Internal Crystal
Oscillator Capacitance
External Crystal
Oscillator Capacitance
Internal Crystal
Oscillator Capacitance
POR Generation
Voltage
1
CGEX When external CG used
10
30
pF
CD
—
10
20
pF
When VSS1 is between VPOR1
and –1.5 V
VPOR1
VPOR2
VRB
–0.4
–1.5
0
V
POR Non-generation
Voltage
No POR when VSS1 is between
VPOR2 and –1.5 V
–1.2
V
Battery Check
Ta = 25°C
–0.73 –0.63 –0.53
–2.0
V
Reference Voltage
2
V
RB Temperature
DVRB
—
—
—
mV/°C
Variation
Notes: 1. "POR" denotes Power On Reset.
2. "T " indicates that if the crystal oscillator stops over the value of T
, the
STOP
STOP
system reset occurs.
13/37
¡ Semiconductor
MSM64162D
DC Characteristics (continued)
(VDD = 0 V, VSS1 = –1.5 V, Ta = –40 to +85°C unless otherwise specified)
Measuring
Parameter
Symbol
Condition
Min. Typ. Max. Unit
Circuit
Ta = –40 to +40°C
—
—
—
—
2.0
2.0
5.0
5.0
5.0
30
15
40
mA
mA
mA
mA
Supply Current 1
Supply Current 2
IDD1 CPU in halt state
Ta = +40 to +85°C
CPU in operating Ta = –40 to +40°C
IDD2
IDD3
IDD4
state
Ta = +40 to +85°C
CPU in halt state,
RC oscillator for
A/D converter is in
operating state
RT0 = 10 kW
—
—
—
150
600
25
230
900
125
mA
mA
mA
1
Supply Current 3
Supply Current 4
RT0 = 2 kW
Battery check circuit in operating
state, CPU in operating state
14/37
¡ Semiconductor
MSM64162D
DC Characteristics (continued)
(VDD = 0 V, VSS1 = VSSL = –1.5 V, VSS2 = –3.0 V, VSS3 = –4.5 V,
Ta = –40 to +85°C unless otherwise specified)
Measuring
Circuit
Parameter
(Pin Name)
Min.
Typ. Max.
Symbol
Condition
Unit
Output Current 1
(P1.0)
IOH1
IOL1
VOH1 = –0.5 V
VOL1 = VSS1 + 0.5 V
–2.1
1.0
–0.7
3.0
–0.2
9.0
mA
mA
Output Current 2
(P1.1 to P1.3)
(P2.0 to P2.3)
(P3.0 to P3.3)
IOH2
IOL2
V
OH2 = –0.5 V
–2.1
0.2
–0.7
0.7
–0.2
2.1
mA
mA
VOL2 = VSS1 + 0.5 V
IOH3
IOL3
IOH4
IOL4
VOH3 = –0.7 V
–1.8
0.2
–0.6
0.6
–0.2
1.8
mA
mA
mA
mA
Output Current 3
(BD)
VOL3 = VSS1 + 0.7 V
VOH4 = –0.1 V
Output Current 4
(RT0, RS0, CRT0,
CS0)
–1.1
0.3
–0.6
0.6
–0.3
1.1
VOL4 = VSS1 + 0.1 V
Output Current 5
(When L16 to L23 are
configured as output
ports)
IOH5
VOH5 = –0.5 V
–1.5
–0.5
0.5
–0.1
1.5
mA
mA
2
IOL5
IOH6
VOL5 = VSS1 + 0.5 V
VOH6 = –0.2 V
0.1
—
(VDD level)
—
—
—
—
—
—
–4.0
—
mA
mA
mA
mA
mA
mA
IOMH6 VOMH6 = VSS1 + 0.2 V (VSS1 level) 4.0
IOMH6S VOMH6S = VSS1 – 0.2 V (VSS1 level)
IOML6 VOML6 = VSS2 + 0.2 V (VSS2 level) 4.0
IOML6S VOML6S = VSS2 – 0.2 V (VSS2 level)
Output Current 6
(L0 to L23)
—
–4.0
—
—
–4.0
—
IOL6
VOL6 = VSS3 + 0.2 V (VSS3 level) 4.0
Output Leakage Current
(P1.0 to P1.3)
(P2.0 to P2.3)
(P3.0 to P3.3)
(RT0, RS0, CRT0,
CS0)
IOOH
VOH = VDD
—
—
—
0.3
—
mA
mA
IOOL
VOL = VSS1
–0.3
15/37
¡ Semiconductor
MSM64162D
DC Characteristics (continued)
(VDD = 0 V, VSS1 = VSSL = –1.5 V, VSS2 = –3.0 V, VSS3 = –4.5 V,
Ta = –40 to +85°C unless otherwise specified)
Measuring
Circuit
Parameter
(Pin Name)
Min.
Typ. Max.
Symbol
Condition
Unit
IIH1
IIL1
VIH1 = VDD (when pulled down)
VIL1 = VSS1 (when pulled up)
VIH1 = VDD (in a high impedance state)
5
–60
0
18
–18
—
—
18
—
—
—
60
–5.0
1.0
0
mA
mA
mA
mA
mA
mA
mA
mA
mA
Input Current 1
(P0.0 to P0.3)
(P2.0 to P2.3)
(P3.0 to P3.3)
(P4.0 to P4.3)
IIH1Z
IIL1Z
IIH2
VIL1 = VSS1 (in a high impedance state) –1.0
VIH2 = VDD (when pulled down)
VIH2 = VDD (in a high impedance state)
5
0
60
3
Input Current 2
(IN0)
IIH2Z
IIL2Z
IIH3
1.0
0
VIL2 = VSS1 (in a high impedance state) –1.0
VIH3 = VDD
VIL3 = VSS1
0
1.0
Input Current 3
(RESET, TST1, TST2)
IIL3
–1.5
–0.75 –0.3
Input Voltage 1
(P0.0 to P0.3)
(P2.0 to P2.3)
(P3.0 to P3.3)
VIH1
VIL1
—
—
–0.3
–1.5
—
—
0
V
V
–1.2
VIH2
VIL2
VIH3
VIL3
—
—
—
—
–0.3
–1.5
–0.3
–1.5
—
—
—
—
0
V
V
V
V
4
Input Voltage 2
(IN0)
–1.2
0
Input Voltage 3
(RESET, TST1, TST2)
–1.2
16/37
¡ Semiconductor
MSM64162D
DC Characteristics (continued)
(VDD = 0 V, VSS1 = VSSL = –1.5 V, VSS2 = –3.0 V, VSS3 = –4.5 V,
Ta = –40 to +85°C unless otherwise specified)
Measuring
Circuit
Parameter
(Pin Name)
Min.
Typ. Max.
Symbol
Condition
Unit
Hysteresis Width
(P0.0 to P0.3)
(P2.0 to P2.3)
DVT1
—
—
—
0.05
0.05
—
0.1
0.1
—
0.3
0.3
5.0
V
V
(P3.0 to P3.3)
4
1
Hysteresis Width
(RESET, TST1, TST2)
DVT2
Input Pin Capacitance
(P0.0 to P0.3)
(P2.0 to P2.3)
CIN
pF
(P3.0 to P3.3)
17/37
¡ Semiconductor
MSM64162D
Measuring circuit 1
CS0
RT0
RI0
RT0
CS0
IN0
XT
Crystal
32.768 kHz
XT
C1
C2
C12
VSSL
VDD
VSS1
VSS2
VSS3
Ca, Cb, C12, Cl : 0.1 mF
A
RT0
CS0
RI0
: 10 kW/2 kW
Ca
Cb
Cl
: 820 pF
: 10 kW
V
V
V
Measuring circuit 2
(*2)
VIH
A
(*1)
VIL
VDD
VSS1
VSS2
VSS3
VSSL
18/37
¡ Semiconductor
MSM64162D
Measuring circuit 3
(*3)
A
VDD
VSS1
VSS2
VSS3
VSSL
Measuring circuit 4
VIH
Waveform
Monitoring
(*3)
VIL
VDD
VSS1
VSS2
VSS3
VSSL
*1 Input logic circuit to determine the specified measuring conditions.
*2 Measured at the specified output pins.
*3 Measured at the specified input pins.
19/37
¡ Semiconductor
MSM64162D
A/D Converter Characteristics
(VDD = 0 V, VSS1 = –1.5 V, Ta = –40 to +85°C unless otherwise specified)
Measur-
ing
Circuit
Min. Typ. Max.
Parameter
Symbol
Condition
CS0, CT0 ≥ 740 pF
—
Unit
Resistor
for Oscillation
RS0, RT0,
RT0-1
—
10
—
—
2.0
1.0
kW
Input Current
Limiting Resistor
RI0
kW
5
fOSC1
fOSC2
fOSC3
Kf1
Resistor for oscillation = 2 kW
Resistor for oscillation = 10 kW
Resistor for oscillation = 200 kW
RT0, RT0-1 = 2 kW
165
41.8
2.55
3.89
0.990
221
52.2
3.04
4.18
1.0
256
60.6
3.53
4.35
1.010
kHz
kHz
kHz
—
Oscillation
Frequency
RS•RT Oscillation
Frequency Ratio (*)
Kf2
RT0, RT0-1 = 10 kW
—
Kf3
RT0, RT0-1 = 200 kW
0.0561 0.0584 0.0637
—
*
Kfx is the ratio of the oscillation frequency by a sensor resistor to the oscillation frequency
by a reference resistor in the same condition.
fOSCX (RT0–CS0 Oscillation)
fOSCX (RT0-1–CS0 Oscillation)
fOSCX (RS0–CS0 Oscillation)
Kfx =
,
fOSCX (RS0–CS0 Oscillation)
(x = 1, 2, 3)
20/37
¡ Semiconductor
MSM64162D
Measuring circuit 5
IN0 CS0 RS0 CRT0 RT0
RESET
TST1
TST2
P0.0
Frequency
Measurement (fOSCX
P3.3
)
D. U. T.
P0.1
P0.2
P0.3
VDD
VSSL
VSS2
Cl
RT0, RT0-1 = 2 kW/10 kW/200 kW
RS0 = 10 kW
RI0 = 10 kW
CS0, CT0 = 820 pF
Cl = 0.1 mF
21/37
¡ Semiconductor
MSM64162D
ABSOLUTE MAXIMUM RATINGS (3.0 V Spec.)
(VDD = 0 V)
Parameter
Power Supply Voltage 1
Power Supply Voltage 2
Power Supply Voltage 3
Power Supply Voltage 4
Input Voltage 1
Symbol
VSS1
Condition
Ta = 25°C
Rating
Unit
V
–2.0 to +0.3
VSS2
Ta = 25°C
–4.0 to +0.3
V
VSS3
Ta = 25°C
–5.5 to +0.3
V
VSSL
Ta = 25°C
–4.0 to +0.3
V
VIN1
VSS2 Input, Ta = 25°C
VSSL Input, Ta = 25°C
VSS2 Output, Ta = 25°C
VSS3 Output, Ta = 25°C
VSSL Output, Ta = 25°C
—
VSS2 – 0.3 to +0.3
VSSL – 0.3 to +0.3
VSS2 – 0.3 to +0.3
VSS3 – 0.3 to +0.3
VSSL – 0.3 to +0.3
–55 to +150
V
Input Voltage 2
VIN2
V
Output Voltage 1
VOUT1
VOUT2
VOUT3
TSTG
V
Output Voltage 2
V
Output Voltage 3
V
Storage Temperature
°C
RECOMMENDED OPERATING CONDITIONS (3.0 V Spec.)
(VDD = 0 V)
Unit
Parameter
Symbol
Condition
—
Range
Operating Temperature
Top
–40 to +85
°C
Using LCD driver with
"duty 1/2"
–3.5 to –2.2
Operating Voltage
VSS2
V
Except using LCD driver
with "duty 1/2"
—
–3.5 to –2.0
30 to 66
Crystal Oscillation Frequency
fXT
kHz
22/37
¡ Semiconductor
MSM64162D
ELECTRICAL CHARACTERISTICS (3.0 V Spec.)
DC Characteristics
(VDD = 0 V, VSS2 = –3.0 V, Ta = –40 to +85°C unless otherwise specified)
Measuring
Parameter
Symbol
Condition
Min. Typ. Max. Unit
Circuit
+100%
–50%
VSS1 Voltage
VSS3 Voltage
SSL Voltage
VSS1 Ca, Cb, C12 = 0.1 mF
VSS3 Ca, Cb, C12 = 0.1 mF
–1.7
–1.5
–1.3
V
+100%
–50%
–4.7
–1.9
—
–4.5
–1.3
—
–4.3
–0.6
–2.0
V
V
V
V
VSSL
VSTA
—
Oscillation start time:
within 5 seconds
Crystal Oscillation
Start Voltage
Crystal Oscillation
Hold Voltage
VHOLD
TSTOP
CG
—
—
—
—
0.1
10
—
—
15
—
15
—
—
–2.0
1000
20
V
ms
pF
Crystal Oscillation
Stop Detection Time
Internal Crystal
Oscillator Capacitance
External Crystal
Oscillator Capacitance
Internal Crystal
Oscillator Capacitance
POR Generation
Voltage
1
CGEX When external CG used
10
30
pF
CD
—
10
20
pF
When VSS2 is between VPOR1
and –3.0 V
VPOR1
VPOR2
VRB
–0.7
–3.0
0
V
POR Non-generation
Voltage
No POR when VSS2 is between
VPOR2 and –3.0 V
–2.0
V
Battery Check
Ta = 25°C
–0.73 –0.63 –0.53
–2.0
V
Reference Voltage
2
VRB Temperature
DVRB
—
—
—
mV/°C
Variation
Notes: 1. "POR" denotes Power On Reset.
2. "T " indicates that if the crystal oscillator stops over the value of T
, the
STOP
STOP
system reset occurs.
23/37
¡ Semiconductor
MSM64162D
DC Characteristics (continued)
(VDD = 0 V, VSS2 = –3.0 V, Ta = –40 to +85°C unless otherwise specified)
Measuring
Parameter
Symbol
Condition
Min. Typ. Max. Unit
Circuit
Ta = –40 to +40°C
—
—
—
—
1.5
1.5
5.0
5.0
4.5
30
15
40
mA
mA
mA
mA
Supply Current 1
Supply Current 2
IDD1 CPU in halt state
Ta = +40 to +85°C
CPU in operating Ta = –40 to +40°C
IDD2
IDD3
IDD4
state
Ta = +40 to +85°C
CPU in halt state,
RC oscillator for
A/D converter is in
operating state
RT0 = 10 kW
—
—
—
300
450
mA
mA
mA
1
Supply Current 3
Supply Current 4
RT0 = 2 kW
1300 2000
55 150
Battery check circuit in operating
state, CPU in operating state
24/37
¡ Semiconductor
MSM64162D
DC Characteristics (continued)
(VDD = 0 V, VSS1 = VSSL = –1.5 V, VSS2 = –3.0 V, VSS3 = –4.5 V,
Ta = –40 to +85°C unless otherwise specified)
Measuring
Circuit
Parameter
(Pin Name)
Min.
Typ. Max.
Symbol
Condition
Unit
IOH1
IOL1
VOH1 = –0.5 V
–6.0
3.0
–2.0
8.0
–0.7
25
mA
mA
Output Current 1
(P1.0)
VOL1 = VSS2 + 0.5 V
VOH2 = –0.5 V
Output Current 2
(P1.1 to P1.3)
(P2.0 to P2.3)
(P3.0 to P3.3)
IOH2
IOL2
–6.0
0.7
–2.0
2.0
–0.7
6.0
mA
mA
VOL2 = VSS2 + 0.5 V
IOH3
IOL3
IOH4
IOL4
VOH3 = –0.7 V
–6.0
0.7
–2.0
2.0
–0.7
6.0
mA
mA
mA
mA
Output Current 3
(BD)
VOL3 = VSS2 + 0.7 V
VOH4 = –0.1 V
Output Current 4
(RT0, RS0, CRT0,
CS0)
–2.5
0.7
–1.3
1.3
–0.7
2.5
VOL4 = VSS2 + 0.1 V
Output Current 5
(When L16 to L23 are
configured as output
ports)
IOH5
VOH5 = –0.5 V
–1.5
–0.6 –0.15 mA
IOL5
IOH6
VOL5 = VSS2 + 0.5 V
VOH6 = –0.2 V
0.15
—
0.6
1.5
mA
2
(VDD level)
—
—
—
—
—
—
–4.0
—
mA
mA
mA
mA
mA
mA
IOMH6 VOMH6 = VSS1 + 0.2 V (VSS1 level) 4.0
IOMH6S VOMH6S = VSS1 – 0.2 V (VSS1 level)
IOML6 VOML6 = VSS2 + 0.2 V (VSS2 level) 4.0
IOML6S VOML6S = VSS2 – 0.2 V (VSS2 level)
—
–4.0
—
Output Current 6
(L0 to L23)
—
–4.0
—
IOL6
VOL6 = VSS3 + 0.2 V (VSS3 level) 4.0
Output Leakage Current
(P1.0 to P1.3)
(P2.0 to P2.3)
(P3.0 to P3.3)
(RT0, RS0, CRT0,
CS0)
IOOH
VOH = VDD
—
—
—
0.3
—
mA
mA
IOOL
VOL = VSS2
–0.3
25/37
¡ Semiconductor
MSM64162D
DC Characteristics (continued)
(VDD = 0 V, VSS1 = VSSL = –1.5 V, VSS2 = –3.0 V, VSS3 = –4.5 V,
Ta = –40 to +85°C unless otherwise specified)
Measuring
Circuit
Parameter
(Pin Name)
Min.
Typ. Max.
Symbol
Condition
Unit
IIH1
IIL1
VIH1 = VDD (when pulled down)
VIL1 = VSS2 (when pulled up)
VIH1 = VDD (in a high impedance state)
30
–300
0
90
–90
—
—
90
—
—
—
300
–30
1.0
0
mA
mA
mA
mA
mA
mA
mA
mA
Input Current 1
(P0.0 to P0.3)
(P2.0 to P2.3)
(P3.0 to P3.3)
IIH1Z
IIL1Z
IIH2
VIL1 = VSS2 (in a high impedance state) –1.0
VIH2 = VDD (when pulled down)
VIH2 = VDD (in a high impedance state)
30
0
300
1.0
0
3
Input Current 2
(IN0)
IIH2Z
IIL2Z
IIH3
VIL2 = VSS2 (in a high impedance state) –1.0
VIH3 = VDD
VIL3 = VSS2
0
1.0
Input Current 3
(RESET, TST1, TST2)
IIL3
–3.0
–1.5 –0.75 mA
Input Voltage 1
(P0.0 to P0.3)
(P2.0 to P2.3)
(P3.0 to P3.3)
VIH1
VIL1
—
—
–0.6
–3.0
—
—
0
V
V
–2.4
VIH2
VIL2
VIH3
VIL3
—
—
—
—
–0.6
–3.0
–0.6
–3.0
—
—
—
—
0
V
V
V
V
Input Voltage 2
(IN0)
4
–2.4
0
Input Voltage 3
(RESET, TST1, TST2)
–2.4
26/37
¡ Semiconductor
MSM64162D
DC Characteristics (continued)
(VDD = 0 V, VSS1 = VSSL = –1.5 V, VSS2 = –3.0 V, VSS3 = –4.5 V,
Ta = –40 to +85°C unless otherwise specified)
Measuring
Circuit
Parameter
(Pin Name)
Min.
Typ. Max.
Symbol
Condition
Unit
Hysteresis Width
(P0.0 to P0.3)
(P2.0 to P2.3)
(P3.0 to P3.3)
DVT1
—
—
—
0.2
0.2
—
0.5
0.5
—
1.0
1.0
5.0
V
V
4
1
Hysteresis Width
(RESET, TST1, TST2)
DVT2
Input Pin Capacitance
(P0.0 to P0.3)
(P2.0 to P2.3)
CIN
pF
(P3.0 to P3.3)
27/37
¡ Semiconductor
MSM64162D
Measuring circuit 1
CS0
RT0
RI0
RT0
CS0
IN0
XT
Crystal
32.768 kHz
XT
C1
C2
C12
VSSL
VDD
VSS1
VSS2
VSS3
Cl
: 0.47 mF
: 0.1 mF
A
Ca, Cb, C12
RT0
CS0
Ca
Cb
Cl
: 10 kW/2 kW
V
V
V
: 820 pF
RI0
: 10 kW
Measuring circuit 2
(*2)
VIH
A
(*1)
VIL
VDD
VSS1
VSS2
VSS3
VSSL
28/37
¡ Semiconductor
MSM64162D
Measuring circuit 3
(*3)
A
VDD
VSS1
VSS2
VSS3
VSSL
Measuring circuit 4
VIH
Waveform
Monitoring
(*3)
VIL
VDD
VSS1
VSS2
VSS3
VSSL
*1 Input logic circuit to determine the specified measuring conditions.
*2 Measured at the specified output pins.
*3 Measured at the specified input pins.
29/37
¡ Semiconductor
MSM64162D
A/D Converter Characteristics
(VDD = 0 V, VSS2 = –3.0 V, Ta = –40 to +85°C unless otherwise specified)
Measur-
Parameter
Symbol
Condition
CS0, CT0 ≥ 740 pF
—
Min. Typ. Max. Unit
ing
Circuit
Resistor
for Oscillation
RS0, RT0,
RT0-1
—
10
—
—
1.0
1.0
kW
kW
Input Current
Limiting Resistor
RI0
5
fOSC1
fOSC2
fOSC3
Kf1
Resistor for oscillation = 2 kW
Resistor for oscillation = 10 kW
Resistor for oscillation = 200 kW
RT0, RT0-1 = 2 kW
200
46.5
2.79
239
55.4
3.32
277
64.3
3.85
kHz
kHz
kHz
—
Oscillation
Frequency
4.115 4.22 4.326
0.990 1.0 1.010
0.0573 0.0616 0.0659
RS•RT Oscillation
Frequency Ratio(*)
Kf2
RT0, RT0-1 = 10 kW
—
Kf3
RT0, RT0-1 = 200 kW
—
*
Kfx is the ratio of the oscillation frequency by a sensor resistor to the oscillation frequency
by a reference resistor in the same condition.
fOSCX (RT0–CS0 Oscillation)
fOSCX (RT0-1–CS0 Oscillation)
fOSCX (RS0–CS0 Oscillation)
Kfx =
,
fOSCX (RS0–CS0 Oscillation)
(x = 1, 2, 3)
30/37
¡ Semiconductor
MSM64162D
Measuring circuit 5
IN0 CS0 RS0 CRT0 RT0
RESET
TST1
TST2
P0.0
Frequency
Measurement (fOSCX
P3.3
)
D. U. T.
P0.1
P0.2
P0.3
VDD
VSSL
VSS2
Cl
RT0, RT0-1 = 2 kW/10 kW/200 kW
RS0 = 10 kW
RI0 = 10 kW
CS0, CT0 = 820 pF
Cl = 0.47 mF
31/37
¡ Semiconductor
MSM64162D
FUNCTIONAL DESCRIPTION
• A/D converter (ADC)
TheMSM64162Dhasabuilt-in1-channelRCoscillationtypeA/Dconverter. TheA/Dconverter
is composed of a 1-channel oscillation circuit, Counter A (CNTA0-4, a 4.8-digit decade counter),
Counter B (CNTB0-3, a 14-bit binary counter), and A/D Converter Control Registers 0 and 1
(ADCON0, ADCON1).
By counting oscillation frequencies that vary depending on a resistor or capacitor connected to
the RC oscillation circuit, the A/D converter converts resistance values or capacitance values to
corresponding digital values. By using a thermistor or humidity sensor as a resistance, a
thermometer or a hygrometer can be constructed.
• LCD driver (LCD)
The MSM64162D has a built-in LCD driver for 24 outputs.
The LCD driver consists of 21 ¥ 4-bit display registers (DSPR0-20), the Display Control Register
(DSPCON), a 24-output LCD driver circuit, and a bias generation circuit (BIAS).
There are three types of driving methods: 1/4 duty, 1/3 duty and 1/2 duty. Software selects the
duty mode.
A mask option can select either a common driver or a segment driver for each LCD driver pin.
A mask option can also specify assignment of each bit of the display register to each segment.
All the display registers must be selected by a mask option.
L16 to L23 of the LCD driver can be configured to be output ports by a mask option.
Therelationshipbetweentheduty,thebiasmethod,andthemaximumsegmentnumberfollows:
1/4 duty 1/3 bias method ------- 80 segments
1/3 duty 1/3 bias method ------- 63 segments
1/2 duty 1/2 bias method ------- 44 segments
• Buzzer driver (BD)
The MSM64162D has a built-in buzzer driver with 2 buzzer output frequencies and 4 buzzer
output modes. Each buzzer output is selected by the Buzzer Control Register (BDCON) and the
Buzzer Frequency Control Register (BFCON).
• Capture circuit (CAPR)
The MSM64162D captures 32 Hz to 256 Hz output of the time base counter at the falling of Port
0.0 or 0.1 (P0.0 or P0.1) to "L" level when the pull-up resistor input is chosen, or at the rising to
"H" level when the pull-down resistor input is chosen. The capture circuit is composed of the
Capture Control Register (CAPCON) and the Capture Registers (CAPR0, CAPR1) that fetch
output from the time base counter.
• Watchdog timer (WDT)
The MSM64162D has a built-in watchdog timer to detect CPU malfunction. The watchdog timer
is composed of a 6-bit watchdog timer counter (WDTC) to count a 16 Hz output and a watchdog
timer control register (WDTCON) to reset WDTC.
32/37
¡ Semiconductor
MSM64162D
• Clock generation circuit (CLKG)
The clock generation circuit (CLKG) in the MSM64162D contains a 32.768 kHz crystal oscillation
circuit. This circuit generates the system clock (CLK) and the time base clock (32.768 kHz).
The system clock drives the CPU while the time base clock drives the time base counter and the
buzzer driver.
The system clock frequency is 32.768 kHz, which is the output of the crystal oscillation circuit.
• Time base counter (TBC)
The MSM64162D has a built-in time base counter (TBC) that generates clocks to be supplied to
internal peripheral circuits. The time base counter is composed of 15 binary counters. The count
clock of the time base is driven by the oscillation clock (32.768 kHz) of the crystal oscillation
circuit. The output of the time base counter is used for the buzzer driver, the system reset circuit,
the watchdog timer, the time base interrupt, the sampling clocks of each port, and the capture
circuit.
• I/O port
Input-output ports (P2, P3) (8 bits)
: Pull-up (pull-down) resistor input or high-
impedance input, CMOS output or NMOS
open drain output: these can be specified for
each bit; external 0 interrupt
Input port (P0) (4 bits)
Output port (P1) (4 bits)
: Pull-up (pull-down) resistor input or high-
impedance input; external 1 interrupt
: CMOS output or NMOS open drain output
• Interrupt (INTC)
The MSM64162D has 9 interrupt sources (9 vector addresses), of which two are external
interrupts from ports and seven are internal interrupts.
Of the nine interrupt sources, only the watchdog interrupt cannot be disabled (non-maskable
interrupt). The other eight interrupts are controlled by the master interrupt enable flag (MI) and
the interrupt enable registers (IE0, IE1 and IE2). When an interrupt condition is met, the CPU
branches to a vector address corresponding to the interrupt source.
• Battery check circuit (BC)
The battery check circuit (BC) detects the level of the supply voltage by comparing the voltage
generated by an external supply-voltage dividing resistor (RBLD) with the internal reference
voltage (Vrb).
33/37
L C D
L23
L0
Crystal
32.768 kHz
VDD
C2
XT
C1
XT
C1
VSS3
VSS2
C12
1.5 V
RESET
P1.0
P1.1
P1.2
P1.3
P0.0
P0.1
P0.2
P0.3
MSM64162D-xxx
(1.5 V spec.)
Cb
Ca
VSS1
VSSL
TST2
TST1
Cl
Switch matrix
(4 ¥ 4)
RT0
RS0
RI0
CS0
Buzzer
OSC monitor
L C D
L23
L0
Crystal
32.768 kHz
VDD
C2
XT
C2
XT
C1
VSS3
VSS2
C12
3 V
CGEX
RESET
P1.0
P1.1
P1.2
P1.3
P0.0
P0.1
P0.2
P0.3
MSM64162D-xxx
(3.0 V spec.)
Cb
VSS1
VSSL
TST2
TST1
Ca
Cl
•Battery check
circuit is used
•CGEX of crystal
oscillator: External
Switch matrix
(4 ¥ 4)
RT0
RS0
RI0
CS0
RBLD
Buzzer
OSC monitor
¡ Semiconductor
MSM64162D
PACKAGE DIMENSIONS
(Unit : mm)
QFP64-P-1420-1.00-BK
Mirror finish
Package material
Lead frame material
Pin treatment
Solder plate thickness
Package weight (g)
Epoxy resin
42 alloy
Solder plating
5 mm or more
1.25 TYP.
Notes for Mounting the Surface Mount Type Package
The SOP, QFP, TSOP, SOJ, QFJ (PLCC), SHP and BGA are surface mount type packages, which
are very susceptible to heat in reflow mounting and humidity absorbed in storage.
Therefore, before you perform reflow mounting, contact Oki’s responsible sales person for the
product name, package name, pin number, package code and desired mounting conditions
(reflow method, temperature and times).
36/37
¡ Semiconductor
MSM64162D
(Unit : mm)
QFP80-P-1420-0.80-BK
Mirror finish
Package material
Lead frame material
Pin treatment
Epoxy resin
42 alloy
Solder plating
5 mm or more
Solder plate thickness
Package weight (g)
1.27 TYP.
Notes for Mounting the Surface Mount Type Package
The SOP, QFP, TSOP, SOJ, QFJ (PLCC), SHP and BGA are surface mount type packages, which
are very susceptible to heat in reflow mounting and humidity absorbed in storage.
Therefore, before you perform reflow mounting, contact Oki’s responsible sales person for the
product name, package name, pin number, package code and desired mounting conditions
(reflow method, temperature and times).
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