EMI8133MUTAG [ONSEMI]

带 ESD 保护的共模滤波器;
EMI8133MUTAG
型号: EMI8133MUTAG
厂家: ONSEMI    ONSEMI
描述:

带 ESD 保护的共模滤波器

文件: 总9页 (文件大小:319K)
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EMI8131, EMI8132,  
EMI8133  
Common Mode Filter with  
ESD Protection  
Functional Description  
www.onsemi.com  
XDFN10  
The EMI813x is a family of Common Mode Filters (CMF) with  
integrated ESD protection, a first in the industry. Differential signaling  
I/Os can now have both common mode filtering and ESD protection in  
one package. The EMI813x protects against ESD pulses up to 15 kV  
contact per the IEC61000−4−2 standard.  
The EMI813x is well−suited for protecting systems using  
high−speed differential ports such as MIPI D−PHY; corresponding  
ports in removable storage, and other applications where ESD  
protection are required in a small footprint package.  
XDFN6  
XDFN16  
CASE 711AW  
CASE 711AV CASE 711AU  
MARKING DIAGRAMS  
MA M  
M2 M  
M3 M  
G
G
G
The EMI813x is available in a RoHS−compliant, XDFN−10 for 2  
Differential Pair and XDFN−16 package for 3 Differential Pair.  
1
1
1
XX = Specific Device Code  
M
G
= Date Code  
= Pb−Free Package  
Features  
Total Insertion Loss DM  
< 3.7 dB at 2.5 GHz  
LOSS  
Large Differential Mode Cutoff Frequency f  
> 2.5 GHz  
3dB  
ELECTRICAL SCHEMATICS  
High Common Mode Stop Band Attenuation  
Low Channel Resistance 6.0 W  
Provides ESD Protection to IEC61000−4−2 Level 4, 15 kV Contact  
SZ Prefix for Automotive and Other Applications Requiring Unique  
Site and Control Change Requirements; AEC−Q101 Qualified and  
PPAP Capable  
These Devices are Pb−Free, Halogen Free/BFR Free and are RoHS  
EMI8132  
Compliant  
Applications  
USB 3.0  
MHL 2.0  
mSD Card  
eSATA  
HDMI/DVI Display in Mobile Phones  
MIPI D−PHY (CSI−2, DSI, etc) in Mobile Phones and Digital Still  
Cameras  
EMI8133  
ORDERING INFORMATION  
Device  
Package  
Shipping  
EMI8131MUTAG  
EMI8132MUTAG  
XDFN6 3000 / Tape & Reel  
XDFN10 3000 / Tape & Reel  
EMI8133MUTAG,  
XDFN16 3000 / Tape & Reel  
SZEMI8133MUTAG  
Figure 1. EMI8131 Electrical Schematic  
†For information on tape and reel specifications,  
including part orientation and tape sizes, please  
refer to our Tape and Reel Packaging Specifications  
Brochure, BRD8011/D.  
© Semiconductor Components Industries, LLC, 2014  
1
Publication Order Number:  
January, 2018 − Rev. 1  
EMI8132/D  
EMI8131, EMI8132, EMI8133  
PIN FUNCTION DESCRIPTION  
Device Pin  
EMI8131  
1
EMI8132  
EMI8133  
Pin Name  
In_1+  
Type  
I/O  
I/O  
I/O  
I/O  
I/O  
I/O  
I/O  
I/O  
I/O  
I/O  
I/O  
I/O  
GND  
Description  
CMF Channel 1+ to Connector (External)  
CMF Channel 1− to Connector (External)  
CMF Channel 1+ to ASIC (Internal)  
CMF Channel 1− to ASIC (Internal)  
CMF Channel 2+ to Connector (External)  
CMF Channel 2− to Connector (External)  
CMF Channel 2+ to ASIC (Internal)  
CMF Channel 2− to ASIC (Internal)  
CMF Channel 3+ to Connector (External)  
CMF Channel 3− to Connector (External)  
CMF Channel 3+ to ASIC (Internal)  
CMF Channel 3− to ASIC (Internal)  
Ground  
1
2
1
In_1−  
2
2
Out_1+  
Out_1−  
In_2+  
6
10  
9
16  
5
15  
NA  
NA  
NA  
NA  
NA  
NA  
NA  
NA  
3,4  
4
4
In_2−  
5
5
Out_2+  
Out_2−  
In_3+  
7
13  
6
12  
NA  
NA  
NA  
NA  
3, 8  
7
In_3−  
8
Out_3+  
Out_3−  
VN  
10  
9
3,6,14,11  
ABSOLUTE MAXIMUM RATINGS (T = 25°C unless otherwise noted)  
A
Parameter  
Operating Temperature Range  
Symbol  
Value  
−40 to +85  
−65 to +150  
260  
Unit  
°C  
T
OP  
Storage Temperature Range  
T
STG  
°C  
Maximum Lead Temperature for Soldering Purposes  
(1/8” from Case for 10 seconds)  
T
L
°C  
DC Current per Line  
I
100  
mA  
LINE  
Stresses exceeding those listed in the Maximum Ratings table may damage the device. If any of these limits are exceeded, device functionality  
should not be assumed, damage may occur and reliability may be affected.  
www.onsemi.com  
2
EMI8131, EMI8132, EMI8133  
ELECTRICAL CHARACTERISTICS (T = 25°C unless otherwise noted)  
A
Symbol  
Parameter  
Test Conditions  
Min  
Typ  
Max  
Unit  
V
V
RWM  
Reverse Working Voltage  
(Note 3)  
3.3  
V
Breakdown Voltage  
I = 1 mA; (Note 4)  
4.0  
9.0  
1.0  
V
BR  
T
I
Channel Leakage Current  
T = 25°C, V = 3.3 V, GND = 0 V  
mA  
W
LEAK  
A
IN  
R
Channel Resistance  
6.0  
CH  
(Pins 1−6, 2−5) − EMI8131  
(Pins 1−10, 2−9, 4−7 and 5−6) − EMI8132  
(Pins 1−16, 2−15, 4−13, 5−12, 7−10 and 8−9) − EMI8133  
DM  
Differential Mode Insertion Loss  
@ 2.5 GHz  
3.7  
2.5  
dB  
LOSS  
f
Differential Mode Cut-off Frequency  
50 W Source and Load  
GHz  
3dB  
Termination  
F
Common Mode Stop Band Attenuation  
@ 750 MHz  
30  
dB  
kV  
atten  
V
In-system ESD Withstand Voltage  
a) Contact discharge per IEC 61000-4-2 standard, Level 4  
(External Pins)  
b) Contact discharge per IEC 61000-4-2 standard, Level 1  
(Internal Pins)  
(Notes 1 and 2)  
ESD  
15  
2
V
CL  
TLP Clamping Voltage  
Forward I = 8 A  
8.94  
13.4  
V
PP  
Forward I = 16 A  
PP  
Forward I = −8 A  
−3.96  
−7.62  
PP  
Forward I = −16 A  
PP  
Product parametric performance is indicated in the Electrical Characteristics for the listed test conditions, unless otherwise noted. Product  
performance may not be indicated by the Electrical Characteristics if operated under different conditions.  
1. Standard IEC61000−4−2 with C  
= 150 pF, R  
= 330, GND grounded.  
Discharge  
Discharge  
2. These measurements performed with no external capacitor.  
3. TVS devices are normally selected according to the working peak reverse voltage (V  
or continuous peak operating voltage level.  
), which should be equal to or greater than the DC  
RWM  
4. V is measured at pulse test current I .  
BR  
T
www.onsemi.com  
3
 
EMI8131, EMI8132, EMI8133  
TYPICAL CHARACTERISTICS  
0
−1  
−2  
−3  
−4  
−5  
−6  
0
−5  
−10  
−15  
−20  
−25  
−30  
−35  
−40  
−45  
−50  
1.E+05  
−7  
1.E+05  
1.E+06  
1.E+07  
1.E+08  
1.E+09  
1.E+06  
1.E+07  
1.E+08  
1.E+09  
FREQUENCY (Hz)  
FREQUENCY (Hz)  
Figure 2. Typical Differential Mode Attenuation  
vs. Frequency  
Figure 3. Typical Common Mode Attenuation  
vs. Frequency  
Interface  
Data Rate (Gb/s)  
Fundamental Frequency (MHz)  
ESD813x Differential Insertion Loss (dB)  
MIPI  
1.5  
750  
m1 = 1.25  
Figure 4. Differential Mode Insertion Loss  
www.onsemi.com  
4
EMI8131, EMI8132, EMI8133  
TRANSMISSION LINE PULSE (TLP) MEASUREMENTS  
Transmission Line Pulse (TLP) provides current versus voltage (I−V) curves in which each data point is obtained from a  
100 ns long rectangular pulse from a charged transmission line. A simplified schematic of a typical TLP system is shown in  
Figure 5. TLP I−V curves of ESD protection devices accurately demonstrate the product’s ESD capability because the 10 s  
of amps current levels and under 100 ns time scale match those of an ESD event. This is illustrated in Figure 6 where an 8 kV  
IEC61000−4−2 current waveform is compared with TLP current pulses at 8 A and 16 A. A TLP curve shows the voltage at  
which the device turns on as well as how well the device clamps voltage over a range of current levels. Typical TLP I−V curves  
for the EMI813x are shown in Figure 5.  
Attenuator  
L
50 W Coax Cable  
SW  
÷
50 W Coax Cable  
VM  
IM  
10 MQ  
VC  
DUT  
Oscilloscope  
Figure 5. Simplified Schematic of a Typical TLP System  
Figure 6. Comparison Between 8 kV IEC61000- 4- 2 and 8 A and 16 A TLP Waveforms  
18  
16  
14  
12  
10  
8
−18  
−16  
−14  
−12  
−10  
−8  
6
−6  
−4  
4
−2  
2
0
0
0
2
4
6
8
10  
12  
14  
16  
18  
0
−2  
−4  
−6  
−8 −10 −12 −14 −16 −18  
V (V)  
clamp  
V
clamp  
(V)  
Figure 7. Positive and Negative TLP Waveforms  
www.onsemi.com  
5
 
MECHANICAL CASE OUTLINE  
PACKAGE DIMENSIONS  
XDFN10 2.2x1.35, 0.4P  
CASE 711AU  
ISSUE B  
DATE 17 JUN 2014  
SCALE 4:1  
NOTES:  
A
B
E
D
L
L
1. DIMENSIONING AND TOLERANCING PER  
ASME Y14.5M, 1994.  
2. CONTROLLING DIMENSION: MILLIMETERS.  
3. DIMENSIONS b APPLIES TO PLATED  
TERMINAL AND IS MEASURED BETWEEN  
0.15 AND 0.30 MM FROM THE TERMINAL TIP.  
PIN ONE  
REFERENCE  
L1  
2X  
0.10  
C
MILLIMETERS  
DETAIL A  
DIM MIN  
MAX  
0.50  
0.05  
ALTERNATE  
A
A1  
A3  
b
0.40  
0.00  
CONSTRUCTIONS  
2X  
0.10 C  
TOP VIEW  
0.15 REF  
0.15  
0.25  
D
2.20 BSC  
1.35 BSC  
0.40 BSC  
0.40 0.60  
--- 0.15  
EXPOSED Cu  
MOLD CMPD  
A
C
DETAIL B  
E
(A3)  
0.10  
0.08  
C
e
L
L1  
C
DETAIL B  
ALTERNATE  
GENERIC  
MARKING DIAGRAM*  
A1  
SEATING  
PLANE  
CONSTRUCTION  
SIDE VIEW  
XX M  
G
DETAIL A  
8X L  
e
5
1
XX = Specific Device Code  
M
= Date Code  
G
= PbFree Package  
10  
6
b
10X  
*This information is generic. Please refer to  
device data sheet for actual part marking.  
PbFree indicator, “G” or microdot “ G”,  
may or may not be present.  
M
M
C A B  
0.10  
NOTE 3  
C
0.05  
BOTTOM VIEW  
RECOMMENDED  
MOUNTING FOOTPRINT  
9X  
PACKAGE  
OUTLINE  
8X  
0.25  
0.65  
1.55  
1
0.50  
0.40 PITCH  
DIMENSIONS: MILLIMETERS  
Electronic versions are uncontrolled except when accessed directly from the Document Repository.  
Printed versions are uncontrolled except when stamped “CONTROLLED COPY” in red.  
DOCUMENT NUMBER:  
DESCRIPTION:  
98AON83517F  
XDFN10 2.2X1.35, 0.4P  
PAGE 1 OF 1  
ON Semiconductor and  
are trademarks of Semiconductor Components Industries, LLC dba ON Semiconductor or its subsidiaries in the United States and/or other countries.  
ON Semiconductor reserves the right to make changes without further notice to any products herein. ON Semiconductor makes no warranty, representation or guarantee regarding  
the suitability of its products for any particular purpose, nor does ON Semiconductor assume any liability arising out of the application or use of any product or circuit, and specifically  
disclaims any and all liability, including without limitation special, consequential or incidental damages. ON Semiconductor does not convey any license under its patent rights nor the  
rights of others.  
© Semiconductor Components Industries, LLC, 2019  
www.onsemi.com  
MECHANICAL CASE OUTLINE  
PACKAGE DIMENSIONS  
XDFN6 1.40x1.35, 0.4P  
CASE 711AV  
ISSUE A  
SCALE 4:1  
DATE 04 JUN 2014  
NOTES:  
L
L
A
B
E
D
1. DIMENSIONING AND TOLERANCING PER  
ASME Y14.5M, 1994.  
2. CONTROLLING DIMENSION: MILLIMETERS.  
3. DIMENSIONS b APPLIES TO PLATED  
TERMINAL AND IS MEASURED BETWEEN  
0.15 AND 0.30 MM FROM TERMINAL TIP.  
PIN 1  
REFERENCE  
2X  
0.10  
C
L1  
MILLIMETERS  
DETAIL A  
DIM MIN  
MAX  
0.50  
0.05  
ALTERNATE TERMINAL  
CONSTRUCTIONS  
A
A1  
A3  
b
0.40  
0.00  
2X  
6X  
0.10 C  
TOP VIEW  
0.15 REF  
0.15  
0.25  
EXPOSED Cu  
MOLD CMPD  
D
1.40 BSC  
1.35 BSC  
0.40 BSC  
0.40 0.60  
--- 0.15  
A
DETAIL B  
E
(A3)  
0.10  
0.08  
C
C
e
A1  
L
L1  
DETAIL B  
ALTERNATE  
GENERIC  
MARKING DIAGRAM*  
SEATING  
PLANE  
CONSTRUCTION  
C
SIDE VIEW  
e
XXMG  
6X  
L
G
1
3
DETAIL A  
XX = Specific Device Code  
M
= Date Code  
G
= PbFree Package  
4
6
6X b  
(Note: Microdot may be in either location)  
M
C A B  
0.10  
*This information is generic. Please refer to  
device data sheet for actual part marking.  
PbFree indicator, “G” or microdot “ G”,  
may or may not be present.  
NOTE 3  
C
M
0.05  
BOTTOM VIEW  
RECOMMENDED  
MOUNTING FOOTPRINT  
6X  
0.65  
0.40  
PITCH  
1.55  
1
0.50  
5X  
0.25  
DIMENSIONS: MILLIMETERS  
Electronic versions are uncontrolled except when accessed directly from the Document Repository.  
Printed versions are uncontrolled except when stamped “CONTROLLED COPY” in red.  
DOCUMENT NUMBER:  
DESCRIPTION:  
98AON83554F  
XDFN6 1.40X1.35, 0.4P  
PAGE 1 OF 1  
ON Semiconductor and  
are trademarks of Semiconductor Components Industries, LLC dba ON Semiconductor or its subsidiaries in the United States and/or other countries.  
ON Semiconductor reserves the right to make changes without further notice to any products herein. ON Semiconductor makes no warranty, representation or guarantee regarding  
the suitability of its products for any particular purpose, nor does ON Semiconductor assume any liability arising out of the application or use of any product or circuit, and specifically  
disclaims any and all liability, including without limitation special, consequential or incidental damages. ON Semiconductor does not convey any license under its patent rights nor the  
rights of others.  
© Semiconductor Components Industries, LLC, 2019  
www.onsemi.com  
MECHANICAL CASE OUTLINE  
PACKAGE DIMENSIONS  
XDFN16 3.5x1.35, 0.4P  
CASE 711AW  
16  
ISSUE A  
DATE 17 JUN 2014  
1
SCALE 4:1  
A
B
D
L
L
NOTES:  
1. DIMENSIONING AND TOLERANCING PER  
ASME Y14.5M, 1994.  
2X  
2. CONTROLLING DIMENSION: MILLIMETERS.  
3. DIMENSION b APPLIES TO PLATED TERMINAL  
AND IS MEASURED BETWEEN 0.15 AND  
0.30 mm FROM THE TERMINAL TIP.  
0.10  
C
L1  
DETAIL A  
PIN ONE  
E
REFERENCE  
ALTERNATE TERMINAL  
CONSTRUCTIONS  
MILLIMETERS  
DIM MIN  
MAX  
0.50  
0.05  
2X  
A
A1  
A3  
b
0.40  
0.00  
0.15 REF  
0.15  
3.50 BSC  
0.10  
C
TOP VIEW  
EXPOSED Cu  
MOLD CMPD  
0.25  
DETAIL B  
A
D
(A3)  
E
e
1.35 BSC  
0.40 BSC  
0.10  
C
C
L
L1  
0.40  
−−−  
0.60  
0.15  
DETAIL B  
ALTERNATE  
16X  
0.08  
CONSTRUCTION  
SEATING  
PLANE  
A1  
NOTE 4  
C
SIDE VIEW  
GENERIC  
MARKING DIAGRAM*  
e/2  
DETAIL A  
e
XXXM  
G
12X L  
8
1
1
XXX = Specific Device Code  
16  
9
M
= Month Code  
16X b  
G
= PbFree Package  
0.10  
0.05  
C
C
A B  
*This information is generic. Please refer to  
device data sheet for actual part marking.  
PbFree indicator, “G” or microdot “ G”,  
may or may not be present.  
NOTE 3  
BOTTOM VIEW  
RECOMMENDED  
SOLDERING FOOTPRINT*  
12X  
0.65  
0.40  
PITCH  
1.55  
1
15X  
0.25  
0.55  
DIMENSIONS: MILLIMETERS  
*For additional information on our PbFree strategy and soldering  
details, please download the ON Semiconductor Soldering and  
Mounting Techniques Reference Manual, SOLDERRM/D.  
Electronic versions are uncontrolled except when accessed directly from the Document Repository.  
Printed versions are uncontrolled except when stamped “CONTROLLED COPY” in red.  
DOCUMENT NUMBER:  
DESCRIPTION:  
98AON83555F  
XDFN16 3.5X1.35, 0.4P  
PAGE 1 OF 1  
ON Semiconductor and  
are trademarks of Semiconductor Components Industries, LLC dba ON Semiconductor or its subsidiaries in the United States and/or other countries.  
ON Semiconductor reserves the right to make changes without further notice to any products herein. ON Semiconductor makes no warranty, representation or guarantee regarding  
the suitability of its products for any particular purpose, nor does ON Semiconductor assume any liability arising out of the application or use of any product or circuit, and specifically  
disclaims any and all liability, including without limitation special, consequential or incidental damages. ON Semiconductor does not convey any license under its patent rights nor the  
rights of others.  
© Semiconductor Components Industries, LLC, 2019  
www.onsemi.com  
onsemi,  
, and other names, marks, and brands are registered and/or common law trademarks of Semiconductor Components Industries, LLC dba “onsemi” or its affiliates  
and/or subsidiaries in the United States and/or other countries. onsemi owns the rights to a number of patents, trademarks, copyrights, trade secrets, and other intellectual property.  
A listing of onsemi’s product/patent coverage may be accessed at www.onsemi.com/site/pdf/PatentMarking.pdf. onsemi reserves the right to make changes at any time to any  
products or information herein, without notice. The information herein is provided “asis” and onsemi makes no warranty, representation or guarantee regarding the accuracy of the  
information, product features, availability, functionality, or suitability of its products for any particular purpose, nor does onsemi assume any liability arising out of the application or use  
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