FAN4149 [ONSEMI]
Ground Fault Interrupter;型号: | FAN4149 |
厂家: | ONSEMI |
描述: | Ground Fault Interrupter |
文件: | 总12页 (文件大小:380K) |
中文: | 中文翻译 | 下载: | 下载PDF数据表文档文件 |
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July 2014
FAN4149
Ground Fault Interrupter
Description
Features
The FAN4149 is a low-power controller for detecting
hazardous current paths to ground and ground-to-
neutral faults. The FAN4149 application circuit opens
the load contacts before a harmful shock occurs.
.
Meets 2015 UL943 Self-Test Requirements
(in combination with FAN41501)
.
.
.
.
.
.
.
.
.
Precision Sense Amplifier and Bandgap Reference
Low-VOS Offset for Direct DC Coupling of Sense Coil
Built-in Noise Filter
The FAN4149, in combination with the FAN41501 auto-
monitoring digital controller, meets the 2015 UL943 self-
test requirements for permanently connected GFCI
products. The FAN4149 detects and protects against a
hot-wire-to-ground fault and a neutral-to-line/load short.
The FAN41501 periodically monitors the FAN4149 and
critical GFI components to comply with the 2015 UL943
requirements. The minimum number of components and
the small 6-pin package allow for a dense, flexible,
application solution.
High-Current SCR Gate Driver
Adjustable Sensitivity
500 µA Quiescent Current
Minimum External Components
Ideal for 120 V or 220 V Systems
Space-Saving, SOT23, 6-Pin Package
The FAN4149 contains a precision bandgap 14 V shunt
regulator, precision low-VOS sense amplifier, time-delay
noise filter, window-detection comparators, and an SCR
Applications
driver. The shunt regulator operates with
a low
quiescent current, which allows for a high value, low-
wattage series supply resistor. The internal temperature
compensated shunt regulator, sense amplifier, and bias
circuitry provide for precision ground-fault detection.
This enables the use of larger component variations so
that binning or trimming external components is not
required. The typical ±50 µV VOS sense amplifier offset
allows for direct DC coupling of the sense coil. This
eliminates the large AC-coupling capacitor. The internal
delay filter rejects high-frequency noise spikes common
with inductive loads. This decreases false nuisance
tripping. The SCR driver provides increased current and
temperature compensation to allow for a wider selection
of external SCRs.
.
.
.
.
GFCI Output Receptacle
GFCI Circuit Breakers
Portable GFCI Cords
Residual-Current Devices (RCD)
The minimum number of external components and the
6-pin SOT23 package allow a low-cost, compact design
and layout.
Ordering Information
Operating
Temperature Range
Part Number
Package
Packing Method
FAN4149M6X
-35°C to +85°C
6-Lead, SOT23, JEDEC M0-178, 1.6 mm
Tape and Reel
© 2014 Fairchild Semiconductor Corporation
FAN4149 • Rev. 1.0.0
www.fairchildsemi.com
Block Diagram
AMPOUT
VS
C1
I1
VFB
SCR
VREF
A1
Delay
T1
SCR
Driver
Q1
R1
VTH
C2
VS
VREF
VTH
GND
VS
VREF
Rectifier
and Bias
Figure 1.
Block Diagram
Typical Application
TEST
D1
RTEST1
D2 D3
R3
Neutral Coil 1:200
Sense Coil 1:1000
D4 D5
Load Hot
Line Hot
Line Neutral
MOV
Load Neutral
C2
C3
RIN
RTEST2
R4
C5
D6
Q1
RSET
Fault Test
Q2
AmpOut
VFB
SCR Test
GND
SCR
GND
VS
C1
C4
EOL Alarm
Phase
VREF
VDD
R2
R1
Figure 2. Typical Application(1,2)
Table 1. Typical Values
SET: 750 kΩ (3)
R1: 75 kΩ
R2: 75 kΩ
C3: 5.6 nF
RIN: 470 Ω
R3: 1 MΩ
C4: 220 nF
RTEST2: 10 kΩ
R
TEST1: 15 kΩ
R
C1: 22 nF
C2: 10 nF
R4: 909 kΩ
C5: 1 µF
XMFR: Magnetic Metals 5029/F3006
Notes:
1. Contact Fairchild for self-test requirement details.
2. Portions of this schematic are subject to U.S. patents 8,085,516 and 8,760,824.
3. Value depends on sense-coil characteristics and application.
© 2014 Fairchild Semiconductor Corporation
www.fairchildsemi.com
FAN4149 • Rev. 1.0.0
2
Pin Configuration
6
5
4
1
2
3
PIN 1
Amp Out
VFB
SCR
GND
VS
VREF
Figure 3. Pin Configuration
Pin Definitions
Pin #
Name
Description
1
2
3
4
5
6
SCR
GND
VS
Gate drive for external SCR
Supply input for FAN4149 circuitry
Supply input for FAN4149 circuitry
VREF Non-inverting input for current sense amplifier
VFB Inverting input for current sense amplifier
Amp Out An external resistor connected to VFB sets the IFAULT sensitivity threshold
© 2014 Fairchild Semiconductor Corporation
FAN4149 • Rev. 1.0.0
www.fairchildsemi.com
3
Absolute Maximum Ratings
Stresses exceeding the absolute maximum ratings may damage the device. The device may not function or be
operable above the recommended operating conditions and stressing the parts to these levels is not recommended.
In addition, extended exposure to stresses above the recommended operating conditions may affect device reliability.
The absolute maximum ratings are stress ratings only.
Symbol
ICC
Parameter
Condition
Min. Max. Unit
Supply Current
Continuous Current, VS to GND
Continuous Voltage to GND, All Pins
15
mA
V
VCC
Supply Voltage
-0.8
-65
16.0
+150
TSTG
Storage Temperature Range
°C
Human Body Model,
ANSI/ESDA/JEDEC JS-001-2012
2.5
1.0
ESD
Electrostatic Discharge Capability
kV
Charged Device Model, JESD22-C101
DC Electrical Characteristics
Unless otherwise specified, TA=25°C, Ishunt=1 mA, and referencing Figure 2.
Symbol
Parameter
Conditions
Min. Typ. Max. Unit
Power Supply Shunt Regulator
Voltage
VREG
VS to GND
13.7 14.0 14.3
V
IQ
Quiescent Current
Reference Voltage
Trip Threshold
Line to GND=10 V
VREF to GND
Amp Out to VREF
Gain=1000
425 500 575
µA
V
VREF
VTH
6.85 7.00 7.15
4.35 4.50 4.65
-175 ±50 175
V
Amplifier Offset
µV
µV
nA
dB
MHz
V
VOS
Amplifier Offset Drift(4)
Amplifier Input Offset(5)
Amplifier DC Gain(5)
Amplifier Gain Bandwidth(5)
Gain=1000
-100
-50
100
50
IOS
G
Design Value
Design Value
Design Value
0
100
3
fGBW
VSW+
VSW-
ISINK
ISRL
td
Amplifier Positive Voltage Swing Amp Out to VREF, IFAULT=10 µA
Amplifier Negative Voltage Swing VREF to Amp Out, IFAULT=-10 µA
5.5
5.5
V
Amplifier Current Sink
Amplifier Current Source
Delay Filter
Amp Out=VREF + 3 V VFB=VREF + 100 mV 400
µA
µA
ms
kΩ
mV
V
Amp Out=VREF – 3 V,VFB=VREF -100 mV
400
0.65 1.00 1.35
-
Delay from C1 Trip to SCR L >H
ROUT
SCR Output Resistance
SCR Output Voltage
SCR Output Voltage
SCR to GND=250 mV, Amp Out=VREF
SCR to GND, Amp Out=VREF
0.5
1
1.0
10
VOUT
SCR to GND, AMP Out=VREF +4 V
3.0
SCR to GND=1 V Amp Out=VREF + 4 V,
ISHUNT=2 mA
IOUT
SCR Output Current
650
725
µA
Notes:
4. Maximum VOS offset temperature cycling drift from initial value (JEDEC JESD22-A104).
5. Guaranteed by design, not tested in production.
© 2014 Fairchild Semiconductor Corporation
www.fairchildsemi.com
FAN4149 • Rev. 1.0.0
4
Functional Description
Refer to Figure 2.
T = 1 ms (timer delay)
P = Period of the AC Line (1/60 Hz)
P = Period of the AC Line (1/60 Hz)
N= Ratio of secondary-to-primary turns (1000:1)
The FAN4149 is a GFCI controller for AC ground-fault
circuit interrupters. The low-VOS offset for the sense
amplifier allows for direct DC coupling of the sense coil
when the FAN4149 is biased with a full-wave diode
bridge. This allows for the FAN4149 to be used with the
FAN41501 digital auto-monitoring controller to provide
for a low-BOM-cost, complete, GFI solution with self
testing for the critical GFCI components.
RSET = 750 kΩ (standard 1% value)
In practice, the transformer is non-ideal, so RSET may
need to be adjusted by up to 30% to obtain the desired
IFAULT trip threshold.
The internal shunt regulator rectifier circuit is supplied
from the full-wave rectifier bridge and 75 kΩ series
resistor. A typical 220 nF VS bypass capacitor is used to
filter the VAC ripple voltage. The internal 14 V shunt
regulator uses a precision temperature-compensated
bandgap reference. The combination of precision
reference circuitry and precision sense amplifier
provides for an accurate ground-fault tolerance. This
allows for selection of external components with wider
and lower-cost parameter variations. Due to the low
quiescent current, a high-value external series resistor
(R1) can be used to reduce the maximum power wattage
required for this resistor. The 14 V shunt regulator
generates the VREF reference voltage for the sense
amplifier’s (A1) non-inverting input (AC ground
reference). It also supplies the bias for the delay timer
(t1), comparators (C1 & C2), and the SCR driver.
Calculation of VOS Trip Threshold Error
Since the sense coil is directly connected to the
feedback of the sense amplifier, the VOS offset
introduces an IFAULT threshold error. This error can be
calculated as follows:
%Error =100 x (VOS x RSET) / (RIN + RLDC) / VTH
(3)
where:
±175 µV (worst case)
±50 µV (typical)
VOS
=
RSET
RIN
=
=
=
750 kΩ
470 Ω (typical value)
RLDC
VTH
75 Ω (sense coil secondary DC resistance)
= 4.5 V
The secondary winding of the sense transformer is
connected to pin 4 (VREF) and to a resistor, RIN, which
is directly DC connected to the inverting input of the
sense amplifier at pin 5 (VFB). The feedback resistor
(RSET) converts the sense transformer’s secondary
current to a voltage at pin 6 (Amp Out). This voltage is
compared to the internal window comparator (C1 & C2).
When the Amp Out voltage exceeds the ±VTH threshold
voltage, the window comparator triggers the internal
delay timer. The output of the window comparator must
stay HIGH for the duration of the t1 timer. If the window
comparator’s output goes LOW, the internal delay timer
starts a reset cycle. If the window comparator’s output is
still HIGH at the end of the t1 pulse, the SCR driver
enables current source I1 and disables Q1. Current
source I1 then enables the external SCR; which
energizes the solenoid, opens the contact switches to
the load, and removes the hazardous ground fault. The
window comparator allows for detection of a positive or
negative IFAULT signal, independent from the phase of
the line voltage.
± 5.4% (worst case)
± 1.5% (typical)
%Error=
The VOS ±100 µV maximum drift specification is based
on temperature cycling per JEDEC JESD22-A104,
Condition B, 850 temperature cycles at -55°C to
+125°C.
Grounded Neutral Detection
If the neutral load terminal side is incorrectly connected
to the earth ground, the sense coil does not correctly
detect the hazardous ground fault current from “load
hot” to earth ground due to the partial IFAULT current
flowing from the grounded neutral fault (load neutral) to
earth ground.
To detect a grounded neutral fault, a grounded neutral
coil is required. When a low resistive path occurs from
the line neutral and load neutral terminals, the sense
and neutral coils are mutually coupled. The mutual
coupling produces a positive feedback path around the
sense amplifier, which causes the sense amplifier to
oscillate. When the peak oscillation voltage exceeds the
SCR trigger threshold, the internal delay timer is
enabled. Since the amplifier’s output signal is crossing
the window comparator’s trip threshold typically at
6 kHz, the delay timer alternates between detection of a
fault/no-fault. The ratio of the fault/no-fault detection
time interval determines if the SCR driver is enabled.
Calculation of RSET Resistor
The Amp Out signal must exceed the window
comparator’s VTH threshold voltage for longer than the
delay timer and calculated by:
(1)
(2)
VTH = IFAULT x 1.22 x RSET x COS(2π x (t/2P)) / N
RSET = (VTH x N) / (1.22 x IFAULT x COS(π x t/P))
where:
The sensitivity of the grounded neutral detection can be
changed by the neutral coil turns and the value of C2
and C3.
VTH = 4.5 V
IFAULT = 5 mARMS (UL943)
© 2014 Fairchild Semiconductor Corporation
FAN4149 • Rev. 1.0.0
www.fairchildsemi.com
5
FAN4149, SCR, sense coil, and solenoid -- within five
seconds and thereafter within every three hours. The
self-test cycle cannot open the load contacts. If a
component failure is detected, the load power must be
denied. Refer to the FAN41501 datasheet for more
details about the UL943 self-test features.
GFCI Self Test Requirement
Starting in June of 2015, UL943 requires all
permanently connected GFCI products to perform a
self-test function. By adding Fairchild’s FAN41501
product to the FAN4149 application (see Figure 2), a
fully compliant 2015 UL943 self-test function can be
achieved with two, small, independent, 6-pin, 1.6 mm-
wide devices and a minimum number of external
components. The 2015 UL code requires that, at power
up, the GFCI self test the critical GFCI components --
© 2014 Fairchild Semiconductor Corporation
FAN4149 • Rev. 1.0.0
www.fairchildsemi.com
6
Typical Performance Characteristics
Unless otherwise specified, TA=25°C and according to Figure 2 with SCR disconnected.
Ch1: VS (Pin 3), 10 V/Div
Ch1: VS (Pin 3), 10 V/Div
Ch2: AmpOut (Pin 6), 2 V/Div
Ch3: SCR (Pin 1), 1 V/Div
Ch4: IFAULT, 10 mA/Div
Ch2: AmpOut (Pin 6), 5 V/Div
Ch3: VREF (Pin 4), 5 V/Div
Ch4: SCR (Pin 1), 500 mV/Div
Figure 4.
Typical Waveforms, No Ground Fault
Figure 5.
Typical Waveforms, 4 mA Ground Fault
Ch1: VS (Pin 3), 10 V/Div
Ch1: VS (Pin 3), 10 V/Div
Ch2: AmpOut (Pin 6), 5 V/Div
Ch3: SCR (Pin 1), 1 V/Div
Ch2: AmpOut (Pin 6), 5 V/Div
Ch3: SCR (Pin 1), 1 V/Div
Ch4: IFAULT, 10 mA/Div
Figure 6.
Typical Waveforms, 5 mA Ground Fault Figure 7. Typical Waveforms for Grounded Neutral
Detection
Continued on the following page…
© 2014 Fairchild Semiconductor Corporation
FAN4149 • Rev. 1.0.0
www.fairchildsemi.com
7
Typical Performance Characteristics (Continued)
Unless otherwise specified, TA=25°C and according to Figure 1 with SCR disconnected.
Ch2: AmpOut (Pin 6), 2 V/Div
Figure 8. Typical Waveform for Grounded Neutral
Detection
© 2014 Fairchild Semiconductor Corporation
www.fairchildsemi.com
FAN4149 • Rev. 1.0.0
8
Typical Temperature Characteristics
Figure 9. Shunt Regulator Voltage vs. Temperature
Figure 10. Quiescent Current vs. Temperature
Figure 11. Reference Voltage vs. Temperature
Figure 12. VH Threshold Voltage vs. Temperature
Figure 14. Typical VOS vs. Temperature
Figure 13. VL Threshold Voltage vs. Temperature
Figure 15. IOUT SCR Out vs. Temperature
© 2014 Fairchild Semiconductor Corporation
FAN4149 • Rev. 1.0.0
www.fairchildsemi.com
9
REVISIONS
LTR
A
DESCRIPTION
DATE
11/4/2006
5 JULY 07
E.C.N.
BY/APP'D
H.ALLEN
RELEASE TO DOCUMENT CONTROL
DWG UPDATED TO CONFORM TO MO178
L.HUEBENER
2
C
D
0.15 C A-B
2X
SYMM
C
2.9
1.9
L
(0.95)
(0.95)
D
A
(1.00MIN)
1.4
1.6
2.8
C
D
(2.60)
(0.70MIN)
0.15 C D
2X
0.15 C
PIN 1 INDEX AREA
2X 3 TIPS
0.95
(1.90)
B
2X 0.3-0.5
0.20
C A-B D
LAND PATTERN RECOMMENDATION
SEE DETAIL A
1.45 MAX
1.30
0.90
0.08
0.22
C
0.10
0.15
0.05
6X
C
R0.10MIN
NOTES:
GAGE PLANE
0.25
A. THIS PACKAGE CONFORMS TO JEDEC MO-178,
VARIATION AB.
R0.10MIN
B. ALL DIMENSIONS ARE IN MILLIMETERS.
C. DOES NOT INCLUDE MOLD FLASH, PROTRUSIONS
OR GATE BURRS.
8°
0°
D. DOES NOT INCLUDE INTERLEAD FLASH OR
PROTRUSIONS.
0.60
0.30
SEATING PLANE
E. DIMENSIONS AND TOLERANCING AS PER ASME
Y14.5M-1994
F. DRAWING FILE NAME: MA06EREV2
0.60 REF
DETAIL A
SCALE: 2:1
APPROVALS
L.HUEBENER
DATE
5 JULY 07
17 JULY 07
H.ALLEN
6LD,SOT23,JEDEC
MO-178 VARIATION AB,
1.6MM WIDE
/
1:1 NA
MKT-MA06E
SHEET :
2
OF 1
FORMERLY:
1
N/A
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are trademarks of Semiconductor Components Industries, LLC dba ON Semiconductor or its subsidiaries in the United States and/or other countries.
ON Semiconductor owns the rights to a number of patents, trademarks, copyrights, trade secrets, and other intellectual property. A listing of ON Semiconductor’s product/patent
coverage may be accessed at www.onsemi.com/site/pdf/Patent−Marking.pdf. ON Semiconductor reserves the right to make changes without further notice to any products herein.
ON Semiconductor makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does ON Semiconductor assume any liability
arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages.
Buyer is responsible for its products and applications using ON Semiconductor products, including compliance with all laws, regulations and safety requirements or standards,
regardless of any support or applications information provided by ON Semiconductor. “Typical” parameters which may be provided in ON Semiconductor data sheets and/or
specifications can and do vary in different applications and actual performance may vary over time. All operating parameters, including “Typicals” must be validated for each customer
application by customer’s technical experts. ON Semiconductor does not convey any license under its patent rights nor the rights of others. ON Semiconductor products are not
designed, intended, or authorized for use as a critical component in life support systems or any FDA Class 3 medical devices or medical devices with a same or similar classification
in a foreign jurisdiction or any devices intended for implantation in the human body. Should Buyer purchase or use ON Semiconductor products for any such unintended or unauthorized
application, Buyer shall indemnify and hold ON Semiconductor and its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and
expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such
claim alleges that ON Semiconductor was negligent regarding the design or manufacture of the part. ON Semiconductor is an Equal Opportunity/Affirmative Action Employer. This
literature is subject to all applicable copyright laws and is not for resale in any manner.
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