FDB15N50 [ONSEMI]

功率 MOSFET,N 沟道,UniFETTM,500 V,15 A,380 mΩ,D2PAK;
FDB15N50
型号: FDB15N50
厂家: ONSEMI    ONSEMI
描述:

功率 MOSFET,N 沟道,UniFETTM,500 V,15 A,380 mΩ,D2PAK

PC 开关 脉冲 晶体管
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November 2013  
FDB15N50  
N-Channel UniFETTM MOSFET  
500 V, 15 A, 380 mΩ  
Description  
Features  
UniFETTM MOSFET is Fairchild Semiconductor’s high  
voltage MOSFET family based on planar stripe and  
DMOS technology. This MOSFET is tailored to reduce  
on-state resistance, and to provide better switching  
performance and higher avalanche energy strength. This  
device family is suitable for switching power converter  
applications such as power factor correction (PFC), flat  
panel display (FPD) TV power, ATX and electronic lamp  
ballasts.  
• Low gate charge Qg results in simple drive requirement  
(Typ. 33 nC)  
• Improved Gate, avalanche and high reapplied dv/dt  
ruggedness  
• Reduced RDS(on) ( 330mΩ ( Typ.) @ VGS = 10 V, ID = 7.5 A)  
• Reduced Miller capacitance and low Input capacitance  
(Typ. Crss = 16 pF)  
• Improved switching speed with low EMI  
• 175oC rated junction temperature  
Applications  
Lighting  
• Uninterruptible Power Supply  
• AC-DC Power Supply  
D
D
G
G
D2-PAK  
S
S
o
Absolute Maximum Ratings T = 25 C unless otherwise noted.  
C
Symbol  
Parameter  
Drain to Source Voltage  
FDB15N50  
500  
Unit  
V
V
DSS  
V
Gate to Source Voltage  
±30  
V
GS  
Drain Current  
Continuous (T = 25 C, V = 10V)  
o
15  
A
C
GS  
I
o
D
Continuous (T = 100 C, V = 10V)  
C
GS  
11  
60  
A
A
Pulsed  
(Note 1)  
Power dissipation  
Derate above 25 C  
300  
2
W
W/ C  
P
o
o
D
o
T , T  
Operating and Storage Temperature  
Soldering Temperature for 10 seconds  
-55 to 175  
C
J
STG  
o
300 (1.6mm from case)  
C
Thermal Characteristics  
Symbol  
Parameter  
FDB15N50  
0.50  
Unit  
o
R
R
Thermal Resistance Junction to Case, Max.  
Thermal Resistance Junction to Ambient, Max.  
C/W  
θJC  
o
62  
C/W  
θJA  
1
www.fairchildsemi.com  
©2003 Fairchild Semiconductor Corporation  
FDB15N50 Rev. C1  
Package Marking and Ordering Information  
Device Marking  
Device  
Package  
Reel Size  
Tape Width  
Quantity  
FDB15N50  
FDB15N50  
D2-PAK  
330 mm  
24 mm  
800 units  
Electrical Characteristics T = 25°C unless otherwise noted.  
J
Symbol  
Parameter  
Test Conditions  
Min  
Typ  
Max  
Unit  
Statics  
B
Drain to Source Breakdown Voltage  
I
= 250µA, V = 0V  
500  
-
-
-
-
V
VDSS  
D
GS  
o
Reference to 25 C,  
ID = 1mA  
B  
/T Breakdown Voltage Temp. Coefficient  
0.58  
V/°C  
VDSS  
J
R
Drain to Source On-Resistance  
V
V
V
V
V
= 10V, I = 7.5A  
-
0.33  
0.38  
4.0  
DS(ON)  
GS  
DS  
DS  
GS  
GS  
D
V
Gate Threshold Voltage  
= V , I = 250µA  
2.0  
3.4  
V
GS(th)  
GS  
D
o
= 500V  
T
T
= 25 C  
-
-
-
-
-
-
25  
C
C
I
Zero Gate Voltage Drain Current  
Gate to Source Leakage Current  
µA  
nA  
DSS  
o
= 0V  
= 150 C  
250  
±100  
I
= ±30V  
GSS  
Dynamics  
g
Forward Transconductance  
Total Gate Charge at 10V  
Gate to Source Gate Charge  
Gate to Drain MillerCharge  
Turn-On Delay Time  
Rise Time  
V
= 10V, I = 7.5A  
10  
-
-
33  
7.2  
12  
9
-
S
fs  
DD  
D
Q
41  
10  
16  
nC  
nC  
nC  
ns  
ns  
ns  
ns  
pF  
pF  
pF  
g(TOT)  
V
V
= 10V,  
= 400V,  
= 15A  
GS  
Q
Q
-
gs  
gd  
DS  
I
D
-
t
-
d(ON)  
V
I
= 250V,  
= 15A,  
= 6.2,  
= 17Ω  
DD  
t
-
5.4  
26  
5
-
-
-
-
-
-
r
D
R
R
t
Turn-Off Delay Time  
Fall Time  
-
G
D
d(OFF)  
t
-
f
C
Input Capacitance  
-
1850  
230  
16  
ISS  
V
= 25V, V = 0V,  
GS  
DS  
C
Output Capacitance  
Reverse Transfer Capacitance  
-
OSS  
RSS  
f = 1MHz  
C
-
Avalanche Characteristics  
E
760  
-
-
-
-
mJ  
A
Single Pulse Avalanche Energy (Note 2)  
Avalanche Current  
AS  
AR  
I
15  
Drain-Source Diode Characteristics  
Continuous Source Current  
(Body Diode)  
D
S
MOSFET symbol  
showing the  
integral reverse  
p-n junction diode.  
I
-
-
-
-
15  
60  
A
A
S
G
Pulsed Source Current  
(Body Diode)  
I
SM  
(Note 1)  
V
Source to Drain Diode Voltage  
I
I
I
= 15A  
-
-
-
0.86  
470  
5
1.2  
730  
6.6  
V
SD  
SD  
SD  
SD  
t
Reverse Recovery Time  
= 15A, di /dt = 100A/µs  
ns  
µC  
rr  
SD  
Q
Reverse Recovered Charge  
= 15A, di /dt = 100A/µs  
RR  
SD  
Notes:  
1: Repetitive rating; pulse width limited by maximum junction temperature.  
2: Starting T = 25°C, L = 7.0mH, I = 15A.  
J
AS  
2
www.fairchildsemi.com  
©2003 Fairchild Semiconductor Corporation  
FDB15N50 Rev. C1  
Typical Characteristics  
100  
o
100  
10  
1
o
T
= 25 C  
T
V
= 175  
C
J
J
V
DESCENDING  
DESCENDING  
GS  
GS  
10V  
6V  
5.5V  
5V  
4.5V  
4V  
10V  
6.5V  
6V  
5.5V  
5V  
4.5V  
10  
PULSE DURATION = 80µs  
DUTY CYCLE = 0.5% MAX  
PULSE DURATION = 80µs  
DUTY CYCLE = 0.5% MAX  
1
1
10  
100  
1
10  
100  
VDS, DRAIN TO SOURCE VOLTAGE (V)  
VDS, DRAIN TO SOURCE VOLTAGE (V)  
Figure 1. Output Characteristics  
Figure 2. Output Characteristics  
60  
3.5  
3.0  
2.5  
2.0  
1.5  
1.0  
0.5  
0
PULSE DURATION = 80µs  
PULSE DURATION = 80µs  
DUTY CYCLE = 0.5% MAX  
DUTY CYCLE = 0.5% MAX  
VDD = 100V  
50  
40  
30  
20  
10  
0
TJ = 175oC  
TJ = 25oC  
V
= 10V, I = 7.5A  
D
GS  
3.0  
3.5  
4.0  
4.5  
5.0  
5.5  
6.0  
6.5  
-50  
-25  
0
25  
50  
75  
100  
125  
150  
175  
TJ, JUNCTION TEMPERATURE (oC)  
VGS, GATE TO SOURCE VOLTAGE (V)  
Figure 3. Transfer Characteristics  
Figure 4. Normalized Drain To Source On  
Resistance vs Junction Temperature  
4000  
1000  
15  
CISS  
ID = 15A  
12  
9
100V  
250V  
COSS  
400V  
6
100  
CRSS  
3
VGS = 0V, f = 1MHz  
0
10  
1
10  
100  
0
10  
20  
30  
40  
50  
Qg, GATE CHARGE (nC)  
VDS, DRAIN TO SOURCE VOLTAGE (V)  
Figure 5. Capacitance vs Drain To Source  
Voltage  
Figure 6. Gate Charge Waveforms For Constant  
Gate Current  
3
www.fairchildsemi.com  
©2003 Fairchild Semiconductor Corporation  
FDB15N50 Rev. C1  
Typical Characteristics  
30  
25  
20  
100  
10  
TC = 25oC  
100µs  
1ms  
15  
TJ = 175oC  
TJ = 25oC  
10ms  
DC  
10  
5
1.0  
0.1  
OPERATION IN THIS AREA  
LIMITED BY RDS(ON)  
0
0.3  
0.4  
0.5  
0.6  
0.7  
0.8  
0.9  
1.0  
1
10  
100  
1000  
VSD, SOURCE TO DRAIN VOLTAGE (V)  
VDS, DRAIN TO SOURCE VOLTAGE (V)  
Figure 7. Body Diode Forward Voltage vs Body  
Diode Current  
Figure 8. Maximum Safe Operating Area  
16  
12  
8
50  
If R = 0  
AV  
If R 0  
t
= (L)(I )/(1.3*RATED BV  
- V  
DD  
)
AS  
DSS  
t
= (L/R)ln[(I *R)/(1.3*RATED BV  
- V ) +1]  
DSS DD  
AV  
AS  
10  
o
STARTING T = 25 C  
J
4
o
STARTING T = 150 C  
J
0
25  
1
0.01  
50  
75  
100  
125  
150  
175  
0.1  
1
10  
50  
TC, CASE TEMPERATURE (oC)  
tAV, TIME IN AVALANCHE (ms)  
Figure 9. Maximum Drain Current vs Case  
Temperature  
Figure 10. Unclamped Inductive Switching  
Capability  
0
10  
0.50  
0.20  
t
1
-1  
10  
0.10  
0.05  
P
D
t
2
DUTY FACTOR, D = t / t  
1
2
0.02  
PEAK T = (P  
D
X Z  
X R  
) + T  
JC C  
J
θ
JC  
θ
0.01  
SINGLE PULSE  
-2  
10  
-5  
-4  
-3  
-2  
-1  
10  
0
1
10  
10  
10  
10  
10  
10  
t , RECTANGULAR PULSE DURATION (s)  
1
Figure 11. Normalized Transient Thermal Impedance, Junction to Case  
4
www.fairchildsemi.com  
©2003 Fairchild Semiconductor Corporation  
FDB15N50 Rev. C1  
Test Circuits and Waveforms  
V
BV  
DSS  
DS  
t
P
V
DS  
L
I
AS  
V
DD  
VARY t TO OBTAIN  
P
+
-
R
REQUIRED PEAK I  
G
AS  
V
DD  
V
GS  
DUT  
t
P
I
0V  
0
AS  
0.01Ω  
t
AV  
Figure 12. Unclamped Energy Test Circuit  
Figure 13. Unclamped Energy Waveforms  
V
DS  
V
Q
V
DD  
g(TOT)  
R
L
V
= 10V  
GS  
DS  
V
GS  
+
-
V
DD  
V
GS  
V
= 1V  
DUT  
GS  
0
I
g(REF)  
Q
g(TH)  
Q
Q
gd  
gs  
I
g(REF)  
0
Figure 14. Gate Charge Test Circuit  
Figure 15. Gate Charge Waveforms  
V
t
t
DS  
ON  
OFF  
t
d(OFF)  
t
d(ON)  
t
t
f
R
L
r
V
DS  
90%  
90%  
+
-
V
GS  
V
DD  
10%  
10%  
0
DUT  
90%  
50%  
R
GS  
V
GS  
50%  
PULSE WIDTH  
10%  
V
GS  
0
Figure 16. Switching Time Test Circuit  
Figure 17. Switching Time Waveform  
5
www.fairchildsemi.com  
©2003 Fairchild Semiconductor Corporation  
FDB15N50 Rev. C1  
Mechanical Dimensions  
2
Figure 18. TO263 (D PAK), Molded, 2-Lead, Surface Mount  
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without notice. Please note the revision and/or date on the drawing and contact a Fairchild Semiconductor representative to verify or  
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Always visit Fairchild Semiconductor’s online packaging area for the most recent package drawings:  
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©2003 Fairchild Semiconductor Corporation  
FDB15N50 Rev. C1  
www.fairchildsemi.com  
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®
®
tm  
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®
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®
®
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相关型号:

FDB16AN08A0

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FDB16AN08A0

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FDB1D7N10CL7

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FDB2001M

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FDB2001S

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FDB2002S

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FDB20AN06A0

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FDB20AN06A0_NL

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FDB24AN06LA0

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FDB2500

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FDB2500P

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