FDBL86063 [ONSEMI]
N-Channel PowerTrench® MOSFET, 100V, 240A, 2.6mΩ;
| 型号： | FDBL86063 |
| 厂家： | 
ONSEMI |
| 描述： | N-Channel PowerTrench® MOSFET, 100V, 240A, 2.6mΩ |
| 文件： | 总8页 (文件大小：488K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
MOSFET - POWERTRENCH),
N-Channel
100 V, 240 A, 2.6 mW
FDBL86063
Features
• Typical R
• Typical Q
= 2 mW at V = 10 V, I = 80 A
GS D
DS(on)
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= 73 nC at V = 10 V, I = 80 A
g(tot)
GS
D
• UIS Capability
• This Device is Pb−Free and is RoHS Compliant
Typical Applications
• Industrial Battery Switch
• Primary Switch for 12 V Systems
H−PSOF8L 11.68x9.80
CASE 100CU
MARKING DIAGRAM
$Y&Z&3&K
FDBL86063
$Y
= ON Semiconductor Logo
&Z
&3
&K
= Assembly Plant Code
= Numeric Date Code
= Lot Code
FDBL86063
= Specific Device Code
ORDERING INFORMATION
See detailed ordering and shipping information on page 2 of
this data sheet.
© Semiconductor Components Industries, LLC, 2020
1
Publication Order Number:
January, 2020 − Rev. 0
FDBL86063/D
FDBL86063
MOSFET MAXIMUM RATINGS (T = 25°C, Unless otherwise noted)
J
Symbol
Parameter
Ratings
100
Units
V
DSS
Drain−to−Source Voltage
Gate−to−Source Voltage
V
V
A
V
GS
20
ID
Drain Current
−Continuous (V = 10 V) (Note 1)
T
T
= 25°C
= 25°C
240
GS
C
−Pulsed
See Figure 4
160
C
E
AS
Single Pulse Avalanche Energy
Power Dissipation
(Note 2)
mJ
W
P
D
357
Derate Above 25°C
2.38
W/°C
°C
TJ, T
Operating and Storage Temperature
Thermal Resistance, Junction to Case
Maximum Thermal Resistance, Junction to Ambient
−55 to +175
0.42
STG
RθJC
RθJA
°C/W
°C/W
(Note 3)
43
Stresses exceeding those listed in the Maximum Ratings table may damage the device. If any of these limits are exceeded, device functionality
should not be assumed, damage may occur and reliability may be affected.
1. Current is limited by bondwire configuration.
2. Starting T = 25°C, L = 50 mH, I = 80 A, V = 100 V during inductor charging and V = 0 V during time in avalanche.
J
AS
DD
DD
3. RθJA is the sum of the junction−to−case and case−to−ambient thermal resistance, where the case thermal reference is defined as the solder
mounting surface of the drain pins. RθJC is guaranteed by design, while R
presented here is based on mounting on a 1 in pad of 2 oz copper.
is determined by the board design. The maximum rating
θ
JA
2
PACKAGE MARKING AND ORDERING INFORMATION
†
Device Marking
Device
Package
H−PSOF8L 11.68x9.80 (Pb−Free)
Shipping
FDBL86063
FDBL86063
2000 units / Tape & Reel
†For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging
Specifications Brochure, BRD8011/D
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2
FDBL86063
ELECTRICAL CHARACTERISTICS (T = 25°C unless otherwise noted)
J
Symbol
Parameter
Test Conditions
Min.
Typ.
Max.
Units
OFF CHARACTERISTICS
B
VDSS
Drain−to−Source Breakdown
Voltage
I
D
= 250 mA, V = 0 V
100
V
GS
I
Drain−to−Source Leakage
Current
V
DS
V
DS
V
GS
= 100 V, V = 0 V, T = 25°C
1
mA
mA
nA
DSS
GS
J
= 100 V, V = 0 V, T = 175°C (Note 4)
1.5
100
GS
J
I
Gate−to−Source Leakage
Current
= 20 V
GSS
ON CHARACTERISTICS
V
Gate to Source Threshold
Voltage
V
I
= V , I = 250 mA
2.0
2.9
4.0
V
GS(th)
GS
DS
D
R
Drain−to−Source
On−Resistance
= 80 A, V = 10 V, T = 25°C
2.0
4.2
2.6
5.6
mW
DS(on)
D
GS
J
I
D
= 80 A, V = 10 V, T = 175°C (Note 4)
GS J
DYNAMIC CHARACTERISTICS
C
Input Capacitance
V
= 50 V, V = 0 V, f = 1 MHz
5120
3220
32
pF
pF
pF
W
iss
DS
GS
C
Output Capacitance
oss
C
Reverse Transfer Capacitance
Gate Resistance
rss
R
V
GS
V
GS
V
GS
= 0.5 V, f = 1 MHz
0.4
73
g
Q
Total Gate Charge
= 0 V to 10 V
= 0 V to 2 V
V
DD
= 50 V, I = 80 A
95
53
51
nC
nC
nC
nC
g(TOT)
D
Q
Threshold Gate Charge
Gate−to−Source Gate Charge
Gate−to−Drain “Miller” Charge
9
g(th)
Q
22
gs
Q
17
gd
SWITCHING CHARACTERISTICS
t
on
Turn−On Time
Turn−On Delay
Rise Time
V
DD
= 50 V, I = 80 A, V = 10V, R = 6 W
GEN
ns
ns
ns
ns
ns
ns
D
GS
t
25
16
32
8
d(on)
t
r
t
Turn−Off Delay
Fall Time
d(off)
t
f
t
off
Turn−Off Time
DRAIN−SOURCE DIODE CHARACTERISTICS
V
Source−to−Drain Diode
Voltage
V
GS
V
GS
= 0 V, I = 80 A
0.9
0.8
1.25
1.2
V
SD
SD
= 0 V, I = 40 A
SD
t
Reverse−Recovery Time
Reverse−Recovery Charge
I = 80 A, DI /Dt = 100 A/ms
107
175
139
260
ns
rr
F
SD
Q
nC
rr
Product parametric performance is indicated in the Electrical Characteristics for the listed test conditions, unless otherwise noted. Product
performance may not be indicated by the Electrical Characteristics if operated under different conditions.
4. The maximum value is specified by design at T = 175°C. Product is not tested to this condition in production.
J
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3
FDBL86063
TYPICAL CHARACTERISTICS
300
270
240
210
180
150
120
90
1.2
1.0
0.8
0.6
0.4
0.2
0.0
CURRENT LIMITED
BY PACKAGE
VGS = 10V
60
30
0
0
25
50
75 100 125 150 175
25
50
75 100 125 150 175 200
TC, CASE TEMPERATURE(oC)
TC, CASE TEMPERATURE(oC)
Figure 1. Normalized Power Dissipation vs.
Case Temperature
Figure 2. Maximum Continuous Drain Current
vs. Case Temperature
2
DUTY CYCLE − DESCENDING ORDER
1
P
DM
t
0.1
1
t
SINGLE PULSE
2
NOTES:
DUTY FACTOR: D = t /t
1
2
PEAK T = P x Z
x R
+ T
J
DM
qJC
qJC C
0.01
10−5
10−4
10−3
10−2
10−1
100
101
t, RECTANGULAR PULSE DURATION(s)
Figure 3. Normalized Maximum Transient Thermal Impedance
2000
VGS = 10V
1000
100
10
o
T
= 25 C
C
FOR TEMPERATURES
o
ABOVE 25 C DERATE PEAK
CURRENT AS FOLLOWS:
175 − T
150
C
I = I
25
SINGLE PULSE
10−5
10−4
10−3
10−2
10−1
100
101
t, RECTANGULAR PULSE DURATION(s)
Figure 4. Peak Current Capability
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4
FDBL86063
TYPICAL CHARACTERISTICS
300
100
1000
100
10
If R = 0
tAV = (L)(I AS)/(1.3*RATED BV DSS − V
)
DD
If R ! 0
t
AV = (L/R)ln[(I AS*R)/(1.3*RATED BV DSS − VDD) +1]
STARTING T = 25oC
J
100us
10
OPERATION IN THIS
AREA MAY BE
STARTING TJ = 150oC
1ms
LIMITED BY r
DS(on)
1
SINGLE PULSE
T
10ms
= MAX RATED
o
J
100ms
T
C
= 25 C
1
0.1
0.001 0.01
0.1
1
10
100 1000
0.1
1
10
100 200
tAV, TIME IN AVALANCHE (ms)
VDS, DRAIN TO SOURCE VOLTAGE (V)
NOTE: Refer to ON Semiconductor Application Notes
AN7514 and AN7515
Figure 5. Forward Bias Safe Operating Area
Figure 6. Unclamped Inductive Switching
Capability
300
300
PULSE DURATION = 250ms
VGS = 0 V
DUTY CYCLE = 0.5% MAX
100
10
1
250
VDD = 5V
TJ = 175 o
C
200
150
100
50
TJ = 25oC
TJ = 25 oC
TJ = −55oC
TJ = 175oC
0
0.1
1
2
3
4
5
6
7
0.0
0.2
0.4
0.6
0.8
1.0
1.2
VGS, GATE TO SOURCE VOLTAGE (V)
VSD, BODY DIODE FORWARD VOLTAGE (V)
Figure 7. Transfer Characteristics
Figure 8. Forward Diode Characteristics
300
300
250ms PULSE WIDTH
250ms PULSE WIDTH
Tj=175oC
Tj=25oC
250
200
150
100
50
250
200
150
100
50
VGS
15V Top
VGS
15V Top
10V
8V
10V
8V
7V
6V
7V
6V
5.5V
5V Bottom
5.5V
5V Bottom
0
0
0
1
2
3
4
5
0
1
2
3
4
5
VDS, DRAIN TO SOURCE VOLTAGE (V)
VDS, DRAIN TO SOURCE VOLTAGE (V)
Figure 9. Saturation Characteristics
Figure 10. Saturation Characteristics
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5
FDBL86063
TYPICAL CHARACTERISTICS
50
40
30
20
10
0
2.2
PULSE DURATION = 250 ms
DUTY CYCLE = 0.5% MAX
PULSE DURATION = 250 ms
DUTY CYCLE = 0.5% MAX
2.0
1.8
1.6
1.4
1.2
1.0
0.8
0.6
ID = 80A
TJ = 175oC
I
D = 80A
VGS = 10V
TJ = 25oC
3
4
5
6
7
8
9
10
−80 −40
0
40
80 120 160 200
TJ, JUNCTION TEMPERATURE(oC)
VGS, GATE TO SOURCE VOLTAGE (V)
Figure 11. RDSON vs. Gate Voltage
Figure 12. Normalized RDSON vs. Junction
Temperature
1.3
1.2
1.1
1.0
0.9
0.8
0.7
0.6
0.5
0.4
0.3
1.10
VGS = VDS
ID = 5mA
I
D
= 250mA
1.05
1.00
0.95
0.90
−80 −40
0
40
80 120 160 200
−80 −40
0
40
80 120 160 200
TJ, JUNCTION TEMPERATURE(oC)
TJ, JUNCTION TEMPERATURE (oC)
Figure 13. Normalized Gate Threshold Voltage
vs. Temperature
Figure 14. Normalized Drain to Source Breakdown
Voltage vs. Junction Temperature
10000
10
Ciss
ID = 80A
VDD = 50V
VDD =40V
8
6
4
2
0
Coss
1000
100
10
VDD = 60V
Crss
f = 1MHz
VGS = 0V
0.1
1
DS, DRAIN TO SOURCE VOLTAGE (V)
10
100
0
10
20
30
40
50
60
70
80
Qg, GATE CHARGE(nC)
V
Figure 15. Capacitance vs. Drain to Source
Voltage
Figure 16. Gate Charge vs. Gate to Source
Voltage
POWERTRENCH is a registered trademark of Semiconductor Components Industries, LLC (SCILLC) or its subsidiaries in the United States and/or
other countries.
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6
MECHANICAL CASE OUTLINE
PACKAGE DIMENSIONS
H−PSOF8L 11.68x9.80
CASE 100CU
ISSUE C
DATE 22 MAY 2023
GENERIC
MARKING DIAGRAM*
AYWWZZ
XXXXXXXX
XXXXXXXX
A
Y
= Assembly Location
= Year
*This information is generic. Please refer to
device data sheet for actual part marking.
Pb−Free indicator, “G” or microdot “G”, may
or may not be present. Some products may
not follow the Generic Marking.
WW = Work Week
ZZ
XXXX = Specific Device Code
= Assembly Lot Code
Electronic versions are uncontrolled except when accessed directly from the Document Repository.
Printed versions are uncontrolled except when stamped “CONTROLLED COPY” in red.
DOCUMENT NUMBER:
DESCRIPTION:
98AON13813G
H−PSOF8L 11.68x9.80
PAGE 1 OF 1
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