FDBL86561-F085 [ONSEMI]
N 沟道,PowerTrench® MOSFET,60V,300A,1.1mΩ;型号: | FDBL86561-F085 |
厂家: | ONSEMI |
描述: | N 沟道,PowerTrench® MOSFET,60V,300A,1.1mΩ 开关 晶体管 |
文件: | 总7页 (文件大小:488K) |
中文: | 中文翻译 | 下载: | 下载PDF数据表文档文件 |
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FDBL86561-F085
®
N-Channel PowerTrench MOSFET
60 V, 300 A, 1.1 mΩ
Features
Typical R
Typical Q
= 0.85 mΩ at V = 10V, I = 80 A
GS D
DS(on)
= 170 nC at V = 10V, I = 80 A
g(tot)
GS
D
UIS Capability
RoHS Compliant
Qualified to AEC Q101
D
Applications
Automotive Engine Control
PowerTrain Management
Solenoid and Motor Drivers
G
Integrated Starter/Alternator
S
Primary Switch for 12V Systems
MOSFET Maximum Ratings TJ = 25°C unless otherwise noted.
Symbol
VDSS
Parameter
Ratings
60
Units
Drain-to-Source Voltage
Gate-to-Source Voltage
V
V
VGS
±20
Drain Current - Continuous (VGS=10) (Note 1)
Pulsed Drain Current
TC = 25°C
C = 25°C
300
ID
A
T
See Figure 4
1167
EAS
PD
Single Pulse Avalanche Energy
Power Dissipation
Derate Above 25oC
(Note 2)
(Note 3)
mJ
W
W/oC
oC
oC/W
oC/W
429
2.86
TJ, TSTG Operating and Storage Temperature
-55 to + 175
0.35
RθJC
RθJA
Thermal Resistance, Junction to Case
Maximum Thermal Resistance, Junction to Ambient
43
Notes:
1: Current is limited by bondwire configuration.
2: Starting T = 25°C, L = 0.57mH, I = 64A, V = 40V during inductor charging and V = 0V during time in avalanche.
J
AS
DD
DD
3: R
is the sum of the junction-to-case and case-to-ambient thermal resistance, where the case thermal reference is defined as the solder
θJA
mounting surface of the drain pins.
presented here is based on mounting on a 1 in pad of 2oz copper.
R
is guaranteed by design, while R is determined by the board design. The maximum rating
θJC θJA
2
Package Marking and Ordering Information
Device Marking
Device
Package
FDBL86561
FDBL86561-F085
MO-299A
-
-
-
Publication Order Number:
FDBL86561-F085/D
©2015 Semiconductor Components industries, LLC.
August-2017, Rev 3
Electrical Characteristics TJ = 25°C unless otherwise noted.
Symbol
Parameter
Test Conditions
Min.
Typ.
Max.
Units
Off Characteristics
BVDSS
IDSS
Drain-to-Source Breakdown Voltage
Drain-to-Source Leakage Current
Gate-to-Source Leakage Current
ID = 250μA, VGS = 0V
60
-
-
-
-
-
-
1
V
VDS = 60V TJ = 25oC
μA
mA
nA
VGS = 0V
TJ = 175oC (Note 4)
-
3
IGSS
VGS = ±20V
-
±100
On Characteristics
VGS(th)
RDS(on)
Gate to Source Threshold Voltage
Drain to Source On Resistance
VGS = VDS, ID = 250μA
2.0
3.0
0.85
1.5
4.0
1.1
2.2
V
TJ = 25oC
-
-
mΩ
mΩ
ID = 80A,
TJ = 175oC (Note 4)
V
GS= 10V
Dynamic Characteristics
Ciss
Input Capacitance
-
-
-
-
-
-
-
-
13650
3375
255
2.3
-
pF
pF
pF
Ω
V
DS = 30V, VGS = 0V,
Coss
Crss
Rg
Output Capacitance
-
f = 1MHz
Reverse Transfer Capacitance
Gate Resistance
-
-
f = 1MHz
Qg(ToT)
Qg(th)
Qgs
Total Gate Charge at 10V
Threshold Gate Charge
Gate-to-Source Gate Charge
Gate-to-Drain “Miller“ Charge
VGS = 0 to 10V
VGS = 0 to 2V
170
24
220
32
-
nC
nC
nC
nC
VDD = 48V
ID = 80A
56
Qgd
24
-
Switching Characteristics
ton
td(on)
tr
Turn-On Time
Turn-On Delay
Rise Time
-
-
-
-
-
-
-
137
ns
ns
ns
ns
ns
ns
45
61
80
41
-
-
-
V
DD = 30V, ID = 80A,
VGS = 10V, RGEN = 6Ω
td(off)
tf
Turn-Off Delay
Fall Time
-
-
toff
Turn-Off Time
156
Drain-Source Diode Characteristics
I
SD =80A, VGS = 0V
-
-
-
-
-
1.25
1.2
V
VSD
Source-to-Drain Diode Voltage
ISD = 40A, VGS = 0V
-
V
trr
Reverse-Recovery Time
107
183
139
265
ns
nC
IF = 80A, dISD/dt = 100A/μs,
VDD=48V
Qrr
Reverse-Recovery Charge
Note:
4: The maximum value is specified by design at T = 175°C. Product is not tested to this condition in production.
J
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2
Typical Characteristics
500
400
300
200
100
0
1.2
1.0
0.8
0.6
0.4
0.2
0.0
CURRENT LIMITED
BY PACKAGE
VGS = 10V
CURRENT LIMITED
BY SILICON
0
25
50
75
100
125
150
175
25
50
75
100
125
150
175
200
TC, CASE TEMPERATURE(oC)
TC, CASE TEMPERATURE(oC)
Figure 2. Maximum Continuous Drain Current vs.
Case Temperature
Figure 1. Normalized Power Dissipation vs. Case
Temperature
2
DUTY CYCLE - DESCENDING ORDER
1
D = 0.50
0.20
P
0.10
DM
0.05
0.02
0.01
t
0.1
1
t
2
NOTES:
DUTY FACTOR: D = t /t
1
2
SINGLE PULSE
PEAK T = P
x Z
x R
+ T
J
DM
θJC
θJC C
0.01
10-5
10-4
10-3
10-2
10-1
100
101
t, RECTANGULAR PULSE DURATION(s)
Figure 3. Normalized Maximum Transient Thermal Impedance
10000
VGS = 10V
1000
100
10
TC = 25oC
FOR TEMPERATURES
ABOVE 25oC DERATE PEAK
CURRENT AS FOLLOWS:
175 - TC
I = I2
150
SINGLE PULSE
10-5
10-4
10-3
10-2
10-1
100
101
t, RECTANGULAR PULSE DURATION(s)
Figure 4. Peak Current Capability
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3
Typical Characteristics
2000
1000
2000
1000
If R = 0
= (L)(I )/(1.3*RATED BV
t
AV
- V
)
AS
DSS
DD
If R
≠ 0
t
AV
= (L/R)ln[(I *R)/(1.3*RATED BV
- V ) +1]
DSS DD
AS
100
100
10
1
100us
1ms
OPERATION IN THIS
AREA MAY BE
STARTING TJ = 25oC
10
LIMITED BY r
DS(on)
1
STARTING TJ = 150oC
SINGLE PULSE
10ms
100ms
T
J
= MAX RATED
o
T
C
= 25
C
0.1
0.001 0.01
0.1
1
10
100 1000 10000
0.1
1
10
100 200
tAV, TIME IN AVALANCHE (ms)
VDS, DRAIN TO SOURCE VOLTAGE (V)
NOTE: Refer to ON Semiconductor Application Notes AN7514 and
AN7515
Figure 5. Forward Bias Safe Operating Area
Figure 6. Unclamped Inductive Switching Capability
300
400
PULSE DURATION = 80μs
DUTY CYCLE = 0.5% MAX
VGS = 0 V
100
240
180
120
60
VDD = 5V
TJ = 175 o
C
TJ = 25 o
C
10
1
TJ = 25oC
TJ = 175oC
TJ = -55oC
0
0.1
2
3
4
5
6
7
0.0
0.2
0.4
0.6
0.8
1.0
1.2
VGS, GATE TO SOURCE VOLTAGE (V)
VSD, BODY DIODE FORWARD VOLTAGE (V)
Figure 7. Transfer Characteristics
Figure 8. Forward Diode Characteristics
400
400
VGS
15V Top
10V
8V
7V
6V
VGS
15V Top
10V
8V
7V
6V
300
200
100
0
300
5V
5.5V
5V Bottom
5V
5.5V
5V Bottom
200
100
0
80μs PULSE WIDTH
Tj=25oC
80μs PULSE WIDTH
Tj=175oC
0
1
2
3
4
5
0
1
2
3
4
5
VDS, DRAIN TO SOURCE VOLTAGE (V)
VDS, DRAIN TO SOURCE VOLTAGE (V)
Figure 9. Saturation Characteristics
Figure 10. Saturation Characteristics
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Typical Characteristics
20
2.4
2.0
1.6
1.2
0.8
0.4
PULSE DURATION = 80μs
DUTY CYCLE = 0.5% MAX
ID = 80A
PULSE DURATION = 80μs
DUTY CYCLE = 0.5% MAX
16
12
8
TJ = 175oC
TJ = 25oC
4
ID = 80A
VGS = 10V
0
2
4
6
8
10
-80
-40
0
40
80
120
160
200
TJ, JUNCTION TEMPERATURE(oC)
VGS, GATE TO SOURCE VOLTAGE (V)
Figure 11. RDSON vs. Gate Voltage
Figure 12. Normalized RDSON vs. Junction
Temperature
1.5
1.2
VGS = VDS
ID = 1mA
I
D
= 250μA
1.2
0.9
0.6
0.3
0.0
1.1
1.0
0.9
0.8
-80
-40
0
40
80
120
160
200
-80
-40
0
40
80
120
160
200
TJ, JUNCTION TEMPERATURE (oC)
TJ, JUNCTION TEMPERATURE(oC)
Figure 13. Normalized Gate Threshold Voltage vs.
Temperature
Figure 14. Normalized Drain to Source
Breakdown Voltage vs. Junction Temperature
100000
10
ID = 80A
VDD = 30V
8
10000
Ciss
VDD =24V
VDD = 36V
6
4
2
0
1000
Coss
100
f = 1MHz
VGS = 0V
Crss
10
0.1
1
10
100
0
20 40 60 80 100 120 140 160 180
Qg, GATE CHARGE(nC)
VDS, DRAIN TO SOURCE VOLTAGE (V)
Figure 15. Capacitance vs. Drain to Source
Voltage
Figure 16. Gate Charge vs. Gate to Source
Voltage
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ON Semiconductor and
are trademarks of Semiconductor Components Industries, LLC dba ON Semiconductor or its subsidiaries in the United States and/or other countries.
ON Semiconductor owns the rights to a number of patents, trademarks, copyrights, trade secrets, and other intellectual property. A listing of ON Semiconductor’s product/patent
coverage may be accessed at www.onsemi.com/site/pdf/Patent−Marking.pdf. ON Semiconductor reserves the right to make changes without further notice to any products herein.
ON Semiconductor makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does ON Semiconductor assume any liability
arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages.
Buyer is responsible for its products and applications using ON Semiconductor products, including compliance with all laws, regulations and safety requirements or standards,
regardless of any support or applications information provided by ON Semiconductor. “Typical” parameters which may be provided in ON Semiconductor data sheets and/or
specifications can and do vary in different applications and actual performance may vary over time. All operating parameters, including “Typicals” must be validated for each customer
application by customer’s technical experts. ON Semiconductor does not convey any license under its patent rights nor the rights of others. ON Semiconductor products are not
designed, intended, or authorized for use as a critical component in life support systems or any FDA Class 3 medical devices or medical devices with a same or similar classification
in a foreign jurisdiction or any devices intended for implantation in the human body. Should Buyer purchase or use ON Semiconductor products for any such unintended or unauthorized
application, Buyer shall indemnify and hold ON Semiconductor and its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and
expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such
claim alleges that ON Semiconductor was negligent regarding the design or manufacture of the part. ON Semiconductor is an Equal Opportunity/Affirmative Action Employer. This
literature is subject to all applicable copyright laws and is not for resale in any manner.
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