FDC6323L [ONSEMI]
集成式负载开关;
| 型号： | FDC6323L |
| 厂家： | 
ONSEMI |
| 描述： | 集成式负载开关 开关 PC 驱动 光电二极管 接口集成电路 驱动器 |
| 文件： | 总8页 (文件大小：316K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
DATA SHEET
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Integrated Load Switch
FDC6323L
TSOT−23−6
CASE 419BL
Description
MARKING DIAGRAM
These Integrated Load Switches are produced using onsemi’s
proprietary, high cell density, DMOS technology. This very high
density process is especially tailored to minimize on−state resistance
and provide superior switching performance. These devices are
particularly suited for low voltage high side load switch application
where low conduction loss and ease of driving are needed.
&E&Y
&.323&G
Features
&E
&Y
&.
323
&G
= Designates Space
= Binary Calendar Year Coding Scheme
= Pin One Dot
= Specific Device Code
= Date Code
• V
• V
= 0.2 V @ V = 5 V, I = 1 A, V
= 1.5 V to 8 V
= 0.3 V @ V = 3.3 V, I = 1 A, V = 1.5 V to 8 V
ON/OFF
DROP
DROP
IN
L
ON/OFF
IN
L
• High Density Cell Design for Extremely Low On−Resistance
• V
Zener Protection for ESD Ruggedness > 6 kV Human
ON/OFF
Body Model
ORDERING INFORMATION
• SUPERSOTt−6 Package Design Using Copper Lead Frame for
Superior Thermal and Electrical Capabilities
• This is a Pb−Free and Halide Free Device
†
Device
FDC6323L
Package
Shipping
TSOT−23−6
(Pb−Free)
3000 /
Tape & Reel
†For information on tape and reel specifications,
including part orientation and tape sizes, please
refer to our Tape and Reel Packaging Specification
Brochure, BRD8011/D.
V
,R1
4
5
3
2
V
, C1
OUT
IN
Q2
ON/OFF
R1, C1
V
OUT
, C1
Q1
6
R1
1
See Application Circuit
Figure 1.
V
DROP
−
+
IN
OUT
ON/OFF
Figure 2. Equivalent Circuit
© Semiconductor Components Industries, LLC, 1999
1
Publication Order Number:
September, 2021 − Rev. 7
FDC6323L/D
FDC6323L
ABSOLUTE MAXIMUM RATINGS (T = 25°C unless otherwise noted)
A
Symbol
Parameter
Value
3−8
Unit
V
V
Input Voltage Range
On/Off Voltage Range
IN
ON/OFF
V
1.5−8
1.5
V
I
L
Load Current @ V
= 0.5V − Continuous (Note 1)
= 0.5V − Pulsed (Note 1, Note 3)
A
DROP
DROP
Load Current @ V
2.5
P
Maximum Power Dissipation (Note 2a)
0.7
W
°C
kV
D
T , T
Operating and Storage Temperature Range
−55 to 150
6
J
STG
ESD
Electrostatic Discharge Rating MIL−STD−883D Human Body Model (100 pF / 1500 W)
Stresses exceeding those listed in the Maximum Ratings table may damage the device. If any of these limits are exceeded, device functionality
should not be assumed, damage may occur and reliability may be affected.
THERMAL CHARACTERISTICS (T = 25°C unless otherwise noted)
A
Symbol
Parameter
Thermal Resistance, Junction−to−Ambient (Note 2a)
Thermal Resistance, Junction−to−Case (Note 2)
Value
180
60
Unit
°C/W
°C/W
R
q
JA
R
q
JC
ELECTRICAL CHARACTERISTICS (T = 25°C unless otherwise noted)
A
Symbol
Parameter
Test Conditions
Min
Typ
Max
Unit
OFF CHARACTERISTICS
I
Forward Leakage Current
Reverse Leakage Current
V
V
= 8 V, V = 0 V
ON/OFF
−
−
−
−
1
mA
mA
FL
RL
IN
I
= −8 V, V
= 0 V
−1
IN
ON/OFF
ON CHARACTERISTICS (Note 3)
V
Input Voltage
3
1.5
−
−
−
8
8
V
V
V
IN
ON/OFF
V
On/Off Voltage
V
Conduction Voltage Drop @ 1 A
V
V
= 5 V, V = 3.3 V
ON/OFF
0.145
0.178
−
0.2
0.3
−
DROP
IN
= 3.3 V, V
= 3.3 V
−
IN
ON/OFF
I
L
Load Current
V
V
= 0.2 V, V = 5 V,
1
A
DROP
ON/OFF
IN
= 3.3 V
V
V
= 0.3 V, V = 3.3 V,
ON/OFF
1
−
−
DROP
IN
= 3.3 V
Product parametric performance is indicated in the Electrical Characteristics for the listed test conditions, unless otherwise noted. Product
performance may not be indicated by the Electrical Characteristics if operated under different conditions.
NOTES:
1. V = 8 V, V
= 8 V, V
= 0.5 V, T = 25°C
IN
ON/OFF
DROP A
2. R
is the sum of the junction−to−case and case−to−ambient thermal resistance where the case thermal reference is defined as the solder
q
JA
mounting surface of the drain pins. R
is guaranteed by design while R
is determined by the user’s board design.
q
q
JC
CA
T
* T
T
qJC
* T
+ I2 (t) R
DS(ON)@T
D
J
A
J
A
P (t) +
+
D
J
R
(t)
R
) R
(t)
qJA
qCA
Typical R
for single device operation using the board layouts shown below on FR−4 PCB in a still air environment:
a) 180°C/W when mounted on a 2oz minimum copper pad.
q
CA
3. Pulse Test: Pulse Width ≤ 300 ms, Duty Cycle ≤ 2.0%.
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2
FDC6323L
TYPICAL ELECTRICAL CHARACTERISTICS (T = 25°C unless otherwise noted)
A
0.5
0.4
0.5
T = 125°C
J
T = 125°C
J
0.4
T = 25°C
J
0.3
0.2
0.1
0
0.3
0.2
0.1
0
T = 25°C
J
V
V
= 5 V
V
V
= 3.3 V
IN
IN
= 1.5−8 V
= 1.5−8 V
ON/OFF
ON/OFF
PW = 300 ms, D ≤ 2%
PW = 300 ms, D ≤ 2%
0
1
1
1
2
3
4
5
5
0
1
2
3
4
I (A)
I (A)
L
L
Figure 3. VDROP Versus IL at VIN = 5 V
Figure 4. VDROP Versus IL at VIN = 3.3 V
1.0
0.8
0.4
0.35
0.3
I = 1 A
I = 1 A
L
L
V
IN
= 3.3 V
PW = 300 ms, D ≤ 2%
V
= 1.5−8 V
PW = 300 ms, D ≤ 2%
ON/OFF
T = 125°C
0.6
0.4
0.2
0
J
0.25
0.2
T = 125°C
J
T = 25°C
J
T = 25°C
J
0.15
0.1
2
3
4
0
1
2
3
4
5
V
IN
(V)
I , (A)
L
Figure 5. VDROP Versus VIN at IL = 1 A
Figure 6. R(ON) Versus IL at VIN = 3.3 V
1
I = 1 A
L
V
= 1.5−8 V
PW = 300 ms, D ≤ 2%
ON/OFF
0.8
0.6
0.4
0.2
0
T = 125°C
J
T = 25°C
J
2
3
4
V
IN
, (V)
Figure 7. On Resistance Variation with Input Voltage
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3
FDC6323L
TYPICAL ELECTRICAL CHARACTERISTICS (T = 25°C unless otherwise noted) (continued)
A
50
50
40
30
V
= 3.3 V
IN
td(off)
I = 1 A
L
V
= 3.3 V
40
30
ON/OFF
R1 = 20 kW
Ci = 10 mF
Co = 1 mF
td(off)
tf
V
= 5 V
IN
tf
I = 1 A
L
20
10
0
20
10
0
V
= 3.3 V
ON/OFF
tr
td(on)
R1 = 20 kW
Ci = 10 mF
Co = 1 mF
tr
td(on)
0
2
4
6
8
10
0
2
4
6
8
10
R2 (kW)
R2 (kW)
Figure 8. Switching Variation with R2
Figure 9. Switching Variation with R2
at VIN = 5 V and R1 = 20 kW
at VIN = 3.3 V and R1 = 20 kW
50
40
250
200
V
= 2.5 V
IN
I = 1 A
L
I = 1 A
L
V
= 3.3 V
ON/OFF
V
= 3.3 V
ON/OFF
R1 = 20 kW
Ci = 10 mF
Co = 1 mF
R1 = 20 kW
Ci = 10 mF
Co = 1 mF
V
= 5 V
IN
30
20
10
0
150
100
50
tr
tf
3.3 V
2.5 V
td(off)
td(on)
0
0
2
4
6
8
10
0
2
4
6
8
10
R2 (kW)
R2 (kW)
Figure 10. Switching Variation with R2
Figure 11. % of Current Overshoot
Variation with VIN and R2
at VIN = 2.5 V and R1 = 20 kW
500
400
I = 1 A
L
t
t
off
on
V
= 3.3 V
ON/OFF
t
t
R1 = 20 kW
Ci = 10 mF
Co = 1 mF
r
t
t
f
d(on)
d(off)
V
IN
= 2.5 V
3.3 V
90%
90%
300
200
100
0
V
OUT
5 V
10%
10%
90%
50%
Inverted
50%
V
IN
10%
Pulse Width
0
20
40
R2 (kW)
60
80
100
Figure 12. VDROP Variation with VIN and R2
Figure 13. Switching Waveforms
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4
FDC6323L
TYPICAL ELECTRICAL CHARACTERISTICS (T = 25°C unless otherwise noted) (continued)
A
10
100 ms
R(ON) Limit
3
1 ms
10 ms
1
0.3
0.1
100 ms
1 s
DC
V
IN
= 5 V
Single Pulse
= See Note 2a
T = 25°C
A
0.03
0.01
R
q
JA
0.1
0.2
0.5
1
2
5
10
20 30
V
DROP
(V)
Figure 14. Safe Operating Area
1
D = 0.5
0.2
0.5
R
R
(t) = r(t) * R
q
JA
= See Note 2a
q
q
JA
JA
0.2
0.1
0.1
0.05
P(pk)
0.05
t
1
0.02
0.01
0.02
0.01
t
2
T − T = P * R (t)
q
JA
J
A
Duty Cycle, D = t /t
1
2
Single Pulse
0.0001 0.001
0.005
0.00001
0.01
t , Time (s)
0.1
1
10
100 300
1
Figure 15. Transient Thermal Response Curve
NOTE: Thermal characterization performed on the conditions described in Note 2a.
Transient thermal response will change depends on the circuit board design.
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5
FDC6323L
LOAD SWITCH APPLICATION
General Description
Q2
This device is particularly suited for compact computer
peripheral switching applications where 8 V input and 1 A
output current capability are needed. This load switch
integrates a small N−Channel Power MOSFET (Q1) which
drives a large P−Channel Power MOSFET (Q2) in one tiny
SUPERSOT−6 package.
IN
OUT
C1
R1
A load switch is usually configured for high side
switching so that the load can be isolated from the active
power source. A P−Channel Power MOSFET, because it
does not require its drive voltage above the input voltage, is
usually more cost effective than using an N−Channel device
in this particular application. A large P−Channel Power
MOSFET minimizes voltage drop. By using a small
N−Channel device the driving stage is simplified.
LOAD
Co
Q1
ON/OFF
R2
Figure 16. Application Circuit
Component Values
• R1: Typical 10k−1 MW
• R2: Typical 0−100 kW (optional)
• C1: Typical 1000 pF (optional)
Design Notes
• R1 is needed to turn off Q2.
• R2 can be used to soft start the switch in case the output capacitance Co is small.
• R2 should be at least 10 times smaller than R1 to guarantee Q1 turns on.
• By using R1 and R2 a certain amount of current is lost from the input. This bias current loss is given by the equitation:
V
IN
I
+
when the switch is ON. I
can be minimized by selecting a large value for R1.
BIAS_LOSS
BIAS_LOSS
R1 ) R2
• R2 and C
of Q2 make ramp for slow turn on. If excessive overshoot current occurs due to fast turn on, additional
capacitance C1 can be added externally to slow down the turn on.
RSS
SUPERSOT is a trademark of Semiconductor Components Industries, LLC dba “onsemi” or its affiliates and/or subsidiaries in the United
States and/or other countries.
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6
MECHANICAL CASE OUTLINE
PACKAGE DIMENSIONS
TSOT23 6−Lead
CASE 419BL
ISSUE A
1
DATE 31 AUG 2020
SCALE 2:1
GENERIC
MARKING DIAGRAM*
XXX MG
G
1
XXX = Specific Device Code
M
= Date Code
G
= Pb−Free Package
(Note: Microdot may be in either location)
*This information is generic. Please refer to
device data sheet for actual part marking.
Pb−Free indicator, “G” or microdot “ G”,
may or may not be present. Some products
may not follow the Generic Marking.
Electronic versions are uncontrolled except when accessed directly from the Document Repository.
Printed versions are uncontrolled except when stamped “CONTROLLED COPY” in red.
DOCUMENT NUMBER:
DESCRIPTION:
98AON83292G
TSOT23 6−Lead
PAGE 1 OF 1
ON Semiconductor and
are trademarks of Semiconductor Components Industries, LLC dba ON Semiconductor or its subsidiaries in the United States and/or other countries.
ON Semiconductor reserves the right to make changes without further notice to any products herein. ON Semiconductor makes no warranty, representation or guarantee regarding
the suitability of its products for any particular purpose, nor does ON Semiconductor assume any liability arising out of the application or use of any product or circuit, and specifically
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rights of others.
© Semiconductor Components Industries, LLC, 2018
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