FDC654P [ONSEMI]
P 沟道，PowerTrench® MOSFET，逻辑电平，-30V，-3.6A，75mΩ;
| 型号： | FDC654P |
| 厂家： | 
ONSEMI |
| 描述： | P 沟道，PowerTrench® MOSFET，逻辑电平，-30V，-3.6A，75mΩ 开关 光电二极管 晶体管 |
| 文件： | 总7页 (文件大小：338K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
DATA SHEET
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MOSFET – Single,
P-Channel, Logic Level,
POWERTRENCH)
V
R
MAX
I MAX
D
DSS
DS(on)
−30 V
75 W @ −10 V
−3.6 A
125 W @ −4.5 V
S
D
FDC654P
D
General Description
G
This P−Channel Logic Level MOSFET is produced using onsemi’s
advanced POWERTRENCH process. It has been optimized for battery
power management applications.
D
D
TSOT23 6−Lead
(SUPERSOTt−6)
CASE 419BL
Features
• −3.6 A, −30 V.
R
R
= 75 mW @ V = −10 V
GS
DS(ON)
= 125 mW @ V = −4.5 V
DS(ON)
GS
• Low Gate Charge (6.2 nC typical)
MARKING DIAGRAM
• High Performance Trench Technology for Extremely Low R
• These Device is Pb−Free and Halogen Free
DS(ON)
654M
G G
Applications
• Battery Management
• Load Switch
654 = Specific Device Code
M
= Date Code
• Battery Protection
G
= Pb−Free Package
(Note: Microdot may be in either location)
ABSOLUTE MAXIMUM RATINGS T = 25°C unless otherwise noted
A
Symbol
Parameter
Drain−Source Voltage
Value
−30
20
Unit
V
PIN ASSIGNMENT
V
DSS
GSS
Gate−Source Voltage
V
V
1
2
3
6
5
4
Drain Current
− Continuous
− Pulsed
I
D
(Note 1a)
−3.6
−10
A
Maximum Power Dissipation
(Note 1a)
(Note 1b)
P
D
W
1.6
0.8
Operating and Storage Junction
Temperature Range
_C
−55 to +150
T , T
J
STG
ORDERING INFORMATION
Stresses exceeding those listed in the Maximum Ratings table may damage the
device. If any of these limits are exceeded, device functionality should not be
assumed, damage may occur and reliability may be affected.
†
Device
Package
Shipping
FDC654P
TSOT−23−6
(SUPERSOTt−6)
(Pb−Free)
3000 /
Tape & Reel
THERMAL CHARACTERISTICS T = 25°C unless otherwise noted
A
Symbol
Parameter
Value
Unit
†For information on tape and reel specifications,
including part orientation and tape sizes, please
refer to our Tape and Reel Packaging Specifica-
tions Brochure, BRD8011/D.
Thermal Resistance,
°C/W
78
R
θ
JA
Junction−to−Ambient
(Note 1a)
(Note 1)
Thermal Resistance,
Junction−to−Case
°C/W
30
R
θ
JC
© Semiconductor Components Industries, LLC, 2022
1
Publication Order Number:
May, 2022 − Rev. 6
FDC654P/D
FDC654P
ELECTRICAL CHARACTERISTICS T = 25°C unless otherwise noted
A
Symbol
Parameter
Test Conditions
Min
Typ
Max
Unit
OFF CHARACTERISTICS
BV
Drain−Source Breakdown Voltage
V
= 0 V, I = −250 mA
−30
−
−
−
V
DSS
GS
D
Breakdown Voltage Temperature Coefficient
I = −250 mA, Referenced to 25_C
D
−
−22
mV/_C
DBVDSS
DTJ
I
Zero Gate Voltage Drain Current
Gate−Body Leakage, Forward
Gate−Body Leakage, Reverse
V
DS
V
GS
V
GS
= −24 V, V = 0 V
−
−
−
−
−
−
−1
mA
nA
nA
DSS
GS
I
= 20 V, V = 0 V
100
GSSF
GSSR
DS
I
= −20 V, V = 0 V
−100
DS
ON CHARACTERISTICS (Note 2)
Gate Threshold Voltage
V
V
DS
= V I = −250 mA
GS, D
−1
−1.9
−3
V
GS(th)
Gate Threshold Voltage Temperature Coefficient I = −250 mA, Referenced to 25_C
−
4
−
mV/_C
DVGS(th)
DTJ
D
R
Static Drain−Source On−Resistance
V
V
V
= −10 V, I = −3.6 A
−
−
−
63
100
90
75
125
115
mW
DS(on)
GS
GS
GS
D
= −4.5 V, I = −2.7 A
D
= −10 V, I = −3.6 A, T = 125_C
D
J
I
On−State Drain Current
V
GS
DS
= −4.5 V, V = −5 V
−5
−
−
−
A
S
D(on)
DS
g
FS
Forward Transconductance
V
= −5 V, I = −3.6 A
−
6
D
DYNAMIC CHARACTERISTICS
C
Input Capacitance
V
= −15 V, V = 0 V,
−
−
−
298
83
−
−
−
pF
pF
pF
iss
DS
GS
f = 1.0 MHz
C
Output Capacitance
oss
C
Reverse Transfer Capacitance
39
rss
SWITCHING CHARACTERISTICS (Note 2)
t
Turn−On Delay Time
Turn−On Rise Time
Turn−Off Delay Time
Turn−Off Fall Time
Total Gate Charge
Gate−Source Charge
Gate−Drain Charge
V
V
= −15 V, I = −1 A,
−
−
−
−
−
−
−
6
13
11
6
12
23
20
12
9
ns
ns
d(on)
DD
GS
D
= −10 V, R
= 6 W
GEN
t
r
t
ns
d(off)
t
f
ns
Q
V
DD
V
GS
= −15 V, I = −3.6 A,
6.2
1
nC
nC
nC
g
D
= −10 V
Q
−
gs
gd
Q
1.2
−
DRAIN−SOURCE DIODE CHARACTERISTICS AND MAXIMUM RATINGS
Maximum Continuous Drain−Source Diode Forward Current
Drain−Source Diode Forward Voltage = 0 V, I = −1.3 A (Note 2)
I
−
−
−
−1.3
−1.2
A
V
S
V
SD
V
GS
−0.8
S
Product parametric performance is indicated in the Electrical Characteristics for the listed test conditions, unless otherwise noted. Product
performance may not be indicated by the Electrical Characteristics if operated under different conditions.
NOTES:
1. R
is the sum of the junction−to−case and case−to−ambient thermal resistance where the case thermal reference is defined as the solder
θ
JA
mounting surface of the drain pins. R
is guaranteed by design while R
is determined by the user’s board design.
θ
θ
JC
CA
a) 78°C/W when mounted on
b) 156°C/W when mounted on
a minimum pad of 2 oz copper.
2
a 1in pad of 2 oz copper.
Scale 1:1 on letter size paper
2. Pulse Test: Pulse Width < 300 μs, Duty Cycle < 2.0%.
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2
FDC654P
TYPICAL CHARACTERISTICS
2
15
12
− 6 V
−5 V
V
GS
= −10 V
V
GS
= −3.5 V
1.8
1.6
1.4
1.2
1
−4.5 V
−4 V
9
6
3
0
−4.5 V
− 4 V
− 5 V
− 6 V
− 3.5 V
− 7 V
0.8
− 10 V
0.6
0.4
− 3 V
9
0
3
2
3
6
12
1
4
5
15
0
−I DRAIN CURRENT (A)
D,
−V , DRAIN TO SOURCE VOLTAGE (V)
DS
Figure 2. On−Resistance Variation with
Figure 1. On−Region Characteristics
Drain Current and Gate Voltage
1.6
0.3
I
D
= 3.6 A
I
D
= −1.8 A
V
GS
= −10 V
0.25
1.4
1.2
0.2
T = 125°C
A
1
0.8
0.6
0.15
T = 25°C
A
0.1
0.05
8
150
6
125
2
4
10
−50
−25
0
25
50
100
75
T , JUNCTION TEMPERATURE (°C)
J
−V , GATE TO SOURCE VOLTAGE (V)
GS
Figure 3. On−Resistance Variation with
Figure 4. On−Resistance Variation with
Gate−to−Source Voltage
Temperature
10
10
1
V
GS
= 0 V
T = −55°C
A
V
DS
= −5 V
T = 125°C
A
25°C
8
6
4
25°C
125°C
0.1
0.01
−55°C
0.001
0.0001
2
0
0.4
0.6
5
0.2
4
0.8
1.2
0
1
1
2
3
−V , GATE TO SOURCE VOLTAGE (V)
GS
−V , BODY DIODE FORWARD VOLTAGE (V)
SD
Figure 6. Body Diode Forward Voltage
Figure 5. Transfer Characteristics
Variation with Source Current and Temperature
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3
FDC654P
TYPICAL CHARACTERISTICS (Continued)
400
10
8
f = 1 MHz
= 0 V
V
DS
= −5 V
I
D
= −3.6 A
V
GS
−10 V
C
ISS
300
200
−15 V
6
4
C
OSS
100
0
2
0
C
RSS
3
4
2
5
6
0
0
7
1
6
12
30
18
24
Q ,GATE CHARGE (nC)
G
−V , DRAIN TO SOURCE VOLTAGE (V)
DS
Figure 7. Gate Charge Characteristics
Figure 8. Capacitance Characteristics
100
10
1
10
8
Single Pulse
R
LIMIT
DS(ON)
R
= 156°C/W
θ
JA
10 μs
T = 25°C
A
100 μs
1 ms
6
10 ms
100 ms
1 s
4
V
= −10 V
GS
0.1
Single Pulse
= 156°C/W
2
0
R
θ
JA
DC
T = 25°C
A
0.01
100
0.01
0.1
10
1
0.1
1
10
100
−V , DRAIN−SOURCE VOLTAGE (V)
DS
t , TIME (s)
1
Figure 10. Single Pulse Maximum Power
Dissipation
Figure 9. Maximum Safe Operating Area
1
D = 0.5
R
(t) = r(t) * R
q
JA
q
JA
R
= 156°C/W
q
JA
0.2
0.1
P
(pk)
0.1
t
1
0.05
t
2
T − T = P * R (t)
q
JA
J
A
0.02
Duty Cycle, D = t / t
1
2
0.01
0.0001
Single Pulse
0.001
0.01
1000
0.1
1
10
100
0.01
t , TIME (s)
1
Figure 11. Transient Thermal Response Curve
Thermal characterization performed using the conditions described in Note 1b.
Transient thermal response will change depending on the circuit board design.
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4
FDC654P
POWERTRENCH is registered trademark of Semiconductor Components Industries, LLC dba “onsemi” or its affiliates and/or subsidiaries in the United
States and/or other countries.
SUPERSOT is a trademark of Semiconductor Components Industries, LLC dba “onsemi” or its affiliates and/or subsidiaries in the United States and/or
other countries.
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5
MECHANICAL CASE OUTLINE
PACKAGE DIMENSIONS
TSOT23 6−Lead
CASE 419BL
ISSUE A
1
DATE 31 AUG 2020
SCALE 2:1
GENERIC
MARKING DIAGRAM*
XXX MG
G
1
XXX = Specific Device Code
M
= Date Code
G
= Pb−Free Package
(Note: Microdot may be in either location)
*This information is generic. Please refer to
device data sheet for actual part marking.
Pb−Free indicator, “G” or microdot “ G”,
may or may not be present. Some products
may not follow the Generic Marking.
Electronic versions are uncontrolled except when accessed directly from the Document Repository.
Printed versions are uncontrolled except when stamped “CONTROLLED COPY” in red.
DOCUMENT NUMBER:
DESCRIPTION:
98AON83292G
TSOT23 6−Lead
PAGE 1 OF 1
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© Semiconductor Components Industries, LLC, 2018
www.onsemi.com
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