FDMA6676PZ [ONSEMI]
单 P 沟道，PowerTrench® MOSFET，-30V，-11A，13.5mΩ;
| 型号： | FDMA6676PZ |
| 厂家： | 
ONSEMI |
| 描述： | 单 P 沟道，PowerTrench® MOSFET，-30V，-11A，13.5mΩ |
| 文件： | 总7页 (文件大小：394K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
MOSFET – Single, P-Channel,
POWERTRENCH)
-30 V, -11 A, 13.5 mW
FDMA6676PZ
Description
www.onsemi.com
This device is an ultra low resistance P−Channel FET. It is designed
for power line load switching applications and reverse polarity
protection. It is especially optimized for voltage rails that can climb as
high as 25 V. Typical end systems include laptop computers, tablets
and mobile phone. Applications include battery protection, input
power line protection and charge path protection, including USB
Pin 1
D
D
G
Source
Drain
and other charge paths. The FDMA6676PZ has an enhanced V
GS
D
D
rating of 25 V specifically designed to simplify installation. When
used as reverse polarity protection, with gate tied to ground and drain
tied to V input, it is designed to support operating input voltages that
can raise as high as 25 V without the need for external Zener
protection on the gate. Its small 2 x 2 x 0.8 form factor make it an ideal
part for mobile and space constrained applications.
S
WDFN6
CASE 483AV
MARKING DIAGRAM
Features
&2&K
&Z676
&.
• Max r
= 13.5 mW @ V = −10 V
GS
DS(on)
• 25 V V Extended Operating Rating
GS
• 30 V V Blocking
DS
• 2 x 2 mm Form Factor
&2
&K
&Z
676
&.
= 2−Digit Date Code
= Lot Code
= Assembly Plant Code
= Specific Device Code
= Pin 1 Dot
• Low Profile − 0.8 mm Maximum
• Integrated Protection Diode
• These Devices are Pb−Free, Halogen Free/BFR Free and are RoHS
Compliant
PIN CONNECTION
D
D
S
D
D
G
ORDERING INFORMATION
See detailed ordering and shipping information on page 3 of
this data sheet.
© Semiconductor Components Industries, LLC, 2015
1
Publication Order Number:
April, 2021 − Rev. 3
FDMA6676PZ/D
FDMA6676PZ
ABSOLUTE MAXIMUM RATINGS
Symbol
Parameter
Ratings
−30
Unit
V
V
V
Drain to Source Voltage
Gate to Source Voltage
Drain Current − Continuous,
− Pulsed
DS
GS
25
V
I
T = 25°C (Note 1a)
−11
A
D
A
(Note 3)
−165
2.4
P
D
Power Dissipation
T = 25°C (Note 1a)
A
W
Power Dissipation
T = 25°C (Note 1b)
A
0.9
T , T
Operating and Storage Junction Temperature Range
−55 to +150
°C
J
STG
Stresses exceeding those listed in the Maximum Ratings table may damage the device. If any of these limits are exceeded, device functionality
should not be assumed, damage may occur and reliability may be affected.
THERMAL CHARACTERISTICS
Symbol
Characteristic
Thermal Resistance, Junction to Ambient
Thermal Resistance, Junction to Ambient
Value
52
Unit
R
(Note 1a)
(Note 1b)
°C/W
q
JA
R
145
q
JA
ELECTRICAL CHARACTERISTICS (T = 25°C unless otherwise noted)
J
Symbol
Parameter
Test Condition
Min.
Typ.
Max.
Unit
OFF CHARACTERISTICS
BV
Drain to Source Breakdown Voltage
I
I
= −250 mA, V = 0 V
−30
V
DSS
D
GS
DBV
/ DT
Breakdown Voltage Temperature
Coefficient
= −250 mA,
−19
mV/°C
DSS
J
D
Referenced to 25°C
I
Zero Gate Voltage Drain Current
Gate to Source Leakage Current
V
= −24 V, V = 0 V
−1
mA
mA
DSS
DS
GS
GS
I
V
=
25 V, V = 0 V
10
GSS
DS
ON CHARACTERISTICS
V
GS(th)
Gate to Source Threshold Voltage
V
GS
= V , I = −250 mA
−1.2
−2
−2.6
V
DS
D
DV
/ DT
Gate to Source Threshold Voltage
Temperature Coefficient
I = −250 mA,
D
Referenced to 25°C
5.9
mV/°C
GS(th)
J
r
Static Drain to Source On Resistance
V
GS
V
GS
V
GS
V
DD
= −10 V, I = −11 A
11
19
13.5
27
mW
DS(on)
D
= −4.5 V, I = −8 A
D
= −10 V, I = −11 A, T = 125°C
14.5
38
21
D
J
g
FS
Forward Transconductance
= −5 V, I = −11 A
S
D
DYNAMIC CHARACTERISTICS
C
Input Capacitance
V
DS
= −15 V, V = 0 V, f = 1 MHz
1440
477
458
12
2160
720
pF
pF
pF
W
iss
GS
C
Output Capacitance
Reverse Transfer Capacitance
Gate Resistance
oss
C
690
rss
R
g
SWITCHING CHARACTERISTICS
t
Turn−On Delay Time
Rise Time
V
V
= −15 V, I = −11 A,
8.8
19
87
72
33
18
34
ns
ns
ns
ns
nC
d(on)
DD
GS
D
= −10 V, R
= 6 W
GEN
t
r
t
Turn−Off Delay Time
Fall Time
139
115
46
d(off)
t
f
Q
Total Gate Charge
V
GS
V
DD
= 0 V to −10 V,
g
= −15 V, I = −11 A
D
www.onsemi.com
2
FDMA6676PZ
ELECTRICAL CHARACTERISTICS (T = 25°C unless otherwise noted) (continued)
J
Symbol
Parameter
Test Condition
Min.
Typ.
Max.
Unit
SWITCHING CHARACTERISTICS
Q
Total Gate Charge
V
GS
V
DD
= 0 V to −4.5 V,
20
28
nC
g
= −15 V, I = −11 A
D
Q
Q
Gate to Source Charge
V
DD
V
DD
= −15 V, I = −11 A
4.5
13
nC
nC
gs
D
Gate to Drain “Miller” Charge
= −15 V, I = −11 A
gd
D
DRAIN−SOURCE DIODE CHARACTERISTICS
V
Source to Drain Diode Forward
Voltage
−0.7
−0.9
31
−1.2
−1.4
50
V
V
V
V
= 0 V, I = −2 A (Note 2)
SD
GS
S
= 0 V, I = −11 A (Note 2)
GS
S
t
Reverse Recovery Time
I
F
= -11 A, di/dt = 100 A/ms
ns
nC
rr
Q
Reverse Recovery Charge
9
18
rr
Product parametric performance is indicated in the Electrical Characteristics for the listed test conditions, unless otherwise noted. Product
performance may not be indicated by the Electrical Characteristics if operated under different conditions.
1. R
is determined with the device mounted on a 1 in2 pad 2 oz copper pad on a 1.5 x 1.5 in. board of FR−4 material. R
is determined
q
q
JA
CA
by the user’s board design.
a. 52°C/W when mounted
b. 145°C/W when mounted
on a minimum pad of 2 oz copper.
2
on a 1 in pad of 2 oz copper.
2. Pulse Test: Pulse Width < 300 ms, Duty cycle < 2.0%.
3. Pulse Id refers to Forward Bias Safe Operation Area.
ORDERING INFORMATION
†
Device Marking
Device
Package
Package Method
676
FDMA6676PZ
WDFN−6
3000 Tape / Reel
†For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging
Specifications Brochure, BRD8011/D.
www.onsemi.com
3
FDMA6676PZ
TYPICAL CHARACTERISTICS (T = 25°C unless otherwise noted)
J
100
80
60
40
20
0
4
V
= −10 V
GS
V
= −6 V
V
= −3.5 V
GS
GS
3
2
1
0
V
GS
= −4.5 V
V
= −5.5 V
V
= −5.5 V
GS
GS
V
= −4.5 V
GS
V
GS
= −10 V
Pulse Duration = 80 ms
Duty Cycle = 0.5% Max
Pulse Duration = 80 ms
Duty Cycle = 0.5% Max
V
= −6 V
GS
V
= −3.5 V
GS
0
1
2
3
4
5
0
20
40
60
80
100
−I , Drain Current (A)
D
−V , Drain to Source Voltage (V)
DS
Figure 2. Normalized On−Resistance vs. Drain
Figure 1. On−Region Characteristics
Current and Gate Voltage
1.4
80
60
Pulse Duration = 80 ms
Duty Cycle = 0.5% Max
I
V
= −11 A
D
1.3
1.2
1.1
1.0
0.9
0.8
0.7
= −10 V
GS
I
D
= −11 A
40
20
0
T = 125°C
J
T = 25°C
J
2
4
6
8
10
−75 −50 −25
0
25
50
75 100 125 150
−V , Gate to Source Voltage (V)
GS
T , Junction Temperature (°C)
J
Figure 4. On−Resistance vs. Gate
Figure 3. Normalized On−Resistance
to Source Voltage
vs. Junction Temperature
100
80
60
40
20
0
100
10
Pulse Duration = 80 ms
Duty Cycle = 0.5% Max
V
= 0 V
GS
V
DS
= −5 V
T = 150°C
J
1
T = 150°C
J
T = 25°C
J
0.1
T = 25°C
J
T = −55°C
0.01
J
T = −55°C
J
0.001
0.4
0.6
0.8
1.0
1.2
1.4
0.0
0.2
1
2
3
4
5
6
−V , Body Diode Forward Voltage (V)
SD
−V , Gate to Source Voltage (A)
GS
Figure 6. Source to Drain Diode Forward
Voltage vs. Source Current
Figure 5. Transfer Characteristics
www.onsemi.com
4
FDMA6676PZ
TYPICAL CHARACTERISTICS (T = 25°C unless otherwise noted)
J
10
8
10000
I
D
= −11 A
V
DD
= −10 V
C
iss
6
V
DD
= −15 V
1000
C
oss
4
V
DD
= −20 V
C
rss
2
0
f = 1 MHz
= 0 V
V
GS
100
40
0
10
20
30
30
0.1
1
10
−V , Drain to Source Voltage (V)
DS
Q , Gate Charge (nC)
g
Figure 8. Capacitance vs. Drain to Source
Voltage
Figure 7. Gate Charge Characteristics
300
100
1000
100
10
This Area Is
Limited by r
Single Pulse
DS(on)
R
= 145°C/W
q
JA
T = 25°C
A
10
1
100ms
1 ms
10 ms
100 ms
Single Pulse
T = Max Rated
1
0.1
1 s
J
10 s
DC
R
= 145°C/W
Curve Bent to
Measured Data
q
JA
T = 25°C
A
0.01
0.1
−4
−3
−2
−1
0.01
0.1
1
10
100 200
10
10
10
10
1
10
100 1000
t, Pulse Width (sec)
−V , Drain to Source Voltage (V)
DS
Figure 10. Single Pulse Maximum Power
Dissipation
Figure 9. Forward Bias Safe Operating Area
2
1
Duty Cycle−Descending Order
D = 0.5
0.2
0.1
0.1
P
DM
0.05
0.02
0.01
t
1
0.01
t
2
Notes:
(t) = r(t) x R
Single Pulse
P
DM
Z
q
q
JA
JA
0.001
0.0001
R
= 145°C/W
q
JA
Peak T = P
x Z (t) + T
q
JA A
J
DM
Duty Cycle, D = t /t
1
2
−3
−2
−1
−4
10
10
10
1
10
100
1000
10
t, Rectangular Pulse Duration (sec)
Figure 11. Junction−to−Ambient Transient Thermal Response Curve
POWERTRENCH is registered trademark of Semiconductor Components Industries, LLC (SCILLC) or its subsidiaries in the United
States and/or other countries.
www.onsemi.com
5
MECHANICAL CASE OUTLINE
PACKAGE DIMENSIONS
WDFN6 2.05X2.05, 0.65P
CASE 483AV
ISSUE A
DATE 02 APR 2019
Electronic versions are uncontrolled except when accessed directly from the Document Repository.
Printed versions are uncontrolled except when stamped “CONTROLLED COPY” in red.
DOCUMENT NUMBER:
DESCRIPTION:
98AON13671G
WDFN6 2.05X2.05, 0.65P
PAGE 1 OF 1
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