FDMA7628 [ONSEMI]
单 N 沟道 1.5V 指定 PowerTrench® MOSFET 20V,9.4A,14.5mΩ;型号: | FDMA7628 |
厂家: | ONSEMI |
描述: | 单 N 沟道 1.5V 指定 PowerTrench® MOSFET 20V,9.4A,14.5mΩ 开关 光电二极管 晶体管 |
文件: | 总9页 (文件大小:348K) |
中文: | 中文翻译 | 下载: | 下载PDF数据表文档文件 |
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May 2012
FDMA7628
Single N-Channel 1.5 V Specified PowerTrench® MOSFET
20 V, 9.4 A, 14.5 mΩ
Features
General Description
Max rDS(on) = 14.5 mΩ at VGS = 4.5 V, ID = 9.4 A
Max rDS(on) = 18.2 mΩ at VGS = 2.5 V, ID = 8.3 A
Max rDS(on) = 23.3 mΩ at VGS = 1.8 V, ID = 7.3 A
Max rDS(on) = 32.3 mΩ at VGS = 1.5 V, ID = 6.2 A
This Single N-Channel MOSFET has been designed using
Fairchild Semiconductor’s advanced Power Trench® process to
optimize the rDS(ON) @ VGS = 1.5 V on special MicroFET
leadframe.
Low Profile-0.8 mm maximum in the new package MicroFET
Applications
2x2 mm
Li-lon Battery Pack
DC-DC Buck Converters
RoHS Compliant
Pin 1
G
D
D
Bottom Drain Contact
D
D
S
D
D
Drain
Source
G
D
D
S
MicroFET 2X2 (Bottom View)
MOSFET Maximum Ratings TA = 25 °C unless otherwise noted
Symbol
VDS
VGS
Parameter
Ratings
Units
Drain to Source Voltage
Gate to Source Voltage
20
V
V
±8
9.4
-Continuous
-Pulsed
Power Dissipation
Power Dissipation
TA = 25 °C
(Note 1a)
ID
A
54
TA = 25 °C
TA = 25 °C
(Note 1a)
(Note 1b)
1.9
PD
W
0.7
TJ, TSTG
Operating and Storage Junction Temperature Range
-55 to +150
°C
Thermal Characteristics
RθJA
RθJA
Thermal Resistance, Junction to Ambient
Thermal Resistance, Junction to Ambient
(Note 1a)
(Note 1b)
65
°C/W
180
Package Marking and Ordering Information
Device Marking
Device
Package
Reel Size
7 ’’
Tape Width
12 mm
Quantity
104
FDMA7628
MicroFET 2X2
3000 units
©2012 Fairchild Semiconductor Corporation
FDMA7628 Rev.C
1
www.fairchildsemi.com
Electrical Characteristics TJ = 25 °C unless otherwise noted
Symbol
Parameter
Test Conditions
Min
Typ
Max
Units
Off Characteristics
BVDSS
Drain to Source Breakdown Voltage
ID = 250 μA, VGS = 0 V
20
V
ΔBVDSS
ΔTJ
Breakdown Voltage Temperature
Coefficient
I
D = 250 μA, referenced to 25 °C
15
mV/°C
IDSS
IGSS
Zero Gate Voltage Drain Current
Gate to Source Leakage Current
VDS = 16 V, VGS = 0 V
VGS = ±8 V, VDS = 0 V
1
μA
±100
nA
On Characteristics
VGS(th)
Gate to Source Threshold Voltage
VGS = VDS, ID = 250 μA
0.4
0.6
-3
1.0
V
ΔVGS(th)
ΔTJ
Gate to Source Threshold Voltage
Temperature Coefficient
I
D = 250 μA, referenced to 25 °C
GS = 4.5 V, ID = 9.4 A
mV/°C
V
11.3
12.7
15.0
18.3
14.5
18.2
23.3
32.3
VGS = 2.5 V, ID = 8.3 A
VGS = 1.8 V, ID = 7.3 A
VGS = 1.5 V, ID = 6.2 A
rDS(on)
Static Drain to Source On Resistance
Forward Transconductance
mΩ
VGS = 4.5 V, ID = 9.4 A,
TJ = 125 °C
14.7
56
18.3
gFS
VDD = 5 V, ID = 9.4 A
S
Dynamic Characteristics
Ciss
Coss
Crss
Rg
Input Capacitance
1260
180
122
1.9
1680
240
pF
pF
pF
Ω
VDS = 10 V, VGS = 0 V,
f = 1 MHz
Output Capacitance
Reverse Transfer Capacitance
Gate Resistance
185
Switching Characteristics
td(on)
tr
td(off)
tf
Turn-On Delay Time
Rise Time
9
6
17
11
58
11
ns
ns
VDD = 10 V, ID = 9.4 A,
V
GS = 4.5 V, RGEN = 6 Ω
Turn-Off Delay Time
Fall Time
37
ns
6
ns
Total Gate Charge
Total Gate Charge
Total Gate Charge
Total Gate Charge
Gate to Source Charge
Gate to Drain “Miller” Charge
VGS = 0 V to 4.5 V
VGS = 0 V to 2.5 V
VGS = 0 V to 1.8 V
VGS = 0 V to 1.5 V
17.5
10.0
7.4
6.2
1.7
2.7
nC
nC
nC
nC
nC
nC
Qg
V
DD = 10 V,
I
D = 9.4 A
Qgs
Qgd
Drain-Source Diode Characteristics
IS
Maximum Continuous Drain-Source Diode Forward Current
2.0
1.2
29
A
V
VSD
trr
Source to Drain Diode Forward Voltage
Reverse Recovery Time
VGS = 0 V, IS = 2.0 A
(Note 2)
0.63
16
5
ns
nC
IF = 9.4 A, di/dt = 100 A/μs
Qrr
Reverse Recovery Charge
10
©2012 Fairchild Semiconductor Corporation
FDMA7628 Rev.C
www.fairchildsemi.com
2
NOTES:
1. R is determined with the device mounted on a 1 in pad 2 oz copper pad on a 1.5 x 1.5 in. board of FR-4 material. R
the user's board design.
2
is guaranteed by design while R is determined by
θJA
θJA
θJC
a.65 °C/W when mounted
on a 1 in pad of 2 oz copper.
b. 180 °C/W when mounted on a
minimum pad of 2 oz copper.
2
2. Pulse Test: Pulse Width < 300 μs, Duty cycle < 2.0%.
©2012 Fairchild Semiconductor Corporation
FDMA7628 Rev.C
www.fairchildsemi.com
3
Typical Characteristics TJ = 25 °C unless otherwise noted
4
3
2
1
0
54
VGS = 4.5 V
VGS = 1.2 V
VGS = 1.8 V
VGS = 1.5 V
45
36
27
18
9
VGS = 1.8 V
VGS = 2.5 V
VGS = 1.5 V
VGS = 2.5 V
PULSE DURATION = 80 μs
DUTY CYCLE = 0.5% MAX
VGS = 1.2 V
VGS = 4.5 V
PULSE DURATION = 80 μs
DUTY CYCLE = 0.5% MAX
0
0
9
18
27
36
45
54
0
0.5
1.0
1.5
2.0
2.5
3.0
ID, DRAIN CURRENT (A)
VDS, DRAIN TO SOURCE VOLTAGE (V)
Figure 1. On Region Characteristics
F i g u r e 2 . No rma li zed O n-Re si stan ce
vs Drain Current and Gate Voltage
1.6
1.4
1.2
1.0
0.8
0.6
60
PULSE DURATION = 80 μs
DUTY CYCLE = 0.5% MAX
ID = 9.4 A
GS = 4.5 V
ID = 9.4 A
V
50
40
30
20
10
0
TJ = 125 o
C
TJ = 25 o
C
-75 -50 -25
0
25 50 75 100 125 150
0.9
1.8
2.7
3.6
4.5
TJ, JUNCTION TEMPERATURE (oC)
VGS, GATE TO SOURCE VOLTAGE (V)
Figure 3. Normalized On Resistance
vs Junction Temperature
Figure4. On-Resistance vs Gate to
Source Voltage
100
54
PULSE DURATION = 80 μs
VGS = 0 V
DUTY CYCLE = 0.5% MAX
45
36
27
18
9
10
1
TJ = 125 o
C
VDS = 5 V
TJ = 25 o
C
0.1
TJ = 25 o
C
TJ = 125 o
C
0.01
0.001
TJ = -55 o
C
TJ = -55 o
C
0
0.5
0.0
0.2
0.4
0.6
0.8
1.0
1.2
1.0
1.5
2.0
2.5
VSD, BODY DIODE FORWARD VOLTAGE (V)
VGS, GATE TO SOURCE VOLTAGE (V)
Figure 5. Transfer Characteristics
Figure6. Source to Drain Diode
Forward Voltage vs Source Current
©2012 Fairchild Semiconductor Corporation
FDMA7628 Rev.C
www.fairchildsemi.com
4
Typical Characteristics TJ = 25 °C unless otherwise noted
4.5
5000
1000
ID = 9.4 A
Ciss
3.6
VDD = 8 V
2.7
Coss
VDD = 10 V
1.8
100
10
VDD = 12 V
Crss
0.9
0.0
f = 1 MHz
= 0 V
V
GS
0
3
6
9
12
15
18
0.1
1
10
20
Q , GATE CHARGE (nC)
g
VDS, DRAIN TO SOURCE VOLTAGE (V)
Figure 7. Gate Charge Characteristics
Figure8. C a p a c i t a n c e v s D r a i n
to Source Voltage
1000
100
10
100
SINGLE PULSE
RθJA = 180 oC/W
TA = 25 oC
100 us
10
1
1 ms
10 ms
THIS AREA IS
LIMITED BY r
DS(on)
100 ms
1 s
SINGLE PULSE
TJ = MAX RATED
1
0.1
R
θJA = 180 oC/W
10 s
DC
T
A = 25 oC
0.1
0.01
100 1000
0.01
0.1
1
10
100
10-4
10-3
10-2
t, PULSE WIDTH (sec)
10-1
1
10
VDS, DRAIN to SOURCE VOLTAGE (V)
Figure 9. Forward Bias Safe
Operating Area
Figure 10. Single Pulse Maximum
Power Dissipation
2
1
DUTY CYCLE-DESCENDING ORDER
D = 0.5
0.2
0.1
0.05
0.02
0.01
0.1
0.01
P
DM
t
1
t
2
NOTES:
DUTY FACTOR: D = t /t
SINGLE PULSE
RθJA = 180 oC/W
1
2
PEAK T = P
J
x Z
x R
+ T
DM
θJA
θJA A
0.001
10-4
10-3
10-2
10-1
1
10
100
1000
t, RECTANGULAR PULSE DURATION (sec)
Figure 11. Junction-to-Ambient Transient Thermal Response Curve
©2012 Fairchild Semiconductor Corporation
FDMA7628 Rev.C
www.fairchildsemi.com
5
Dimensional Outline and Pad Layout
(0.20)
2.00
A
1.00
No Traces or Vias
Allowed in this Area
0.15
C
B
6
4
2X
1.35
2.30
1.05
2.00
(0.48)
0.15
C
1
3
PIN #1 LOCATION
0.8 MAX
2X
0.40 TYP
TOP VIEW
0.65 TYP
RECOMMENDED LAND PATTERN OPT 1
0.10
C
(0.20)
C
0.08
C
0.05
0.00
SEATING
PLANE
SIDE VIEW
(0.15)
(0.45)
(0.20)
(0.50)
(0.30)
1.00
0.80
1
PIN #1 IDENT
1.00
3
0.66
0.56
0.33
6X
4
6
0.20
1.05
0.95
1.35
0.66
(0.50)
1.05
2.30
6
4
(0.48)
0.35
0.25
6X
1
3
0.65
0.10
0.05
C
C
A B
1.30
0.40 TYP
0.65 TYP
BOTTOM VIEW
RECOMMENDED LAND PATTERN OPT 2
A. DOES NOT FULLY CONFORM TO JEDEC REGISTRATION
MO-229 DATED AUG/2003
B. DIMENSIONS ARE IN MILLIMETERS.
C. DIMENSIONS AND TOLERANCES PER
ASME Y14.5M, 1994
©2012 Fairchild Semiconductor Corporation
FDMA7628 Rev.C
www.fairchildsemi.com
6
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Rev. I61
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©2012 Fairchild Semiconductor Corporation
FDMA7628 Rev.C
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