FDMC612PZ [ONSEMI]
P 沟道 PowerTrench® MOSFET -20V,-14A,8.4mΩ;型号: | FDMC612PZ |
厂家: | ONSEMI |
描述: | P 沟道 PowerTrench® MOSFET -20V,-14A,8.4mΩ |
文件: | 总8页 (文件大小:385K) |
中文: | 中文翻译 | 下载: | 下载PDF数据表文档文件 |
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October 2013
FDMC612PZ
P-Channel PowerTrench® MOSFET
-20 V, -14 A, 8.4 mΩ
Features
General Description
Max rDS(on) = 8.4 mΩ at VGS = -4.5 V, ID = -14 A
Max rDS(on) = 13 mΩ at VGS = -2.5 V, ID = -11 A
High performance trench technology for extremely low rDS(on)
This P-Channel MOSFET is produced using Fairchild
Semiconductor’s advanced PowerTrench® process that has
been optimized for rDS(ON)
ruggedness.
,
switching performance and
High power and current handling capability in a widely used
surface mount package
Applications
Termination is Lead-free and RoHS Compliant
Battery Management
Load Switch
HBM ESD capability level > 3.6 KV typical (Note 4)
D D
D
D
8
2
7
6
5
S
S
D
D
Pin 1
S
D
D
G S
S
S
1
3
4
Pin 1
G
Bottom
Top
MLP 3.3x3.3
MOSFET Maximum Ratings TA = 25 °C unless otherwise noted
Symbol
VDS
VGS
Parameter
Ratings
Units
Drain to Source Voltage
Gate to Source Voltage
Drain Current -Continuous
-Continuous
-20
±12
V
V
TC = 25 °C
TA = 25 °C
-40
ID
(Note 1a)
(Note 3)
-14
A
-Pulsed
-50
EAS
Single Pulse Avalanche Energy
Power Dissipation
38
mJ
W
TC = 25 °C
TA = 25 °C
26
PD
Power Dissipation
(Note 1a)
2.3
TJ, TSTG
Operating and Storage Junction Temperature Range
-55 to +150
°C
Thermal Characteristics
RθJC
RθJA
Thermal Resistance, Junction to Case
Thermal Resistance, Junction to Ambient
4.9
53
°C/W
(Note 1a)
Package Marking and Ordering Information
Device Marking
Device
Package
Reel Size
13 ’’
Tape Width
Quantity
FDMC612PZ
FDMC612PZ
MLP 3.3X3.3
12 mm
3000 units
©2013 Fairchild Semiconductor Corporation
FDMC612PZ Rev.C3
1
www.fairchildsemi.com
Electrical Characteristics TJ = 25 °C unless otherwise noted
Symbol
Parameter
Test Conditions
Min
Typ
Max
Units
Off Characteristics
BVDSS
Drain to Source Breakdown Voltage
ID = -250 μA, VGS = 0 V
-20
V
ΔBVDSS
ΔTJ
Breakdown Voltage Temperature
Coefficient
I
D = -250 μA, referenced to 25 °C
-19
mV/°C
IDSS
IGSS
Zero Gate Voltage Drain Current
Gate to Source Leakage Current
VDS = -16 V, VGS = 0 V
VGS = ±12 V, VDS = 0 V
-1
μA
μA
±10
On Characteristics
VGS(th)
Gate to Source Threshold Voltage
VGS = VDS, ID = -250 μA
-0.6
-0.9
9
-1.5
V
ΔVGS(th)
ΔTJ
Gate to Source Threshold Voltage
Temperature Coefficient
I
D = -250 μA, referenced to 25 °C
GS = -4.5 V, ID = -14 A
mV/°C
V
5.9
8.2
8.3
85
8.4
13
13
rDS(on)
gFS
Static Drain to Source On Resistance
Forward Transconductance
VGS = -2.5 V, ID = -11 A
mΩ
VGS = -4.5 V, ID = -14 A, TJ = 125 °C
VDS = -5 V, ID = -14 A
S
Dynamic Characteristics
Ciss
Coss
Crss
Input Capacitance
5710
1215
1170
7995
1700
1640
pF
pF
pF
VDS = -10 V, VGS = 0 V,
f = 1 MHz
Output Capacitance
Reverse Transfer Capacitance
Switching Characteristics
td(on)
tr
td(off)
tf
Turn-On Delay Time
Rise Time
26
52
96
81
53
9.4
18
42
83
ns
ns
VDD = -10 V, ID = -14 A,
V
GS = -4.5 V, RGEN = 6 Ω
Turn-Off Delay Time
Fall Time
154
130
74
ns
ns
Qg
Total Gate Charge
Gate to Source Charge
Gate to Drain “Miller” Charge
nC
nC
nC
VDD = -10 V, ID = -14 A,
Qgs
Qgd
V
GS = -4.5 V
Drain-Source Diode Characteristics
V
GS = 0 V, IS = -14 A
(Note 2)
(Note 2)
-0.8
-0.7
39
-1.3
-1.2
62
VSD
Source to Drain Diode Forward Voltage
V
VGS = 0 V, IS = -2 A
trr
Reverse Recovery Time
ns
IF = -14 A, di/dt = 100 A/μs
Qrr
Reverse Recovery Charge
17
31
nC
Notes:
2
1: R
is determined with the device mounted on a 1 in pad 2 oz copper pad on a 1.5 x 1.5 in. board of FR-4 material. R
is guaranteed by design while R is determined
θJA
θJA
θJC
by the user’s board design.
a. 53 °C/W when mounted on a
b. 125 °C/W when mounted on a
minimum pad of 2 oz copper.
2
1 in pad of 2 oz copper.
2: Pulse Test: Pulse Width < 300 μs, Duty cycle < 2.0 %.
3: E of 38 mJ is based on starting T = 25 °C, L = 0.3 mH, I = -16 A, V = -18 V, V = -10 V.
AS
J
AS
DD
GS
4: The diode connected between the gate and source serves only as protection against ESD. No gate overvoltage rating is implied.
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2
©2013 Fairchild Semiconductor Corporation
FDMC612PZ Rev.C3
Typical Characteristics TJ = 25 °C unless otherwise noted
50
2.0
1.5
1.0
0.5
PULSE DURATION = 80 μs
DUTY CYCLE = 0.5% MAX
VGS = -4.5 V
40
VGS = -3.5 V
VGS = -2.5 V
VGS = -3.0 V
30
VGS = -3.0 V
VGS = -2.5 V
20
VGS = -4.5 V
VGS = -3.5 V
10
PULSE DURATION = 80 μs
DUTY CYCLE = 0.5% MAX
0
0.0
0.2
0.4
0.6
0
10
20
30
40
50
-VDS, DRAIN TO SOURCE VOLTAGE (V)
-ID, DRAIN CURRENT (A)
Figure 1. On-Region Characteristics
Figure2. N o r m a l i z e d O n - R e s i s ta n c e
vs Drain Current and Gate Voltage
25
1.5
PULSE DURATION = 80 μs
DUTY CYCLE = 0.5% MAX
ID = -14 A
GS = -4.5 V
1.4
1.3
1.2
1.1
1.0
0.9
0.8
0.7
V
20
15
10
5
ID = -14 A
TJ = 125 o
C
TJ = 25 o
C
0
1.5
2.0
2.5
3.0
3.5
4.0
4.5
-75 -50 -25
0
25 50 75 100 125 150
TJ, JUNCTION TEMPERATURE (oC)
-VGS, GATE TO SOURCE VOLTAGE (V)
F i gu re 3 . N orma li zed On - Res is ta nc e
vs Junction Temperature
Figure4. On-Resistance vs Gate to
Source Voltage
50
50
PULSE DURATION = 80 μs
VGS = 0 V
DUTY CYCLE = 0.5% MAX
10
1
40
30
20
10
0
VDS = -5 V
TJ = 150 o
C
TJ = 150 o
C
TJ = 25 oC
0.1
TJ = 25 o
C
0.01
TJ = -55 o
C
TJ = -55 o
C
0.001
0.0
0.2
0.4
0.6
0.8
1.0
1.2
0.0
0.5
1.0
1.5
2.0
2.5
-VSD, BODY DIODE FORWARD VOLTAGE (V)
-VGS, GATE TO SOURCE VOLTAGE (V)
Figure 5. Transfer Characteristics
Figure6. Source to Drain Diode
Forward Voltage vs Source Current
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3
©2013 Fairchild Semiconductor Corporation
FDMC612PZ Rev.C3
Typical Characteristics TJ = 25 °C unless otherwise noted
10000
4.5
ID = -14 A
VDD = -8 V
Ciss
VDD = -10 V
3.0
Coss
VDD = -12 V
Crss
1.5
1000
500
f = 1 MHz
= 0 V
V
GS
0.0
0
20
40
60
0.1
1
10
20
-VDS, DRAIN TO SOURCE VOLTAGE (V)
Qg, GATE CHARGE (nC)
Figure 7. Gate Charge Characteristics
Figure8. C a p a c i t a n c e v s D r a i n
to Source Voltage
50
40
30
20
10
0
50
R
θJC = 4.9 oC/W
TJ = 25 oC
VGS = -4.5 V
TJ = 100 o
C
10
Limited by Package
TJ = 125 o
C
VGS = -2.5 V
1
0.001
0.01
0.1
1
10
100
25
50
75
100
125
150
TC, CASE TEMPERATURE (oC)
tAV, TIME IN AVALANCHE (ms)
Figure9. U n c l a m p e d I n d u c t i v e
Switching Capability
Figure10. M a x i m u m C o n t i n u o u s D r a i n
Current vs Case Temperature
10-1
100
10-2
10-3
10-4
10-5
10-6
10-7
10-8
10-9
10-10
VDS = 0 V
100 μs
10
1
1 ms
TJ = 125 oC
10 ms
THIS AREA IS
LIMITED BY rDS(on)
100 ms
1 s
SINGLE PULSE
TJ = MAX RATED
RθJA = 125 oC/W
TA = 25 oC
0.1
0.01
10 s
DC
TJ = 25 o
C
CURVE BENT TO
MEASURED DATA
0
6
12
18
0.01
0.1
1
10
100
-VGS, GATE TO SOURCE VOLTAGE (V)
-VDS, DRAIN to SOURCE VOLTAGE (V)
Figure11. G a t e L e a k a g e C u r r e n t v s G a t e t o
Source Voltage
Figure 12. Forward Bias Safe
Operating Area
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4
©2013 Fairchild Semiconductor Corporation
FDMC612PZ Rev.C3
Typical Characteristics TJ = 25 °C unless otherwise noted
1000
SINGLE PULSE
θJA = 125 oC/W
TA = 25 o
R
100
10
1
C
0.1
10-4
10-3
10-2
10-1
1
10
100
1000
t, PULSE WIDTH (sec)
Figure 13. Single Pulse Maximum Power Dissipation
2
1
DUTY CYCLE-DESCENDING ORDER
D = 0.5
0.2
0.1
0.05
0.02
0.01
0.1
P
DM
t
1
t
2
0.01
NOTES:
DUTY FACTOR: D = t /t
SINGLE PULSE
1
2
R
θJA = 125 oC/W
PEAK T = P
J
x Z
x R
+ T
DM
θJA
θJA A
0.001
10-4
10-3
10-2
10-1
t, RECTANGULAR PULSE DURATION (sec)
1
10
100
1000
Figure 14. Junction-to-Ambient Transient Thermal Response Curve
www.fairchildsemi.com
5
©2013 Fairchild Semiconductor Corporation
FDMC612PZ Rev.C3
ON Semiconductor and
are trademarks of Semiconductor Components Industries, LLC dba ON Semiconductor or its subsidiaries in the United States and/or other countries.
ON Semiconductor owns the rights to a number of patents, trademarks, copyrights, trade secrets, and other intellectual property. A listing of ON Semiconductor’s product/patent
coverage may be accessed at www.onsemi.com/site/pdf/Patent−Marking.pdf. ON Semiconductor reserves the right to make changes without further notice to any products herein.
ON Semiconductor makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does ON Semiconductor assume any liability
arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages.
Buyer is responsible for its products and applications using ON Semiconductor products, including compliance with all laws, regulations and safety requirements or standards,
regardless of any support or applications information provided by ON Semiconductor. “Typical” parameters which may be provided in ON Semiconductor data sheets and/or
specifications can and do vary in different applications and actual performance may vary over time. All operating parameters, including “Typicals” must be validated for each customer
application by customer’s technical experts. ON Semiconductor does not convey any license under its patent rights nor the rights of others. ON Semiconductor products are not
designed, intended, or authorized for use as a critical component in life support systems or any FDA Class 3 medical devices or medical devices with a same or similar classification
in a foreign jurisdiction or any devices intended for implantation in the human body. Should Buyer purchase or use ON Semiconductor products for any such unintended or unauthorized
application, Buyer shall indemnify and hold ON Semiconductor and its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and
expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such
claim alleges that ON Semiconductor was negligent regarding the design or manufacture of the part. ON Semiconductor is an Equal Opportunity/Affirmative Action Employer. This
literature is subject to all applicable copyright laws and is not for resale in any manner.
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