FDMC7582 [ONSEMI]
25V N沟道PowerTrench® MOSFET;
| 型号： | FDMC7582 |
| 厂家： | 
ONSEMI |
| 描述： | 25V N沟道PowerTrench® MOSFET 开关 脉冲 光电二极管 晶体管 |
| 文件： | 总9页 (文件大小：405K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
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April 2012
FDMC7582
N-Channel PowerTrench® MOSFET
25 V, 49 A, 5.0 mΩ
Features
General Description
Max rDS(on) = 5.0 mΩ at VGS = 10 V, ID = 16.7 A
Max rDS(on) = 7.5 mΩ at VGS = 4.5 V, ID = 13.6 A
State-of-the-art switching performance
This N-Channel MOSFET has been designed specifically to
improve the overall efficiency and to minimize switch node
ringing of DC/DC converters using either synchronous or
conventional switching PWM controllers. It has been optimized
for low gate charge, low rDS(on), fast switching speed and body
diode reverse recovery performance..
Lower output capacitance, gate resistance, and gate charge
boost efficiency
Application
Shielded gate technology reduces switch node ringing and
increases immunity to EMI and cross conduction
High side switching for high end computing
High power density DC-DC synchronous buck
Low loss load switch
Clip bonding technology further reduces On resistance and
source inductance
RoHS Compliant
Communication & telecon Point of Load
Bottom
Top
Pin 1
S
S
D
S
S
S
S
G
G
D
D
D
D
D
D
D
Power 33
MOSFET Maximum Ratings TA = 25 °C unless otherwise noted
Symbol
VDS
VGS
Parameter
Ratings
Units
Drain to Source Voltage
Gate to Source Voltage
25
V
V
(Note 3)
±20
Drain Current - Continuous (Package limited) Tc=25C
49
- Continuous (Silicon Limited)
- Continuous
Tc=25C
76
ID
A
TA = 25 °C
(Note 1a)
(Note 4)
16.7
- Pulsed
60
EAS
Single Pulse Avalanche Energy
38
52
mJ
W
Power Dissipation
Power Dissipation
TC = 25 °C
TA = 25 °C
PD
(Note 1a)
2.3
TJ, TSTG
Operating and Storage Junction Temperature Range
-55 to +150
°C
Thermal Characteristics
RθJC
RθJA
Thermal Resistance, Junction to Case
Thermal Resistance, Junction to Ambient
2.4
53
°C/W
(Note 1a)
Package Marking and Ordering Information
Device Marking
Device
Package
Reel Size
13 ’’
Tape Width
12 mm
Quantity
FDMC7582
FDMC7582
Power 33
3000 units
©2012 Fairchild Semiconductor Corporation
FDMC7582 Rev.C6
www.fairchildsemi.com
1
Electrical Characteristics TJ = 25 °C unless otherwise noted
Symbol
Parameter
Test Conditions
Min
Typ
Max
Units
Off Characteristics
BVDSS
Drain to Source Breakdown Voltage
ID = 250 μA , VGS = 0 V
25
V
ΔBVDSS
ΔTJ
Breakdown Voltage Temperature
Coefficient
I
D = 250 μA , referenced to 25 °C
19
mV/°C
IDSS
IGSS
Zero Gate Voltage Drain Current
VDS = 20 V, VGS = 0 V
1
μA
Gate to Source Leakage Current, Forward VGS = 20 V, VDS = 0 V
100
nA
On Characteristics
VGS(th)
Gate to Source Threshold Voltage
VGS = VDS, ID = 250 μA
D = 250 μA , referenced to 25 °C
GS = 10 V, ID = 16.7 A
1.2
1.7
-5
2.5
V
ΔVGS(th)
ΔTJ
Gate to Source Threshold Voltage
Temperature Coefficient
I
mV/°C
V
4.0
6.0
5.4
58
5.0
7.5
7.0
rDS(on)
gFS
Static Drain to Source On Resistance
Forward Transconductance
VGS = 4.5 V, ID = 13.6 A
mΩ
VGS = 10 V, ID = 16.7 A,TJ = 125 °C
VDD = 5 V, ID = 16.7 A
S
Dynamic Characteristics
Ciss
Coss
Crss
Rg
Input Capacitance
1348
372
79
1795
495
120
2.9
pF
pF
pF
Ω
VDS = 13 V, VGS = 0 V,
f = 1 MHz
Output Capacitance
Reverse Transfer Capacitance
Gate Resistance
0.1
0.9
Switching Characteristics
td(on)
tr
td(off)
tf
Turn-On Delay Time
Rise Time
8.8
2
18
10
36
10
28
13
ns
ns
VDD = 13 V, ID = 16.7A,
V
GS = 10 V, RGEN = 6 Ω
Turn-Off Delay Time
Fall Time
20
1.6
20
9.5
3.9
2.5
ns
ns
Qg(TOT)
Qg(TOT)
Qgs
Total Gate Charge at 10V
Total Gate Charge at 4.5V
Total Gate Charge
Gate to Drain “Miller” Charge
nC
nC
nC
nC
V
DD = 13 V, ID = 16.7 A
Qgd
Drain-Source Diode Characteristics
V
GS = 0 V, IS = 16.7 A
(Note 2)
(Note 2)
0.8
0.7
22
7
1.3
1.2
39
V
VSD
Source to Drain Diode Forward Voltage
VGS = 0 V, IS = 2 A
trr
Reverse Recovery Time
ns
IF = 16.7 A, di/dt = 100 A/μs
Qrr
Reverse Recovery Charge
14
nC
Notes:
2
1. R
is determined with the device mounted on a 1in pad 2 oz copper pad on a 1.5 x 1.5 in. board of FR-4 material. R
is guaranteed by design while R
is determined by
θCA
θJA
θJC
the user's board design.
b.
125 °C/W when mounted on
a minimum pad of 2 oz copper
a.
53 °C/W when mounted on a
1 in pad of 2 oz copper
2
2. Pulse Test: Pulse Width < 300 μs, Duty cycle < 2.0%.
3. As an N-ch device, the negative Vgs rating is for low duty cycle pulse ocurrence only. No continuous rating is implied.
4. EAS of 38 mJ is based on starting TJ = 25 oC; N-ch: L = 0.3 mH, IAS = 16 A, VDD = 23 V, VGS = 10 V.
©2012 Fairchild Semiconductor Corporation
FDMC7582 Rev.C6
www.fairchildsemi.com
2
Typical Characteristics TJ = 25°C unless otherwise noted
60
10
8
VGS = 10 V
VGS = 5 V
VGS = 3 V
50
VGS = 4 V
VGS = 3.5 V
VGS = 3.5 V
40
6
PULSE DURATION = 80 μs
DUTY CYCLE = 0.5% MAX
30
PULSE DURATION = 80 μs
4
DUTY CYCLE = 0.5% MAX
20
VGS = 4 V
VGS = 3 V
2
10
0
VGS = 5 V
30 40
ID, DRAIN CURRENT (A)
VGS = 10 V
50 60
0
0
1
2
3
0
10
20
VDS, DRAIN TO SOURCE VOLTAGE (V)
Figure 1. On Region Characteristics
Figure2. N o r m a l i z e d O n - R e s i s ta n c e
vs Drain Current and Gate Voltage
1.6
30
ID = 16.7 A
VGS = 10 V
PULSE DURATION = 80 μs
DUTY CYCLE = 0.5% MAX
1.5
1.4
1.3
1.2
1.1
1.0
0.9
0.8
0.7
24
18
12
6
ID = 16.7 A
TJ = 125 o
C
TJ = 25 o
C
0
-75 -50 -25
0
25 50 75 100 125 150
2
4
6
8
10
TJ, JUNCTION TEMPERATURE (oC)
VGS, GATE TO SOURCE VOLTAGE (V)
Figure4. On-Resistance vs Gate to
Source Voltage
Figure 3. Normalized On Resistance
vs Junction Temperature
60
100
VGS = 0 V
PULSE DURATION = 80 μs
DUTY CYCLE = 0.5% MAX
50
40
30
20
10
0
10
1
VDS = 5 V
TJ = 150 o
C
TJ = 25 oC
TJ = 150 o
C
0.1
TJ = -55 o
C
TJ = 25 o
C
0.01
TJ = -55 o
C
0.001
0
2
4
6
0.0
0.2
0.4
0.6
0.8
1.0
1.2
VGS, GATE TO SOURCE VOLTAGE (V)
VSD, BODY DIODE FORWARD VOLTAGE (V)
Figure 5. Transfer Characteristics
Figure6. Source to Drain Diode
Forward Voltage vs Source Current
©2012 Fairchild Semiconductor Corporation
FDMC7582 Rev.C6
www.fairchildsemi.com
3
Typical Characteristics TJ = 25°C unless otherwise noted
10
3000
1000
ID = 16.7 A
VDD = 10 V
Ciss
8
6
4
2
0
VDD = 13 V
Coss
VDD = 16 V
Crss
f = 1 MHz
VGS = 0 V
100
50
0
5
10
Qg, GATE CHARGE (nC)
15
20
0.1
1
10
30
VDS, DRAIN TO SOURCE VOLTAGE (V)
Figure 7. Gate Charge Characteristics
Figure8. C a p a c i t a n c e v s D r a i n
to Source Voltage
100
80
60
40
20
0
30
R
θJC = 2.4 oC/W
TJ = 25 oC
TJ = 100 oC
10
VGS = 10 V
VGS = 4.5 V
TJ = 125 o
C
Limited by Package
50
1
0.001
0.01
0.1
1
10
100
25
75
100
125
150
TC, CASE TEMPERATURE (oC)
tAV, TIME IN AVALANCHE (ms)
Figure9. U n c l a m p e d I n d u c t i v e
Switching Capability
Figure10. Maximum Continuous Drain
Current vs Case Temperature
100
10
1000
VGS = 10 V
100 μs
100
10
1 ms
THIS AREA IS
LIMITED BY rDS(on)
1
10 ms
100 ms
SINGLE PULSE
TJ = MAX RATED
RθJA = 125 oC/W
1 s
10 s
0.1
SINGLE PULSE
RθJA = 125 oC/W
TA = 25 oC
DC
T
A = 25 oC
1
0.01
0.5
0.01
0.1
1
10
100200
10-4
10-3
10-2
t, PULSE WIDTH (sec)
10-1
1
10
100 1000
VDS, DRAIN to SOURCE VOLTAGE (V)
Figure 11. Forward Bias Safe
Operating Area
Figure12. Single Pulse Maximum
Power Dissipation
©2012 Fairchild Semiconductor Corporation
FDMC7582 Rev.C6
www.fairchildsemi.com
4
Typical Characteristics TJ = 25°C unless otherwise noted
2
DUTY CYCLE-DESCENDING ORDER
1
D = 0.5
0.2
0.1
0.1
P
DM
0.05
0.02
0.01
t
1
t
2
0.01
SINGLE PULSE
NOTES:
DUTY FACTOR: D = t /t
θJA = 125 oC/W
1
2
R
PEAK T = P
J
x Z
x R
+ T
DM
θJA
θJA A
0.001
10-4
10-3
10-2
10-1
t, RECTANGULAR PULSE DURATION (sec)
1
10
100
1000
Figure 13. Junction-to-Ambient Transient Thermal Response Curve
©2012 Fairchild Semiconductor Corporation
FDMC7582 Rev.C6
www.fairchildsemi.com
5
Dimensional Outline and Pad Layout
©2012 Fairchild Semiconductor Corporation
FDMC7582 Rev.C6
www.fairchildsemi.com
6
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Rev. I61
www.fairchildsemi.com
©2012 Fairchild Semiconductor Corporation
FDMC7582 Rev.C6
7
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相关型号：
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Power Field-Effect Transistor, 14.8A I(D), 30V, 0.006ohm, 1-Element, N-Channel, Silicon, Metal-oxide Semiconductor FET, 3.30 X 3.30 MM, ROHS COMPLIANT, MLP, 8 PIN
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