FDMC86520L [ONSEMI]
60V N 沟道 PowerTrench® MOSFET;![FDMC86520L](http://pdffile.icpdf.com/pdf2/p00369/img/icpdf/FDMC86520L_2252451_icpdf.jpg)
型号: | FDMC86520L |
厂家: | ![]() |
描述: | 60V N 沟道 PowerTrench® MOSFET |
文件: | 总7页 (文件大小:225K) |
中文: | 中文翻译 | 下载: | 下载PDF数据表文档文件 |
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DATA SHEET
www.onsemi.com
MOSFET – N-Channel,
POWERTRENCH)
60 V, 22 A, 7.9 mW
V
r
MAX
I MAX
D
DS
DS(on)
60 V
7.9 mW @ 10 V
22 A
11.7 mW @ 4.5 V
FDMC86520L
Pin 1
G
General Description
S
S
S
This N−Channel MOSFET has been designed specifically to
improve the overall efficiency and to minimize switch node ringing
of DC/DC converters using either synchronous or conventional
switching PWM controllers. It has been optimized for low gate charge,
D
D
D
D
low r
performance.
, fast switching speed and body diode reverse recovery
DS(on)
Bottom
Top
WDFN8 3.3x3.3, 0.65P
CASE 511DH
Features
• Max r
= 7.9 mW at V = 10 V, I = 13.5 A
GS D
DS(on)
• Max r
= 11.7 mW at V = 4.5 V, I = 11.5 A
GS D
DS(on)
MARKING DIAGRAM
• Low Profile − 1 mm Max in Power 33
• 100% UIL Tested
• This Device is Pb−Free, Halide Free and RoHS Compliant
&Z&2&K
FDMC
86520L
Applications
• Primary Switch in Isolated DC−DC
• Synchronous Rectifier
• Load Switch
&Z
&2
= Assembly Plant Code
= 2−Digit Date Code
(Year and Week)
&K
= 2−Digit Lot Run Code
MOSFET MAXIMUM RATINGS (T = 25°C unless otherwise noted)
A
FDMC86520L = Specific Device Code
Symbol
Parameter
Drain to Source Voltage
Gate to Source Voltage
Drain Current Continuous
Rating
60
Unit
V
V
DS
V
GS
PIN ASSIGNMENT
20
V
I
D
T
C
= 25°C
22
A
D
D
5
6
4
3
G
S
Continuous T = 25°C
13.5
A
(Note 1a)
Pulsed
60
D
D
7
8
2
1
S
S
E
Single Pulse Avalanche Energy (Note 3)
79
40
mJ
W
AS
P
Power Dissipation
T = 25°C
C
D
Power Dissipation (Note 1a) T = 25°C
2.3
A
T , T
Operating and Storage Junction
Temperature Range
−55 to + 150
°C
P−Channel MOSFET
J
STG
Stresses exceeding those listed in the Maximum Ratings table may damage the
device. If any of these limits are exceeded, device functionality should not be
assumed, damage may occur and reliability may be affected.
ORDERING INFORMATION
See detailed ordering and shipping information on page 5 of
this data sheet.
THERMAL CHARACTERISTICS
Symbol
RqJC
Parameter
Rating
3.1
Unit
Thermal Resistance, Junction to Case
°C/W
RqJA
Thermal Resistance,
Junction to Ambient (Note 1a)
53
© Semiconductor Components Industries, LLC, 2011
1
Publication Order Number:
April, 2023 − Rev. 4
FDMC86520L/D
FDMC86520L
ELECTRICAL CHARACTERISTICS (T = 25°C unless otherwise noted)
J
Symbol
Parameter
Test Conditions
Min
Typ
Max
Unit
OFF CHARACTERISTICS
BV
Drain to Source Breakdown Voltage
I
I
= 250 mA, V = 0 V
60
−
−
−
V
DSS
D
GS
Breakdown Voltage Temperature
Coefficient
= 250 mA, referenced to 25°C
−
29
mV/°C
DBVDSS
DTJ
D
I
Zero Gate Voltage Drain Current
Gate to Source Leakage Current
V
V
= 48 V, V = 0 V
−
−
−
−
1
mA
DSS
GSS
DS
GS
I
=
20 V, V = 0 V
100
nA
GS
DS
ON CHARACTERISTICS
V
Gate to Source Threshold Voltage
V
I
= V , I = 250 mA
1
1.7
3
V
GS(th)
GS
DS
D
Gate to Source Threshold Voltage
Temperature Coefficient
= 250 mA, referenced to 25°C
−
−7
−
mV/°C
DVGS(th)
DTJ
D
r
Static Drain to Source On Resistance
Forward Transconductance
V
GS
V
GS
V
GS
V
DS
= 10 V, I = 13.5 A
−
−
−
−
6.5
9.1
9
7.9
11.7
11
mW
DS(on)
D
= 4.5 V, I = 11.5 A
D
= 10 V, I = 13.5 A, T = 125°C
D
J
g
FS
= 5 V, I = 13.5 A
49
−
S
D
DYNAMIC CHARACTERISTICS
C
Input Capacitance
V
DS
= 30 V, V = 0 V, f = 1 MHz
−
−
−
−
3420
638
25
4550
850
40
pF
pF
pF
W
iss
GS
C
Output Capacitance
Reverse Transfer Capacitance
Gate Resistance
oss
C
rss
R
0.5
−
g
SWITCHING CHARACTERISTICS
t
Turn−On Delay Time
Rise Time
V
= 30 V, I = 13.5 A, V = 10 V,
GEN
−
−
−
−
−
−
−
−
15
5.2
32
30
10
55
10
64
30
−
ns
ns
ns
ns
nC
d(on)
DD
D
GS
R
= 6 W
t
r
t
Turn−Off Delay Time
Fall Time
d(off)
t
f
3.4
45
Q
Total Gate Charge
V
GS
V
GS
V
DD
= 0 V to 10 V, V = 30 V, I = 13.5 A
DD D
g(TOT)
= 0 V to 4.5 V, V = 30 V, I = 13.5 A
21
DD
D
Q
Q
Total Gate Charge
= 30 V, I = 13.5 A
9.6
4.9
nC
nC
gs
D
Gate to Drain “Miller” Charge
−
gd
DRAIN−SOURCE DIODE CHARACTERISTICS
V
Source to Drain Diode Forward
Voltage
V
V
= 0 V, I = 13.5 A (Note 2)
−
−
−
−
0.82
0.71
38
1.3
1.2
62
V
SD
GS
S
= 0 V, I = 2 A (Note 2)
GS
S
t
Reverse Recovery Time
I = 13.5 A, di/dt = 100 A/ms
F
ns
rr
Q
Reverse Recovery Charge
21
34
nC
rr
Product parametric performance is indicated in the Electrical Characteristics for the listed test conditions, unless otherwise noted. Product
performance may not be indicated by the Electrical Characteristics if operated under different conditions.
2
1. R
is determined with the device mounted on a 1 in pad 2 oz copper pad on a 1.5 x 1.5 in. board of FR−4 material. R
is guaranteed
JC
q
q
JA
by design while R
is determined by the user’s board design.
q
CA
a. 53°C/W when mounted on
b. 125°C/W when mounted on
a minimum pad of 2 oz copper
2
a 1 in pad of 2 oz copper
2. Pulse Test: Pulse Width < 300 ms, Duty cycle < 2.0%.
3. Starting T = 25°C; N−ch: L = 0.3 mH, I = 23 A, V = 54 V, V = 10 V.
J
AS
DD
GS
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2
FDMC86520L
TYPICAL CHARACTERISTICS (T = 25°C unless otherwise noted)
J
60
4
Pulse Duration = 80 ms
Duty Cycle = 0.5% Max
V
GS
V
GS
= 10 V
= 4.5 V
50
40
30
20
10
0
V
= 3.5 V
GS
3
2
1
V
= 3 V
GS
V
= 3.5 V
V
GS
V
= 4 V
GS
= 4 V
GS
V
= 3 V
GS
V
= 4.5 V
GS
V
= 10 V
GS
Pulse Duration = 80 ms
Duty Cycle = 0.5% Max
0
0
10
20
30
40
50
60
10
1.2
0.5
1.0
1.5
2.0
2.5
0
I , Drain Current (A)
V
DS
, Drain to Source Voltage (V)
D
Figure 1. On Region Characteristics
Figure 2. Normalized On−Resistance
vs. Drain Current and Gate Voltage
1.8
1.6
1.4
1.2
1.0
40
30
20
Pulse Duration = 80 ms
Duty Cycle = 0.5% Max
I
V
= 13.5 A
= 10 V
D
I
= 13.5 A
D
GS
T = 125°C
J
10
0
0.8
0.6
T = 25°C
J
−75 −50 −25
0
25
50
75 100 125 150
2
4
6
8
V
GS
, Gate to Source Voltage (V)
T , Junction Temperature (5C)
J
Figure 3. Normalized On Resistance
vs. Junction Temperature
Figure 4. On−Resistance vs. Gate to Source
Voltage
100
10
60
50
40
30
20
10
0
V
= 0 V
Pulse Duration = 80 ms
Duty Cycle = 0.5% Max
GS
V
= 5 V
DS
T = 150°C
J
T = 150°C
J
1
T = 25°C
J
T = 25°C
J
0.1
T = −55°C
T = −55°C
J
J
0.01
0.001
2.5
, Gate to Source Voltage (V)
0.0
0.2
0.4
0.6
0.8
1.0
1.5
2.0
3.0
3.5
4.0
V
V
, Body Diode Forward Voltage (V)
GS
SD
Figure 5. Transfer Characteristics
Figure 6. Source to Drain Diode
Forward Voltage vs. Source Current
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3
FDMC86520L
TYPICAL CHARACTERISTICS (T = 25°C unless otherwise noted) (continued)
J
10
8
10000
I
D
= 13.5 A
V
= 20 V
DD
C
iss
1000
100
10
V
= 30 V
DD
C
6
oss
V
= 40 V
DD
4
2
0
C
rss
f = 1 MHz
= 0 V
V
GS
1
0
20
Q , Gate Charge (nC)
0.1
1
10
60
10
30
40
50
V
, Drain to Source Voltage (V)
DS
g
Figure 7. Gate Charge Characteristics
Figure 8. Capacitance vs. Drain to Source Voltage
60
50
10
50
40
30
20
10
0
V
GS
= 10 V
T = 25°C
J
V
GS
= 4.5 V
T = 100°C
J
Limited by package
50
T = 125°C
J
R
= 3.1°C/W
q
JC
1
0.01
0.1
10
100
25
75
100
125
150
1
t
, Time in Avalanche (ms)
AV
T , Case Temperature (5C)
C
Figure 9. Unclamped Inductive Switching
Capability
Figure 10. Maximum Continuous Drain Current
vs Case Temperature
2000
1000
100
10
Single pulse
R
= 125°C/W
q
JA
100 ms
T = 25°C
A
100
10
1 ms
1
10 ms
100 ms
1 s
This Area is
Limited by r
DS(on)
Single Pulse
T = Max Rated
0.1
0.01
J
q
R
= 125°C/W
JA
10 s
DC
1
T = 25°C
A
0.5
−4
−3
−2
−1
0.01
0.1
1
10
100 300
10
10
10
10
1
10
100 1000
t, Pulse Width (s)
V
DS
, Drain to Source Voltage (V)
Figure 11. Forward Bias Safe Operating Area
Figure 12. Single Pulse Maximum
Power Dissipation
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4
FDMC86520L
TYPICAL CHARACTERISTICS (T = 25°C unless otherwise noted) (continued)
J
2
1
Duty Cycle − Descending Order
D = 0.5
0.2
0.1
P
DM
0.1
0.05
t
1
0.02
0.01
t
2
Notes:
Duty Factor: D = t /t
0.01
1
2
Peak T = P
× Z
× R
+ T
JA A
Single pulse
= 125°C/W
q
q
J
DM
JA
R
q
JA
0.001
0.0005
−4
−3
−2
−1
10
10
10
10
1
10
100
1000
t, Rectangular Pulse Duration (s)
Figure 13. Junction−to−Ambient Transient Thermal Response Curve
ORDERING INFORMATION
†
Device
Device Marking
FDMC86520L
Package Type
Reel Size
Tape Width
12 mm
Shipping
FDMC86520L
WDFN8 3.3x3.3, 0.65P
Power 33
(Pb−Free, Halide Free)
13”
3000 / Tape & Reel
†For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging
Specifications Brochure, .BRD8011/D.
POWERTRENCH is registered trademark of Semiconductor Components Industries, LLC (SCILLC) or its subsidiaries in the United States and/or other
countries.
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5
MECHANICAL CASE OUTLINE
PACKAGE DIMENSIONS
WDFN8 3.3x3.3, 0.65P
CASE 511DH
ISSUE O
DATE 31 JUL 2016
(3.40)
2.37
0.05 C
B
3.30
A
8
5
2X
0.45(4X)
(0.40)
2.15
3.30
(1.70)
KEEP OUT
AREA
(0.65)
0.70(4X)
0.05 C
PIN#1 IDENT
1
4
TOP VIEW
0.65
0.42(8X)
2X
1.95
RECOMMENDED LAND PATTERN
0.75 0.05
0.10 C
0.15 0.05
0.08 C
0.025 0.025
NOTES:
C
SIDE VIEW
SEATING
PLANE
A. DOES NOT CONFORM TO JEDEC
REGISTRATION MO−229
B. DIMENSIONS ARE IN MILLIMETERS.
3.30 0.05
2.27 0.05
C. DIMENSIONS AND TOLERANCES PER
ASME Y14.5M, 2009.
(0.50)4X
(0.35)
PIN #1 IDENT
0.50 0.05 (4X)
(0.79)
D. LAND PATTERN RECOMMENDATION IS
EXISTING INDUSTRY LAND PATTERN.
1
4
(1.15)
3.30 0.05
2.00 0.05
R0.15
0.30 0.05 (3X)
8
5
0.35 0.05 (8X)
0.65
0.10
0.05
C A B
C
1.95
BOTTOM VIEW
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Printed versions are uncontrolled except when stamped “CONTROLLED COPY” in red.
DOCUMENT NUMBER:
DESCRIPTION:
98AON13625G
WDFN8 3.3X3.3, 0.65P
PAGE 1 OF 1
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