FDMS6681Z [ONSEMI]
P 沟道,PowerTrench® MOSFET,-30V,-122A,3.2mΩ;型号: | FDMS6681Z |
厂家: | ONSEMI |
描述: | P 沟道,PowerTrench® MOSFET,-30V,-122A,3.2mΩ 开关 光电二极管 晶体管 |
文件: | 总7页 (文件大小:502K) |
中文: | 中文翻译 | 下载: | 下载PDF数据表文档文件 |
FDMS6681Z
MOSFETꢀ– POWERTRENCH),
P-Channel
-30 V, -122 A, 3.2 mW
General Description
www.onsemi.com
The FDMS6681Z has been designed to minimize losses in load
switch applications. Advancements in both silicon and package
technologies have been combined to offer the lowest r
protection.
and ESD
DS(on)
5
4
G
S
S
S
D
D
D
D
Features
6
7
8
3
2
1
• Max r
• Max r
= 3.2 mW at V = −10 V, I = −21.1 A
GS D
DS(on)
= 5.0 mW at V = −4.5 V, I = −15.7 A
DS(on)
GS
D
• Advanced Package and Silicon Combination for Low r
• HBM ESD Protection Level of 8 kV Typical (Note 3)
• MSL1 Robust Package Design
DS(on)
• RoHS Compliant
Pin 1
G
S
Applications
S
S
• Load Switch in Notebook and Server
• Notebook Battery Pack Power Management
D
D
D
D
MOSFET MAXIMUM RATINGS (T = 25°C unless otherwise noted)
A
Top
Bottom
Symbol
Parameter
Drain to Source Voltage
Gate to Source Voltage
Drain Current − Continuous T = 25°C (Note 5)
Ratings Unit
Power 56 (PQFN8)
CASE 483AE
V
DS
V
GS
−30
25
V
V
A
I
D
−122
−77
C
MARKING DIAGRAM
− Continuous T = 100°C
C
(Note 5)
$Y&Z&3&K
FDMS
6681Z
− Continuous T = 25°C
−21.1
A
(Note 1a)
− Pulsed (Note 4)
−600
73
P
D
Power dissipation T = 25°C
W
C
Power dissipation T = 25°C (Note 1a)
2.5
A
$Y
&Z
&3
&K
= ON Semiconductor Logo
= Assembly Plant Code
= Numeric Date Code
= Lot Code
T
STG
Operating and Storage Junction Temperature
Range
−55 to
+150
°C
J,
T
Stresses exceeding those listed in the Maximum Ratings table may damage the
device. If any of these limits are exceeded, device functionality should not be
assumed, damage may occur and reliability may be affected.
FDMS6681Z
= Specific Device Code
ORDERING INFORMATION
See detailed ordering and shipping information on page 2
of this data sheet.
THERMAL CHARACTERISTICS
Symbol
Parameter
Ratings Unit
Thermal Resistance, Junction to Case
1.7
50
°C/W
R
q
JC
R
Thermal Resistance, Junction to Ambient
(Note 1a)
q
JA
© Semiconductor Components Industries, LLC, 2009
1
Publication Order Number:
May, 2019 − Rev. 3
FDMS6681Z/D
FDMS6681Z
PACKAGE MARKING AND ORDERING INFORMATION
{
Device Marking
Device
Package
Shipping
3000 Units/Tape & Reel
FDMS6681Z
FDMS6681Z
Power 56
†For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging
Specifications Brochure, BRD8011/D.
ELECTRICAL CHARACTERISTICS (T = 25°C unless otherwise noted)
J
Symbol
Parameter
Test Conditions
Min
Typ
Max
Unit
OFF CHARACTERISTICS
BV
Drain to Source Breakdown Voltage
I
I
= −250 mA, V = 0 V
−30
V
DSS
D
GS
Breakdown Voltage Temperature
Coefficient
= −250 mA, referenced to 25°C
20
mV/°C
DBVDSS
DTJ
D
I
Zero Gate Voltage Drain Current
Gate to Source Leakage Current
V
V
= −24 V, V = 0 V
−1
mA
mA
DSS
DS
GS
I
=
25 V, V = 0 V
10
GSS
GS
DS
ON CHARACTERISTICS
V
Gate to Source Threshold Voltage
V
I
= V , I = −250 mA
−1
−1.7
−7
−3
V
GS(th)
GS
DS
D
Gate to Source Threshold Voltage
Temperature Coefficient
= −250 mA, referenced to 25°C
mV/°C
DVGS(th)
DTJ
D
r
Static Drain to Source On Resistance
V
V
V
= −10 V, I = −22.1 A
2.7
4.0
3.9
3.2
5.0
5.0
mW
DS(on)
GS
GS
GS
D
= −4.5 V, I = −15.7 A
D
= −10 V, I = −22.1 A,
D
T = 125°C
J
g
Forward Transconductance
V
= −10 V, I = −22.1 A
143
S
FS
DD
DS
D
DYNAMIC CHARACTERISTICS
C
Input Capacitance
V
= −15 V, V = 0 V, f = 1MHz
7803
1540
1345
10380
2050
2020
pF
iss
GS
C
Output Capacitance
oss
C
Reverse Transfer Capacitance
rss
SWITCHING CHARACTERISTICS
V
DD
V
GS
= −15 V, I = −22.1 A,
ns
t
Turn*On Delay Time
Rise Time
15
38
24
61
D
d(on)
= −10 V, R
= 6 W
GEN
t
r
t
Turn*Off Delay Time
Fall Time
260
197
172
97
416
316
241
136
d(off)
t
f
V
V
= 0 V to −10 V
= 0 V to −5 V
Q
Q
Total Gate Charge
Total Gate Charge
Gate to Source Charge
Gate to Drain “Miller” Charge
nC
GS
g
g
GS
V
D
= −15 V,
DD
Q
22
gs
gd
i
= −22.1 A
Q
46
DRAIN−SOURCE DIODE CHARACTERISTICS
V
Source to Drain Diode Forward Voltage
V
V
= 0 V, I = −2.1 A (Note 2)
0.68
0.79
44
1.2
1.25
71
V
SD
GS
S
= 0 V, I = −22.1 A (Note 2)
GS
S
t
Reverse Recovery Time
I = −22.1 A, di/dt = 100 A/ms
F
ns
rr
Q
Reverse Recovery Charge
39
63
nC
rr
Product parametric performance is indicated in the Electrical Characteristics for the listed test conditions, unless otherwise noted. Product
performance may not be indicated by the Electrical Characteristics if operated under different conditions.
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2
FDMS6681Z
NOTES:
1. R
2
is determined with the device mounted on a 1 in pad 2 oz copper pad on a 1.5 × 1.5 in. board of FR−4 material. R
is guaranteed
q
q
JC
JA
by design while R
is determined by the user’s board design.
q
CA
a) 50°C/W when mounted on
b) 125°C/W when mounted on
a minimum pad of 2 oz copper.
2
a 1 in pad of 2 oz copper.
2. Pulse Test: Pulse Width < 300 ms, Duty cycle < 2.0%.
3. The diode connected between the gate and source serves only as protection against ESD. No gate overvoltage rating is implied.
4. Pulsed I please refer to Figure 12 SOA graph for more details.
D
5. Computed continuous current limited to Max Junction Temperature only, actual continuous current will be limited by thermal
electro−mechanical application board design.
TYPICAL CHARACTERISTICS T = 25°C unless otherwise noted
J
5
90
PULSE DURATION = 80 ms
DUTY CYCLE = 0.5% MAX
V
= −3.5 V
V
= −3 V
GS
GS
75
60
45
30
15
0
4
3
V
= −4 V
GS
V
= −3.5 V
= −4.5 V
GS
V
= −4.5 V
GS
V
= −10 V
GS
V
GS
V
= −4 V
GS
2
1
0
V
= −3 V
GS
V
= −10 V
GS
PULSE DURATION = 80 ms
DUTY CYCLE = 0.5% MAX
0
1
2
3
0
15
30
45
60
75
90
−V , Drain to Source Voltage [V]
DS
−I , Drain Current [A]
D
Figure 2. Normalized On−Resistance
Figure 1. On Region Characteristics
vs. Drain Current and Gate Voltage
1.6
12
9
I
V
= −22.1 A
D
PULSE DURATION = 80 ms
DUTY CYCLE = 0.5% MAX
= −10 V
GS
1.4
1.2
I
D
= −22.1 A
6
T
T
= 125°C
= 25°C
J
1.0
3
0
0.8
0.6
J
−75 −50 −25
0
25 50
75 100 125 150
2
4
6
8
10
T , Junction Temperature [5C]
J
−V , Gate to Source Voltage [V]
GS
Figure 3. Normalized On Resistance
vs. Junction Temperature
Figure 4. On−Resistance vs. Gate
to Source Voltage
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3
FDMS6681Z
TYPICAL CHARACTERISTICS T = 25°C unless otherwise noted (continued)
J
100
90
75
60
45
30
PULSE DURATION = 80 ms
DUTY CYCLE = 0.5% MAX
V
= 0 V
GS
10
1
V
= −5 V
DS
T
= 150°C
J
T
= 150°C
J
T
= 25°C
J
0.1
0.01
T
= 25°C
J
15
0
T
= −55°C
T = −55°C
J
J
0.001
0
1
2
3
4
0
0.2
0.4
0.6
0.8
1.0
1.2
−V , Gate to Source Voltage [V]
GS
−V , Body Diode Forward Voltage [V]
SD
Figure 5. Transfer Characteristics
Figure 6. Source to Drain Diode Forward
Voltage vs. Source Current
20000
10000
10
8
I
D
= −22.1 A
V
= −10 V
DD
C
iss
6
4
V
= −15 V
DD
C
C
V
= −20 V
oss
rss
DD
f = 1 MHz
= 0 V
2
0
V
GS
1000
600
0
50
100
150
200
0.1
1
10
30
Q , Gate Charge [nC]
g
−V , Drain to Source Voltage [V]
DS
Figure 8. Capacitance vs. Drain
to Source Voltage
Figure 7. Gate Charge Characteristics
100
50
140
120
100
80
V
V
= −10 V
= −4.5 V
T
= 25°C
GS
GS
J
T
= 100°C
J
60
40
T
= 125°C
J
20
0
R
= 1.7°C/W
q
JC
1
0.001
0.01
0.1
1
10
100
25
50
75
100
125
150
t
, Time in Avalanche [ms]
AV
T , Case Temperature [5C]
C
Figure 9. Unclamped Inductive
Switching Capability
Figure 10. Maximum Continuous Drain
Current vs. Case Temperature
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4
FDMS6681Z
TYPICAL CHARACTERISTICS T = 25°C unless otherwise noted (continued)
J
−4
−5
−6
10
10
10
10
10
10
1000
V
= 0 V
10 us
GS
100
100 us
1 ms
T
= 150°C
J
THIS AREA IS
10
LIMITED BY r
DS(on)
−7
−8
−9
10 ms
DC
T
= 25°C
J
1
SINGLE PULSE
T
= MAX RATED
J
CURVE BENT TO
MEASURE DATA
R
= 1.7°C/W
q
JC
T
= 25°C
C
0.1
0
5
10
15
20
25
30
0.1
1
10
80
V
GS
, Gate to Source Voltage [V]
−V , Drain to Source Voltage [V]
DS
Figure 11. Igss vs. Vgss
Figure 12. Forward Bias Safe Operating Area
100000
SINGLE PULSE
R
= 1.7°C/W
q
JC
T
= 25°C
C
10000
1000
100
10
−5
−4
−3
−2
−1
10
10
10
10
10
1
t, Pulse Width [s]
Figure 13. Single Pulse Maximum Power Dissipation
2
DUTY CYCLE−DESCENDING ORDER
1
D = 0.5
0.2
0.1
P
DM
0.1
0.05
0.02
0.01
t
1
t
2
0.01
NOTES:
Z
q
(t) = r(t) × R
= 1.7°C/W
q
JC
JC
SINGLE PULSE
R
q
JC
PEAK T = P
× Z
q
(t) + T
JC C
J
DM
Duty cycle, D = t /t
1
2
0.001
−5
−4
−3
−2
−1
10
10
10
10
10
1
t, Pulse Width [s]
Figure 14. Transient Thermal Response Curve
POWERTRENCH is registered trademarks of Semiconductor Components Industries, LLC (SCILLC) or its subsidiaries in
the United States and/or other countries.
www.onsemi.com
5
MECHANICAL CASE OUTLINE
PACKAGE DIMENSIONS
PQFN8 5X6, 1.27P
CASE 483AE
ISSUE C
DATE 21 JAN 2022
Electronic versions are uncontrolled except when accessed directly from the Document Repository.
Printed versions are uncontrolled except when stamped “CONTROLLED COPY” in red.
DOCUMENT NUMBER:
DESCRIPTION:
98AON13655G
PQFN8 5X6, 1.27P
PAGE 1 OF 1
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