FDMS86381-F085 [ONSEMI]
N-Channel PowerTrench® MOSFET 80V, 30A, 22mΩ;
| 型号： | FDMS86381-F085 |
| 厂家： | 
ONSEMI |
| 描述： | N-Channel PowerTrench® MOSFET 80V, 30A, 22mΩ 开关 光电二极管 晶体管 |
| 文件： | 总7页 (文件大小：515K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
DATA SHEET
www.onsemi.com
MOSFET – N-Channel,
POWERTRENCH)
V
R
MAX
I MAX
D
(BR)DSS
DS(ON)
80 V
22 mW @ 10 V
30 A
80 V, 30 A, 22 mW
ELECTRICAL CONNECTION
FDMS86381-F085
Features
• Typ R
• Typ Q
= 17.2 mW at V = 10 V; I = 30 A
GS D
DS(on)
= 14 nC at V = 10 V; I = 30 A
g(tot)
GS
D
• UIS Capability
N−Channel MOSFET
• AEC−Q101 Qualified and PPAP Capable
• This Device is Pb−Free, Halogen Free/BFR Free and is RoHS
Compliant
Top
Bottom
D
D
D
D
Applications
G
• Automotive Engine Control
• PowerTrain Management
• Solenoid and Motor Drivers
• Electronic Steering
• Integrated Starter/Alternator
• Distributed Power Architectures and VRM
• Primary Switch for 12 V Systems
S
S
S
DFNW8
CASE 507AU
MARKING DIAGRAM
MOSFET MAXIMUM RATINGS (T = 25°C unless otherwise noted)
J
Parameter
Drain−to−Source Voltage
Symbol
Value
80
Unit
V
ON
AYWWWL
FDMS
86381
V
DSS
Gate−to−Source Voltage
V
GS
20
V
Continuous Drain Current
GS
T
T
= 25°C
= 25°C
I
D
30
A
C
(V = 10 V) (Note 1)
A
Y
= Assembly Location
= Year
Pulsed Drain Current
See
Figure 4
C
WW
WL
= Work Week
= Assembly Lot
Single Pulse Avalanche Energy (Note 2)
Power Dissipation
E
11.5
50
mJ
W
AS
FDMS86381 = Specific Device Code
P
D
Derate above 25°C
0.33
W/°C
°C
Operating and Storage Temperature
T , T
−55 to
+175
ORDERING INFORMATION
J
STG
†
Device
FDMS86381−F085
Package
Shipping
Thermal Resistance (Junction−to−Case)
R
3
°C/W
°C/W
q
JC
JA
DFNW8
(Power 56)
(Pb−Free)
3000 /
Maximum Thermal Resistance
(Junction−to−Ambient) (Note 3)
R
50
q
Tape & Reel
Stresses exceeding those listed in the Maximum Ratings table may damage the
device. If any of these limits are exceeded, device functionality should not be
assumed, damage may occur and reliability may be affected.
1. Current is limited by bondwire configuration.
†For information on tape and reel specifications,
including part orientation and tape sizes, please
refer to our Tape and Reel Packaging Specification
Brochure, BRD8011/D.
2. Starting Tj = 25°C, L = 40 mH, I = 24 A, V = 80 V during inductor charging
AS
DD
and V = 0 V during time in avalanche.
DD
3. R
is the sum of the junction−to−case and case−to−ambient thermal
q
JA
resistance where the case thermal reference is defined as the solder
mounting surface of the drain pins. R
is guaranteed by design while R
q
JA
q
JC
is determined by the user’s board design. The maximum rating presented
2
here is based on mounting on a 1 in pad of 2 oz copper.
© Semiconductor Components Industries, LLC, 2016
1
Publication Order Number:
October, 2021 − Rev. 3
FDMS86381−F085/D
FDMS86381−F085
ELECTRICAL CHARACTERISTICS (T = 25°C unless otherwise specified)
J
Symbol
Parameter
Conditions
Min
Typ
Max
Unit
OFF CHARACTERISTICS
B
Drain−to−Source Breakdown Voltage
Drain−to−Source Leakage Current
I
= 250 mA, V = 0 V
80
−
−
−
−
−
−
1
V
VDSS
D
GS
I
V
V
= 80 V,
= 0 V
T = 25°C
J
mA
mA
nA
DSS
DS
GS
T = 175°C (Note 4)
−
1
J
I
Gate−to−Source Leakage Current
V
=
20 V
−
100
GSS
GS
ON CHARACTERISTICS
V
Gate−to−Source Threshold Voltage
Drain−to−Source On−Resistance
V
= V , I = 250 mA
2.0
−
2.9
4.0
V
GS(th)
DS(on)
GS
GS
DS
D
R
I
D
= 30 A
= 10 V
T = 25°C
J
17.2
37.7
22.0
48.2
mW
V
T = 175°C (Note 4)
−
J
DYNAMIC CHARACTERISTICS
C
Input Capacitance
V
= 40 V, V = 0 V, f = 1 MHz
−
−
−
−
−
−
−
−
866
176
7
−
−
pF
iss
DS
GS
C
Output Capacitance
oss
C
Reverse Transfer Capacitance
Gate Resistance
−
rss
R
f = 1 MHz
2.3
14
−
W
g
Q
Total Gate Charge
V
= 0 to 10 V
= 0 to 2 V
V = 40 V,
DD
21
−
nC
g(tot)
GS
GS
I
D
= 30 A
Q
Threshold Gate Charge
Gate−to−Source Gate Charge
Gate−to−Drain “Miller” Charge
V
1.7
5.1
3.8
g(th)
Q
−
gs
Q
−
gd
SWITCHING CHARACTERISTICS
t
Turn−On Time
Turn−On Delay
Rise Time
V
DD
V
GS
= 40 V, I = 30 A,
−
−
−
−
−
−
−
9
23
−
ns
on
D
= 10 V, R
= 6 W
GEN
t
d(on)
t
r
6
−
t
Turn−Off Delay
Fall Time
14
5
−
d(off)
t
f
−
t
Turn−Off Time
−
28
off
DRAIN−SOURCE DIODE CHARACTERISTICS
V
Source−to−Drain Diode Voltage
I
I
= 30 A, V = 0 V
−
−
−
−
−
−
1.25
1.2
50
V
SD
SD
GS
= 15 A, V = 0 V
SD
GS
t
Reverse Recovery Time
I = 30 A, dI /dt = 100 A/ms, V = 64 V
F
34
27
ns
rr
SD
DD
Q
Reverse Recovery Charge
40
nC
rr
Product parametric performance is indicated in the Electrical Characteristics for the listed test conditions, unless otherwise noted. Product
performance may not be indicated by the Electrical Characteristics if operated under different conditions.
4. The maximum value is specified by design at T = 175°C. Product is not tested to this condition in production
J
POWERTRENCH is a registered trademark of Semiconductor Components Industries, LLC dba “onsemi” or its affiliates and/or subsidiaries in the United
States and/or other countries.
www.onsemi.com
2
FDMS86381−F085
TYPICAL CHARACTERISTICS
1.2
1.0
40
Current Limited
V
GS
= 10 V
35
by Silicon
Current Limited
by Package
30
25
20
15
10
5
0.8
0.6
0.4
0.2
0.0
0
0
25
50
75
100
125
150
175
25
50
75
100
125
150
175
200
T , CASE TEMPERATURE (°C)
C
T , CASE TEMPERATURE (°C)
C
Figure 2. Maximum Continuous Drain Current vs.
Case Temperature
Figure 1. Normalized Power Dissipation vs.
Case Temperature
2
DUTY CYCLE − DESCENDING ORDER
1
P
DM
D = 0.50
0.20
0.10
0.05
0.02
0.01
t
1
0.1
t
2
DUTY CYCLE, D = t /t
1
2
x R
Peak T = P
x Z
+ T
JC C
q
q
J
DM
JC
Single Pulse
0.01
−3
−2
−1
0
1
−5
−4
10
10
10
10
10
10
10
t, RECTANGULAR PULSE DURATION (s)
Figure 3. Normalized Maximum Transient Thermal Impedance
1000
100
10
V
= 10 V
GS
T
= 25°C
C
For temperatures above 25°C
derate peak current as follows:
175 * T
C
Ǹ
I + I
ƪ ƫ
25
150
Single Pulse
−3
−2
−1
0
1
−5
−4
10
10
10
10
10
10
10
t, RECTANGULAR PULSE DURATION (s)
Figure 4. Peak Current Capability
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3
FDMS86381−F085
TYPICAL CHARACTERISTICS (Continued)
1000
100
If R = 0
=(L)(I )/(1.3*Rated BV
t
− V
)
AV
AS
DSS
DD
If R ≠ 0
=(L/R)In[(I *R)/(1.3*Rated BV
100
10
t
AV
− V )+1]
DSS DD
AS
100 ms
10
Starting T = 25°C
J
1
Operation in this area may
be limited by R
DS(on)
1 ms
10 ms
100 ms
Starting T = 150°C
J
0.1
T
= 25°C
C
T = Max Rated
J
Single Pulse
0.01
1
0.001
1
0.1
10
100
500
0.01
0.1
1
10
V
DS
, DRAIN TO SOURCE VOLTAGE (V)
t , TIME IN AVALANCHE (ms)
AV
(Note: Refer to onsemi Applications Notes AN7514 and
AN7515)
Figure 5. Forward Bias Safe Operating Area
Figure 6. Unclamped Inductive Switching Capability
100
80
60
40
20
0
100
Pulse Duration = 250 ms
Duty Cycle = 0.5% Max
V
GS
= 0 V
V
DD
= 5 V
T = 175°C
J
10
1
T = 25°C
J
T = 175°C
J
T = 25°C
J
T = −55°C
J
0.1
3
4
5
6
7
8
9
10
0.0
0.2 0.4
0.6
0.8
1.0
1.2
1.4 1.6
V
SD
, BODY DIODE FORWARD VOLTAGE (V)
V
GS
, GATE TO SOURCE VOLTAGE (V)
Figure 8. Forward Diode Characteristics
Figure 7. Transfer Characteristics
100
80
60
40
20
0
100
250 ms Pulse Width
T = 175°C
J
V
250 ms Pulse Width
T = 25°C
J
V
GS
15 V Top
10 V
8 V
7 V
6 V
5.5 V
5 V Bottom
GS
15 V Top
10 V
8 V
7 V
6 V
80
60
40
20
0
5.5 V
5 V Bottom
0
1
2
3
4
5
0
1
2
3
4
5
V
DS
, DRAIN SOURCE VOLTAGE (V)
V
DS
, DRAIN SOURCE VOLTAGE (V)
Figure 9. Saturation Characteristics
Figure 10. Saturation Characteristics
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4
FDMS86381−F085
TYPICAL CHARACTERISTICS (Continued)
2.5
140
120
100
80
Pulse Duration = 250 ms
Duty Cycle = 0.5% Max
Pulse Duration = 250 ms
Duty Cycle = 0.5% Max
I
D
= 30 A
2.0
1.5
1.0
0.5
60
T = 175°C
J
40
I
D
= 30 A
20
V
GS
= 10 V
T = 25°C
J
0
−80
−40
0
40
80
120
160
200
10
5
6
7
8
9
T , JUNCTION TEMPERATURE (°C)
J
V
GS
, GATE TO SOURCE VOLTAGE (V)
Figure 12. Normalized RDS(on) vs. Junction
Temperature
Figure 11. RDS(on) vs. Gate Voltage
1.10
1.05
1.00
0.95
0.90
1.3
1.1
0.9
0.7
0.5
0.3
V
= V
DS
= 250 mA
GS
I
D
= 5 mA
I
D
−80
0
40
80
120
160 200
−40
−80
0
40
80
120
160
200
−40
T , JUNCTION TEMPERATURE (°C)
J
T , JUNCTION TEMPERATURE (°C)
J
Figure 14. Normalized Drain to Source
Breakdown Voltage vs. Junction Temperature
Figure 13. Normalized Gate Threshold Voltage
vs. Temperature
10
8
10000
1000
I
D
= 30 A
V
DD
= 40 V
V
DD
= 32 V
C
V
DD
= 48 V
iss
6
100
10
1
C
oss
4
2
0
f = 1 MHz
C
rss
V
GS
= 0 V
0.1
1
10
100
12
0
3
6
9
15
Q , GATE CHARGE (nC)
g
V
DS
, DRAIN−TO−SOURCE VOLTAGE (V)
Figure 16. Gate Charge vs. Gate to Source
Voltage
Figure 15. Capacitance vs. Drain to Source
Voltage
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5
MECHANICAL CASE OUTLINE
PACKAGE DIMENSIONS
DFNW8 5.2x6.3, 1.27P
CASE 507AU
ISSUE B
DATE 18 OCT 20
GENERIC
MARKING DIAGRAM*
XXXXXX
XXXXXX
AWLYWW
XXXX = Specific Device Code
A
= Assembly Location
WL = Wafer Lot
= Year
Y
WW = Work Week
*This information is generic. Please refer to
device data sheet for actual part marking.
Pb−Free indicator, “G” or microdot “ G”,
may or may not be present. Some products
may not follow the Generic Marking.
Electronic versions are uncontrolled except when accessed directly from the Document Repository.
Printed versions are uncontrolled except when stamped “CONTROLLED COPY” in red.
DOCUMENT NUMBER:
DESCRIPTION:
98AON98867G
DFNW8 5.2x6.3, 1.27P
PAGE 1 OF 1
onsemi and
are trademarks of Semiconductor Components Industries, LLC dba onsemi or its subsidiaries in the United States and/or other countries. onsemi reserves
the right to make changes without further notice to any products herein. onsemi makes no warranty, representation or guarantee regarding the suitability of its products for any particular
purpose, nor does onsemi assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation
special, consequential or incidental damages. onsemi does not convey any license under its patent rights nor the rights of others.
© Semiconductor Components Industries, LLC, 2018
www.onsemi.com
onsemi,
, and other names, marks, and brands are registered and/or common law trademarks of Semiconductor Components Industries, LLC dba “onsemi” or its affiliates
and/or subsidiaries in the United States and/or other countries. onsemi owns the rights to a number of patents, trademarks, copyrights, trade secrets, and other intellectual property.
A listing of onsemi’s product/patent coverage may be accessed at www.onsemi.com/site/pdf/Patent−Marking.pdf. onsemi reserves the right to make changes at any time to any
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