FDMS86581 [ONSEMI]
Power MOSFET, 60V N Channel 30A, 15mΩ in Power 56 package;型号: | FDMS86581 |
厂家: | ONSEMI |
描述: | Power MOSFET, 60V N Channel 30A, 15mΩ in Power 56 package |
文件: | 总8页 (文件大小:506K) |
中文: | 中文翻译 | 下载: | 下载PDF数据表文档文件 |
FDMS86581
MOSFET, N-Channel,
POWERTRENCH),
60 V, 30 A, 15 mW
Features
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• Typical R
• Typical Q
= 12.5 mW at V = 10 V, I = 30 A
GS D
DS(on)
= 13 nC at V = 10 V, I = 25 A
ELECTRICAL CONNECTION
G(tot)
GS
D
• UIS Capability
• RoHS Compliant
G
S
S
S
D
D
D
D
5
6
7
8
4
3
2
1
Applications
• DC−DC Power Supplies
• AC−DC Power Supplies
• Motor Control
• Load Switching
N-Channel MOSFET
MOSFET MAXIMUM RATINGS (T = 25°C unless otherwise noted)
J
Symbol
Parameter
Drain−to−Source Voltage
Gate−to−Source Voltage
Drain Current − Continuous
Ratings
60
Unit
D
D
D
D
V
V
DSS
G
S
S
S
V
A
V
GS
20
Pin 1
I
D
30
Top
Bottom
(VGS = 10) T = 25°C (Note 1)
C
Power 56
(PQFN8 5x6)
CASE 483AE
See Figure 4
13.5
Pulsed Drain Current, T = 25°C
C
mJ
E
AS
Single Pulse Avalanche Energy
(Note 2)
W
P
D
50
Power Dissipation
MARKING DIAGRAM
W/°C
°C
0.33
Derate Above 25°C
T , T
−55 to +175
Operating and Storage Temperature
Thermal Resistance, Junction to Case
J
STG
$Y&Z&3&K
FDMS
86581
°C/W
°C/W
R
3
q
q
JC
R
50
Maximum Thermal Resistance,
Junction to Ambient (Note 3)
JA
Stresses exceeding those listed in the Maximum Ratings table may damage the
device. If any of these limits are exceeded, device functionality should not be
assumed, damage may occur and reliability may be affected.
1. Current is limited by bondwire configuration.
$Y
&Z
&3
&K
= ON Semiconductor Logo
= Assembly Plant Code
= Numeric Date Code
= Lot Code
2. Starting T = 25°C, L = 40 mH, I = 26 A, V = 60 V during inductor charging
J
AS
DD
and V = 0 V during time in avalanche.
DD
FDMS86581
= Specific Device Code
3. R
is the sum of the junction−to−case and case−to−ambient thermal
q
JA
resistance, where the case thermal reference is defined as the solder
mounting surface of the drain pins. R
is guaranteed by design, while R
q
JA
q
JC
ORDERING INFORMATION
is determined by the board design. The maximum rating presented here is
2
See detailed ordering and shipping information on page 2
of this data sheet.
based on mounting on a 1 in pad of 2 oz copper.
© Semiconductor Components Industries, LLC, 2013
1
Publication Order Number:
July, 2018 − Rev. 0
FDMS86581/D
FDMS86581
PACKAGE MARKING AND ORDERING INFORMATION
†
Device Marking
Device
Package
Shipping
FDMS86581
FDMS86581
Power 56
3000 Units/
Tape & Reel
†For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging
Specifications Brochure, BRD8011/D.
ELECTRICAL CHARACTERISTICS (T = 25°C unless otherwise noted)
J
Symbol
Parameter
Test Conditions
Min
Typ.
Max.
Units
OFF CHARACTERISTICS
B
Drain−to−Source Breakdown Voltage
Drain−to−Source Leakage Current
I
= 250 mA, V = 0 V
GS
60
−
−
−
−
−
−
1
V
A
VDSS
D
I
V
V
= 60 V,
= 0 V
T = 25°C
J
DSS
DS
GS
T = 175°C (Note 4)
J
−
1
mA
nA
I
Gate−to−Source Leakage Current
V
=
20 V
−
100
GSS
GS
ON CHARACTERISTICS
V
R
Gate to Source Threshold Voltage
Drain to Source On Resistance
V
I
= V , I = 250 mA
2.0
−
2.7
4.0
V
GS(th)
GS
DS D
= 30 A,
= 10 V
T = 25°C
J
12.5
25.1
15.0
30.1
mW
mW
DS(on)
D
V
GS
T = 175°C (Note 4)
−
J
DYNAMIC CHARACTERISTICS
C
Input Capacitance
V
= 30 V, V = 0 V, f = 1 MHz
−
−
−
−
−
−
−
−
881
281
15
3.1
13
2
−
−
pF
pF
pF
W
iss
DS
GS
C
Output Capacitance
oss
C
Reverse Transfer Capacitance
Gate Resistance
−
rss
R
f = 1 MHz
−
G
Q
Total Gate Charge
V
GS
V
GS
V
DD
= 0 to 10 V, V = 30 V, I = 25 A
19
−
nC
nC
nC
nC
g(ToT)
DD
D
Q
Threshold Gate Charge
Gate−to−Source Gate Charge
Gate−to−Drain “Miller” Charge
= 0 to 2 V, V = 30 V, I = 25 A
DD D
g(th)
Q
= 30 V, I = 25 A
4
−
gs
gd
D
Q
3
−
SWITCHING CHARACTERISTICS
t
Turn−On Time
Turn−On Delay
Rise Time
V
= 30 V, I = 30 A, V = 10 V,
GEN
−
−
−
−
20
−
ns
ns
ns
ns
DD
D
GS
−
9
5
on
R
= 6 W
t
d(on)
t
r
−
t
Turn−Off Delay
−
15
4
d(off)
t
f
Fall Time
−
−
−
ns
ns
t
Turn−Off Time
−
28
off
DRAIN−SOURCE DIODE CHARACTERISTICS
V
Source−to−Drain Diode Voltage
I
I
= 30 A, V = 0 V
−
−
−
−
−
−
1.25
1.2
55
V
V
SD
SD
GS
= 15 A, V = 0 V
SD
GS
t
Reverse−Recovery Time
I = 30 A, dl /dt = 100 A/ms, V = 48 V
F
37
22
ns
nC
rr
SD
DD
Q
Reverse Recovery Charge
33
rr
Product parametric performance is indicated in the Electrical Characteristics for the listed test conditions, unless otherwise noted. Product
performance may not be indicated by the Electrical Characteristics if operated under different conditions.
4. The maximum value is specified by design at T = 175°C. Product is not tested to this condition in production.
J
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2
FDMS86581
TYPICAL CHARACTERISTICS
1.2
50
40
V
GS
= 10 V
CURRENT LIMITED
BY SILICON
1.0
0.8
0.6
0.4
CURRENT LIMITED
BY PACKAGE
30
20
10
0
0.2
0.0
0
25
50
75
100
125
150
175
200
0
50
75
100
125
150
175
T , CASE TEMPERATURE (5C)
C
T , CASE TEMPERATURE (5C)
C
Figure 1. Normalized Power Dissipation
vs. Case Temperature
Figure 2. Maximum Continuous Drain Current
vs. Case Temperature
2
DUTY CYCLE − DESCENDING ORDER
1
D = 0.50
0.20
0.10
0.05
P
DM
0.02
0.01
0.1
t
1
t
2
NOTES:
DUTY FACTOR: D = t /t
SINGLE PULSE
1
2
PEAK T = P
× Z
q
× R
+ T
JC C
q
J
DM
JC
0.01
−5
−4
−3
−2
−1
0
1
10
10
10
10
10
10
10
t, RECTANGULAR PULSE DURATION (s)
Figure 3. Normalized Maximum Transient Thermal Impedance
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3
FDMS86581
TYPICAL CHARACTERISTICS (continued)
1000
V
GS
= 10 V
T
= 25°C
C
FOR TEMPERATURES ABOVE
25°C DERATE PEAK CURRENT
AS FOLLOWS:
175 − T
C
I = I
25
150
100
10
−5
−4
−3
−2
−1
0
1
10
10
10
10
10
10
10
t, RECTANGULAR PULSE DURATION (s)
Figure 4. Peak Current Capability
1000
100
If R = 0
t
AV
= (L)(I )/(1.3 × RATED BV
− V
DD
)
AS
DSS
If R ≠ 0
= (L/R)In[(I × R)/(1.3 × RATED BV
100
10
t
AV
− V ) + 1]
DD
AS
DSS
100 ms
STARTING T = 25°C
J
10
OPERATION IN THIS
AREA MAY BE
1
STARTING T = 150°C
LIMITED BY r
J
DS(on)
1 ms
10 ms
100 ms
0.1
SINGLE PULSE
T
T
= MAX RATED
= 25°C
J
C
0.01
1
0.001
0.1
1
10
100
500
0.01
0.1
1
10
V
DS
, DRAIN TO SOURCE VOLTAGE (V)
t , TIME IN AVALANCHE (ms)
AV
NOTE: Refer to ON Semiconductor Application Notes
AN7514 and AN7515.
Figure 5. Forward Bias Safe Operating Area
Figure 6. Unclamped Inductive
Switching Capability
100
80
100
10
1
PULSE DURATION = 250 ms
DUTY CYCLE = 0.5% MAX
V
GS
= 0 V
V
DD
= 5 V
60
T = 175°C
J
T = 25°C
J
40
T = 175°C
J
T = 25°C
J
20
0
T = −55°C
J
0.1
0.8
1.0
1.2
1.4
1.6
3
4
5
6
7
8
9
10
0.0
0.2
0.4
0.6
V
GS
, GATE TO SOURCE VOLTAGE (V)
V
SD
, BODY DIODE FORWARD VOLTAGE (V)
Figure 7. Transfer Characteristics
Figure 8. Forward Diode Characteristics
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4
FDMS86581
TYPICAL CHARACTERISTICS (continued)
100
80
100
V
GS
V
GS
15 V Top
10 V
8 V
7 V
6 V
5.5 V
5 V Bottom
250 ms PULSE WIDTH
T = 25°C
250 ms PULSE WIDTH
T = 175°C
J
15 V Top
10 V
8 V
7 V
6 V
J
80
60
40
60
40
5.5 V
5 V Bottom
20
0
20
0
0
1
2
3
4
5
0
1
2
3
4
5
V
DS
, DRAIN TO SOURCE VOLTAGE (V)
V
DS
, DRAIN TO SOURCE VOLTAGE (V)
Figure 9. Saturation Characteristics
Figure 10. Saturation Characteristics
2.5
140
120
100
80
PULSE DURATION = 250 ms
DUTY CYCLE = 0.5% MAX
PULSE DURATION = 250 ms
DUTY CYCLE = 0.5% MAX
I
D
= 30 A
2.0
1.5
1.0
60
T = 175°C
40
20
J
I
D
= 30 A
V
GS
= 10 V
T = 25°C
J
0.5
0
5
6
7
8
9
10
−80
−40
0
40
80
120
160 200
V
GS
, GATE TO SOURCE VOLTAGE (V)
T , JUNCTION TEMPERATURE (5C)
J
Figure 11. RDSON vs. Gate Voltage
Figure 12. Normalized RDSON vs. Junction
Temperature
2.5
1.3
1.1
I
D
= 5 mA
V
= V
DS
= 250 mA
GS
I
D
2.0
1.5
1.0
0.9
0.7
0.5
0.3
−80
0.5
−80
−40
0
40
80
120
160 200
−40
0
40
80
120
160 200
T , JUNCTION TEMPERATURE (5C)
J
T , JUNCTION TEMPERATURE (5C)
J
Figure 14. Normalized Drain to Source
Breakdown Voltage vs. Junction Temperature
Figure 13. Normalized Gate Threshold Voltage
vs. Temperature
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5
FDMS86581
TYPICAL CHARACTERISTICS (continued)
10000
1000
100
10
10
I
D
= 25 A
V
= 30 V
DD
8
6
V
DD
= 36 V
C
C
iss
V
DD
= 24 V
oss
4
2
f = 1 MHz
= 0 V
C
rss
V
GS
0
1
0.1
1
10
100
0
2
4
6
8
10
12
14
V
, DRAIN TO SOURCE VOLTAGE (V)
Q , GATE CHARGE (nC)
g
DS
Figure 15. Capacitance vs. Drain
to Source Voltage
Figure 16. Gate Charge vs. Gate to Source
Voltage
POWERTRENCH is registered trademark of Semiconductor Components Industries, LLC (SCILLC) or its subsidiaries in the United States
and/or other countries.
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6
MECHANICAL CASE OUTLINE
PACKAGE DIMENSIONS
PQFN8 5X6, 1.27P
CASE 483AE
ISSUE C
DATE 21 JAN 2022
Electronic versions are uncontrolled except when accessed directly from the Document Repository.
Printed versions are uncontrolled except when stamped “CONTROLLED COPY” in red.
DOCUMENT NUMBER:
DESCRIPTION:
98AON13655G
PQFN8 5X6, 1.27P
PAGE 1 OF 1
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