FDMT80040DC
更新时间:2024-09-19 05:39:59
品牌:ONSEMI
描述:N 沟道双 CoolTM 88 PowerTrench® MOSFET 40V,420A,0.56mΩ
FDMT80040DC 概述
N 沟道双 CoolTM 88 PowerTrench® MOSFET 40V,420A,0.56mΩ 功率场效应晶体管
FDMT80040DC 规格参数
是否无铅: | 不含铅 | 生命周期: | Active |
Reach Compliance Code: | not_compliant | Factory Lead Time: | 26 weeks |
风险等级: | 1.52 | Is Samacsys: | N |
Base Number Matches: | 1 |
FDMT80040DC 数据手册
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PDF下载DATA SHEET
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MOSFET - N-Channel,
POWERTRENCH),
DUAL COOL)
Top
TDFNW8 8.3x8.4, 2P
Bottom
40 V, 420 A, 0.56 mW
(DUAL COOL, OPTION 2)
CASE 507AR
FDMT80040DC
General Description
MARKING DIAGRAM
This N−Channel MOSFET is produced using onsemi’s advanced
POWERTRENCH process. Advancements in both silicon and
DUAL COOL package technologies have been combined to offer
Pin 1
the lowest r
while maintaining excellent switching performance
DS(on)
by extremely low Junction−to−Ambient thermal resistance.
Features
• Max r
• Max r
= 0.56 mW at V = 10 V, I = 64 A
GS D
DS(on)
DS(on)
= 0.9 mW at V = 6 V, I = 47 A
GS
D
80040 AWLYW
• Advanced Package and Silicon Combination for Low r
and High Efficiency
DS(on)
80040 = Device Code
• Next Generation Enhanced Body Diode Technology,
Engineered for Soft Recovery
A
WL
Y
= Assembly Location
= Wafer Lot Code
= Year Code
• Low Profile 8x8 mm MLP Package
• MSL1 Robust Package Design
W
= Work Week Code
• 100% UIL Tested
• This Device is Pb−Free, Halide Free and RoHS Compliant
ELECTRICAL CONNECTION
Typical Applications
• OringFET/Load Switching
• Synchronous Rectification
• DC−DC Conversion
G
S
D
D
D
D
S
S
N-Channel MOSFET
ORDERING INFORMATION
See detailed ordering, marking and shipping information on
page 2 of this data sheet.
© Semiconductor Components Industries, LLC, 2016
1
Publication Order Number:
September, 2022 − Rev. 2
FDMT80040DC/D
FDMT80040DC
MOSFET MAXIMUM RATINGS (T = 25°C unless otherwise noted)
A
Symbol
Parameter
Rating
40
Unit
V
V
DS
V
GS
Drain to Source Voltage
Gate to Source Voltage
20
V
I
Drain Current
−Continuous
−Continuous
−Continuous
−Pulsed
T
T
= 25°C
(Note 5)
(Note 5)
(Note 1a)
(Note 4)
(Note 3)
420
A
D
C
C
= 100°C
265
T = 25°C
A
64
2644
2773
156
E
AS
Single Pulse Avalanche Energy
Power Dissipation
mJ
W
P
T = 25°C
C
D
Power Dissipation
T = 25°C
A
(Note 1a)
3.2
T , T
Operating and Storage Junction Temperature Range
−55 to +150
°C
J
STG
Stresses exceeding those listed in the Maximum Ratings table may damage the device. If any of these limits are exceeded, device functionality
should not be assumed, damage may occur and reliability may be affected.
THERMAL CHARACTERISTICS
Symbol
Parameter
Thermal Resistance, Junction to Case
Ratings
1.6
0.8
38
Unit
R
(Top Source)
(Bottom Drain)
(Note 1a)
°C/W
q
JC
R
Thermal Resistance, Junction to Case
Thermal Resistance, Junction to Ambient
Thermal Resistance, Junction to Ambient
Thermal Resistance, Junction to Ambient
Thermal Resistance, Junction to Ambient
Thermal Resistance, Junction to Ambient
q
JC
R
q
JA
R
(Note 1b)
81
q
JA
R
(Note 1i)
15
q
JA
R
(Note 1j)
21
q
JA
R
(Note 1k)
9
q
JA
PACKAGE MARKING AND ORDERING INFORMATION
†
Device Marking
Device
Package
Reel Size
13”
Tape Width
Shipping
80040
FDMT80040DC
TDFNW8 8.3x8.4, 2P,
(DUAL COOL, OPTION 2)
13.3 mm
3000 / Tape & Reel
†For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging
Specifications Brochure, BRD8011/D.
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2
FDMT80040DC
ELECTRICAL CHARACTERISTICS (T = 25°C unless otherwise noted)
J
Symbol
Parameter
Test Conditions
Min.
Typ.
Max.
Unit
OFF CHARACTERISTICS
BV
Drain to Source Breakdown Voltage
I
I
= 250 mA, V = 0 V
GS
40
−
−
−
V
DSS
D
Breakdown Voltage Temperature
Coefficient
= 250 mA, referenced to 25°C
−
21
mV/°C
DBVDSS
DTJ
D
I
Zero Gate Voltage Drain Current
Gate to Source Leakage Current
V
V
= 32 V, V
GS
= 0 V
= 0 V
−
−
−
−
10
mA
DSS
GSS
DS
I
=
20 V, V
100
nA
GS
DS
ON CHARACTERISTICS
V
Gate to Source Threshold Voltage
V
I
= V , I = 250 mA
2.0
2.7
4.0
V
GS(th)
GS
DS
D
Gate to Source Threshold Voltage
Temperature Coefficient
= 250 mA, referenced to 25°C
−
−9
−
mV/°C
DVGS(th)
DTJ
D
r
Static Drain to Source On Resistance
Forward Transconductance
V
GS
V
GS
V
GS
V
DS
= 10 V, I = 64 A
−
−
−
−
0.44
0.63
0.66
278
0.56
0.9
0.84
−
mW
DS(on)
D
= 6 V, I = 47 A
D
= 10 V, I = 64 A, T = 125°C
D
J
g
FS
= 5 V, I = 64 A
S
D
DYNAMIC CHARACTERISTICS
C
Input Capacitance
V
DS
= 20 V, V = 0 V, f = 1 MHz
−
−
18650
5540
304
26110
7760
1210
3.6
pF
pF
pF
W
iss
GS
C
Output Capacitance
Reverse Transfer Capacitance
Gate Resistance
oss
C
−
rss
R
0.1
1.8
g
SWITCHING CHARACTERISTICS
td
Turn−On Delay Time
Rise Time
V
V
= 20 V, I = 64 A,
−
−
−
−
−
−
−
−
63
62
101
100
162
69
ns
(on)
DD
GS
D
= 10 V, R
= 6 W
GEN
t
r
t
Turn−Off Delay Time
Fall Time
101
43
d(off)
t
f
Q
Total Gate Charge
V
GS
V
GS
V
DD
= 0 V to 10 V, V = 20 V, I = 64 A
241
149
76
338
209
−
nC
g(TOT)
DD
D
= 0 V to 6 V, V = 20 V, I = 64 A
DD
D
Q
Q
Gate to Source Charge
= 20 V, I = 64 A
nC
nC
gs
D
Gate to Drain ”Miller” Charge
35
−
gd
DRAIN−SOURCE DIODE CHARACTERISTICS
V
Source to Drain Diode Forward Voltage
V
V
= 0 V, I = 2.6 A
(Note 2)
(Note 2)
−
−
−
−
0.67
0.77
94
1.1
1.2
V
SD
GS
S
= 0 V, I = 64 A
GS
S
t
Reverse Recovery Time
I = 64 A, di/dt = 100 A/ms
F
151
351
ns
rr
Q
Reverse Recovery Charge
219
nC
rr
Product parametric performance is indicated in the Electrical Characteristics for the listed test conditions, unless otherwise noted. Product
performance may not be indicated by the Electrical Characteristics if operated under different conditions.
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3
FDMT80040DC
THERMAL CHARACTERISTICS
Symbol
Parameter
Ratings
1.6
0.8
38
Unit
R
q
JC
R
q
JC
R
q
JA
R
q
JA
R
q
JA
R
q
JA
R
q
JA
R
q
JA
R
q
JA
R
q
JA
R
q
JA
R
q
JA
R
q
JA
R
q
JA
Thermal Resistance, Junction to Case
Thermal Resistance, Junction to Case
(Top Source)
°C/W
(Bottom Drain)
(Note 1a)
(Note 1b)
(Note 1c)
(Note 1d)
(Note 1e)
(Note 1f)
(Note 1g)
(Note 1h)
(Note 1i)
Thermal Resistance, Junction to Ambient
Thermal Resistance, Junction to Ambient
Thermal Resistance, Junction to Ambient
Thermal Resistance, Junction to Ambient
Thermal Resistance, Junction to Ambient
Thermal Resistance, Junction to Ambient
Thermal Resistance, Junction to Ambient
Thermal Resistance, Junction to Ambient
Thermal Resistance, Junction to Ambient
Thermal Resistance, Junction to Ambient
Thermal Resistance, Junction to Ambient
Thermal Resistance, Junction to Ambient
81
26
34
14
16
26
60
15
(Note 1j)
21
(Note 1k)
(Note 1l)
9
11
NOTES:
1. R
is determined with the device mounted on a FR−4 board using a specified pad of 2 oz copper as shown below. R
is determined by
q
q
CA
JA
the user’s board design.
a) 38°C/W when mounted on
b) 81°C/W when mounted on
2
a 1 in pad of 2 oz copper.
a minimum pad of 2 oz copper.
2
c) Still air, 20.9 × 10.4 × 12.7 mm Aluminum Heat Sink, 1 in pad of 2 oz copper
d) Still air, 20.9 × 10.4 × 12.7 mm Aluminum Heat Sink, minimum pad of 2 oz copper
2
e) Still air, 45.2 × 41.4 × 11.7 mm Aavid Thermalloy Part # 10−L41B−11 Heat Sink, 1 in pad of 2 oz copper
f) Still air, 45.2 × 41.4 × 11.7 mm Aavid Thermalloy Part # 10−L41B−11 Heat Sink, minimum pad of 2 oz copper
2
g) .200FPM Airflow, No Heat Sink, 1 in pad of 2 oz copper
h) .200FPM Airflow, No Heat Sink, minimum pad of 2 oz copper
2
i) .200FPM Airflow, 20.9 × 10.4 × 12.7 mm Aluminum Heat Sink, 1 in pad of 2 oz copper
j) .200FPM Airflow, 20.9 × 10.4 × 12.7 mm Aluminum Heat Sink, minimum pad of 2 oz copper
2
k) .200FPM Airflow, 45.2 × 41.4 × 11.7 mm Aavid Thermalloy Part # 10−L41B−11 Heat Sink, 1 in pad of 2 oz copper
l) .200FPM Airflow, 45.2 × 41.4 × 11.7 mm Aavid Thermalloy Part # 10−L41B−11 Heat Sink, minimum pad of 2 oz copper
2. Pulse Test: Pulse Width < 300 ms, Duty cycle < 2.0%.
3. E of 2773 mJ is based on starting T = 25_C; N−ch: L = 3 mH, I = 43 A, V = 40 V, V = 10 V. 100% test at L = 0.3 mH, I = 93 A.
AS
J
AS
DD
GS
AS
4. Pulsed Id please refer to Figure 11 SOA graph for more details.
5. Computed continuous current limited to Max Junction Temperature only, actual continuous current will be limited by thermal &
electro−mechanical application board design.
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4
FDMT80040DC
TYPICAL CHARACTERISTICS (T = 25°C unless otherwise noted)
J
320
10
Pulse Duration = 80 ms
Duty Cycle = 0.5% Max
V
GS
V
GS
= 10 V
= 6 V
V
GS
= 4.2 V
8
V
GS
= 5 V
240
160
V
GS
= 4.5 V
6
4
V
GS
= 4.5 V
V
GS
= 4.2 V
V
GS
= 5 V
80
0
2
0
V
= 6 V
GS
Pulse Duration = 80 ms
Duty Cycle = 0.5% Max
V
GS
= 10 V
160
I , Drain Current (A)
0
80
240
320
1
2
3
4
5
0
V
, Drain to Source Voltage (V)
D
DS
Figure 1. On Region Characteristics
Figure 2. Normalized On−Resistance
vs. Drain Current and Gate Voltage
1.6
1.4
1.2
1.0
0.8
0.6
3.0
2.5
2.0
1.5
Pulse Duration = 80 ms
Duty Cycle = 0.5% Max
I
V
= 64 A
D
= 10 V
GS
I
D
= 64 A
T = 125°C
J
1.0
0.5
T = 25°C
J
0.0
−75 −50 −25
0
25
50
75 100 125 150
3
4
5
6
7
8
9
10
V
GS
, Gate to Source Voltage (V)
T , Junction Temperature (5C)
J
Figure 3. Normalized On Resistance
vs. Junction Temperature
Figure 4. On−Resistance vs. Gate to Source
Voltage
320
100
320
240
V
GS
= 0 V
Pulse Duration = 80 ms
Duty Cycle = 0.5% Max
V
DS
= 5 V
10
1
T = 150°C
J
T = 150°C
J
T = 25°C
J
T = 25°C
160
80
0
J
0.1
T = −55°C
J
0.01
T = −55°C
J
0.001
4
0.0
0.2
0.4
0.6
0.8
1.0
1.2
2
3
5
6
V
GS
, Gate to Source Voltage (V)
V
SD
, Body Diode Forward Voltage (V)
Figure 5. Transfer Characteristics
Figure 6. Source to Drain Diode Forward
Voltage vs. Source Current
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5
FDMT80040DC
TYPICAL CHARACTERISTICS (T = 25°C unless otherwise noted) (continued)
J
50000
10
8
I
D
= 64 A
C
iss
V
DD
= 15 V
10000
1000
V
= 20 V
DD
6
C
oss
rss
V
= 25 V
DD
4
2
0
f = 1 MHz
= 0 V
C
V
GS
100
0
100
Q , Gate Charge (nC)
0.1
1
10
40
50
150
200
250
V
, Drain to Source Voltage (V)
DS
g
Figure 7. Gate Charge Characteristics
Figure 8. Capacitance vs. Drain to Source Voltage
300
100
500
400
300
R
= 0.8°C/W
q
JC
T = 25°C
J
V
GS
= 10 V
T = 100°C
J
V
GS
= 6 V
10
200
100
0
T = 125°C
J
1
0.1
1
100
1000
10000
25
50
75
100
125
150
10
t
, Time in Avalanche (ms)
AV
T , Case Temperature (5C)
C
Figure 9. Unclamped Inductive Switching
Capability
Figure 10. Maximum Continuous Drain Current
vs Case Temperature
10000
1000
100
100000
10000
1000
Single pulse
R
= 0.8°C/W
q
JC
T
C
= 25°C
10 ms
100 ms
This Area is
Limited by r
10
DS(on)
1 ms
10 ms
DC
Single Pulse
T = Max Rated
100
1
J
R
T
= 0.8°C/W
Curve Bent to
q
JC
= 25°C
Measured Data
C
0.1
10
10
−5
−4
−3
−2
−1
0.1
1
10
100
300
10
10
10
10
1
t, Pulse Width (s)
V
DS
, Drain to Source Voltage (V)
Figure 11. Forward Bias Safe Operating Area
Figure 12. Single Pulse Maximum
Power Dissipation
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6
FDMT80040DC
TYPICAL CHARACTERISTICS (T = 25°C unless otherwise noted) (continued)
J
2
1
Duty Cycle − Descending Order
D = 0.5
0.2
0.1
0.05
0.02
0.01
P
DM
0.1
0.01
t
1
t
2
Notes:
(t) = r(t) x R
Z
R
q
q
JC
JC
Single pulse
= 0.8°C/W
q
JC
Peak T = P
x Z (t) + T
q
JC C
J
DM
Duty Cycle, D = t /t
1
2
0.001
−5
−4
−3
−2
−1
10
10
10
10
10
1
t, Rectangular Pulse Duration (s)
Figure 13. Junction−to−Case Transient Thermal Response Curve
POWERTRENCH and DUAL COOL are registered trademarks of Semiconductor Components Industries, LLC dba “onsemi” or its affiliates and/or sub-
sidiaries in the United States and/or other countries.
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7
MECHANICAL CASE OUTLINE
PACKAGE DIMENSIONS
TDFNW8 8.3x8.4, 2P, DUAL COOL, OPTION 2
CASE 507AR
ISSUE B
DATE 29 MAR 2021
GENERIC
MARKING DIAGRAM*
XXXX = Specific Device Code
A
= Assembly Location
WL = Wafer Lot Code
Y
= Year Code
W
= Work Week Code
*This information is generic. Please refer to
device data sheet for actual part marking.
Pb−Free indicator, “G” or microdot “ G”,
may or may not be present. Some products
may not follow the Generic Marking.
Electronic versions are uncontrolled except when accessed directly from the Document Repository.
Printed versions are uncontrolled except when stamped “CONTROLLED COPY” in red.
DOCUMENT NUMBER:
DESCRIPTION:
98AON95711G
TDFNW8 8.3x8.4, 2P, DUAL COOL, OPTION 2
PAGE 1 OF 1
ON Semiconductor and
are trademarks of Semiconductor Components Industries, LLC dba ON Semiconductor or its subsidiaries in the United States and/or other countries.
ON Semiconductor reserves the right to make changes without further notice to any products herein. ON Semiconductor makes no warranty, representation or guarantee regarding
the suitability of its products for any particular purpose, nor does ON Semiconductor assume any liability arising out of the application or use of any product or circuit, and specifically
disclaims any and all liability, including without limitation special, consequential or incidental damages. ON Semiconductor does not convey any license under its patent rights nor the
rights of others.
© Semiconductor Components Industries, LLC, 2018
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onsemi,
, and other names, marks, and brands are registered and/or common law trademarks of Semiconductor Components Industries, LLC dba “onsemi” or its affiliates
and/or subsidiaries in the United States and/or other countries. onsemi owns the rights to a number of patents, trademarks, copyrights, trade secrets, and other intellectual property.
A listing of onsemi’s product/patent coverage may be accessed at www.onsemi.com/site/pdf/Patent−Marking.pdf. onsemi reserves the right to make changes at any time to any
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and applications using onsemi products, including compliance with all laws, regulations and safety requirements or standards, regardless of any support or applications information
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vary over time. All operating parameters, including “Typicals” must be validated for each customer application by customer’s technical experts. onsemi does not convey any license
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