FDWS9511L-F085 [ONSEMI]
P 沟道，逻辑电平，Power Trench® MOSFET，-40V，-30A，20.5mΩ;
| 型号： | FDWS9511L-F085 |
| 厂家： | 
ONSEMI |
| 描述： | P 沟道，逻辑电平，Power Trench® MOSFET，-40V，-30A，20.5mΩ |
| 文件： | 总7页 (文件大小：336K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
DATA SHEET
www.onsemi.com
MOSFET – Power, Single
P-Chanel
V
R
MAX
I MAX
D
(BR)DSS
DS(ON)
20.5 mW @ −10 V
32.0 mW @ −4.5 V
−40 V
−30 A
-40 V, -30 A, 20.5 mW
FDWS9511L-F085
D (5,6,7,8)
Features
• Small Footprint (5x6 mm) for Compact Design
G (4)
• Low R
to Minimize Conduction Losses
DS(on)
• Low QG and Capacitance to Minimize Driver Losses
• Wettable Flank Option for Enhanced Optical Inspection
• AEC−Q101 Qualified and PPAP Capable
• These Devices are Pb−Free, Halogen Free/BFR Free and are RoHS
Compliant
S (1,2,3)
P−Channel MOSFET
Top
Bottom
D
D
MAXIMUM RATINGS (T = 25°C unless otherwise noted)
J
D
D
Parameter
Drain−to−Source Voltage
Symbol
Value
−40
20
Unit
V
G
V
DSS
S
S
S
Gate−to−Source Voltage
V
GS
V
Pin 1
Continuous Drain
Current R
Steady
State
T
= 25°C
= 100°C
= 25°C
I
−30
−30
68.2
34.1
−9.1
−6.5
3.0
A
C
D
DFNW8
CASE 507AU
q
JC
T
C
(Notes 1, 3)
Power Dissipation
T
C
P
W
A
D
R
(Note 1)
q
JC
MARKING DIAGRAM
T
C
= 100°C
= 25°C
Continuous Drain
Current R
Steady
State
T
C
I
D
q
JA
T
C
= 100°C
= 25°C
(Notes 1, 2, 3)
ON
Power Dissipation
T
C
P
W
AYWWWL
D
R
(Notes 1, 2)
q
FDWS
9511L
JA
T
C
= 100°C
1.5
Pulsed Drain Current
T
C
= 25°C, t = 10 ms
I
DM
−298
A
p
Operating Junction and Storage Temperature
Range
T , T
−55 to
+175
°C
J
STG
A
Y
= Assembly Location
= Year
Source Current (Body Diode)
I
S
−100
A
Single Pulse Drain−to−Source Avalanche
E
25
mJ
WW
WL
FDWS
9511L
= Work Week
= Assembly Lot
= Device Code
= Device Code
AS
Energy (I
= −25)
L(pk)
Lead Temperature for Soldering Purposes
(1/8″ from case for 10 s)
T
260
°C
L
(Note: Microdot may be in either location)
Stresses exceeding those listed in the Maximum Ratings table may damage the
device. If any of these limits are exceeded, device functionality should not be
assumed, damage may occur and reliability may be affected.
ORDERING INFORMATION
THERMAL RESISTANCE MAXIMUM RATINGS
†
Device
FDWS9511L−F085
Package
Shipping
Parameter
Symbol
Value
2.2
Unit
DFNW8
(Power56)
(Pb−Free)
3000 /
Junction−to−Case − Steady State
Junction−to−Ambient − Steady State (Note 2)
R
°C/W
q
JC
Tape & Reel
R
50
q
JA
1. The entire application environment impacts the thermal resistance values
shown, they are not constants and are only valid for the particular conditions
noted. Current is limited by wirebond configuration
†For information on tape and reel specifications,
including part orientation and tape sizes, please
refer to our Tape and Reel Packaging Specification
Brochure, BRD8011/D.
2
2. Surface−mounted on FR4 board using a 650 mm , 2 oz. Cu pad.
3. Maximum current for pulses as long as 1 second is higher but is dependent
on pulse duration and duty cycle.
© Semiconductor Components Industries, LLC, 2018
1
Publication Order Number:
October, 2021 − Rev. 2
FDWS9511L−F085/D
FDWS9511L−F085
ELECTRICAL CHARACTERISTICS (T = 25°C unless otherwise noted)
J
Parameter
Symbol
Test Condition
Min
Typ
Max
Unit
OFF CHARACTERISTICS
Drain−to−Source Breakdown Voltage
V
V
GS
= 0 V, I = −250 mA
−40
V
(BR)DSS
D
Drain−to−Source Breakdown Voltage
Temperature Coefficient
V
/
20
mV/°C
(BR)DSS
T
J
Zero Gate Voltage Drain Current
I
V
DS
= 0 V,
T = 25°C
−1
mA
mA
nA
DSS
GS
J
V
= −40 V
T = 175°C
J
−1
Zero Gate Voltage Drain Current
ON CHARACTERISTICS (Note 4)
Gate Threshold Voltage
I
V
= 0 V, V
=
16 V
100
GSS
DS
GS
V
V
= V , I = −250 mA
−1
−1.8
−5.1
17
−3
V
GS(TH)
GS
DS
D
Threshold Temperature Coefficient
Drain−to−Source On Resistance
V
/T
J
mV/°C
mW
GS(TH)
R
V
GS
= −10 V
= −4.5 V
I
I
= −30 A
= −15 A
20.5
34
DS(on)
D
V
GS
26
D
CHARGES, CAPACITANCES & GATE RESISTANCE
Input Capacitance
C
V
= 0 V, f = 100 KHz, V = −20 V
1200
470
26
37
8
pF
ISS
GS
DS
Output Capacitance
Reverse Transfer Capacitance
Gate Resistance
C
OSS
C
RSS
R
V
GS
= 0.5 V, f = 1 MHz
W
G
Total Gate Charge
Q
V
GS
= −4.5 V, V = −20 V; I = −30 A
nC
G(TOT)
DS
D
V
GS
= −10 V, V = −20 V; I = −30 A
18
1
DS
D
Threshold Gate Charge
Gate−to−Source Gate Charge
Gate−to−Drain “Miller” Charge
Plateau Voltage
Q
V
GS
= 0 to −1 V
G(TH)
Q
V
DD
= −20 V, I = −30 A
4
GS
GD
GP
D
Q
V
3
−3.8
V
SWITCHING CHARACTERISTICS
Turn−On Delay Time
t
V
= −20 V, I = −30 A,
8
ns
d(ON)
DD
GS
D
V
= −10 V, R
= 6 W
GEN
Turn−On Rise Time
t
r
28
112
40
Turn−Off Delay Time
t
d(OFF)
Turn−Off Fall Time
t
f
DRAIN−SOURCE DIODE CHARACTERISTICS
Source−to−Drain Diode Voltage
V
I
= −30 A, V = 0 V
−0.9
−0.85
36
−1.3
−1.2
V
SD
SD
GS
I
= −15 A, V = 0 V
GS
SD
Reverse Recovery Time
Charge Time
t
V
= 0 V, dI /dt = 100 A/ms,
ns
RR
GS
SD
= −30 A
I
S
t
t
18
a
Discharge Time
18
b
Reverse Recovery Charge
Q
24
nC
RR
Product parametric performance is indicated in the Electrical Characteristics for the listed test conditions, unless otherwise noted. Product
performance may not be indicated by the Electrical Characteristics if operated under different conditions.
4. Pulse Test: pulse width ≤ 300 ms, duty cycle ≤ 2%.
5. Switching characteristics are independent of operating junction temperatures.
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2
FDWS9511L−F085
TYPICAL CHARACTERISTICS
1.2
1.0
0.8
0.6
0.4
50
45
40
35
30
25
20
15
10
Current Limited
by Package
V
GS
= 10 V
0.2
0
5
0
0
25
50
75
100
125
150
175
25
50
75
100
125
150
175
T , CASE TEMPERATURE (°C)
C
T , CASE TEMPERATURE (°C)
C
Figure 1. Normalized Power Dissipation vs.
Case Temperature
Figure 2. Maximum Continuous Drain Current
vs. Case Temperature
2
1
50% Duty Cycle
20%
P
DM
10%
5%
0.1
2%
t
1
t
2
1%
DUTY CYCLE, D = t /t
1 2
Peak T = P X Z X R + T
C
Single Pulse
q
q
JC
J
DM
JC
0.01
0.00001
0.0001
0.001
0.01
0.1
1
10
t, RECTANGULAR PULSE DURATION (s)
Figure 3. Normalized Maximum Transient Thermal Impedance
1000
V
GS
= −10 V
T
C
= 25°C
For temperatures above 25°C
derate peak current as follows:
175 * TC
Ǹ
I + I25
ƪ ƫ
150
100
10
Single Pulse
0.00001
0.0001
0.001
0.01
0.1
1
10
t, RECTANGULAR PULSE DURATION (s)
Figure 4. Peak Current Capability
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3
FDWS9511L−F085
TYPICAL CHARACTERISTICS
1K
100
10
100
If R = 0, t =(L)(I )/(1.3*Rated BV
− V
)
Operation in this area may
be limited by package
AV
AS
DSS
DD
If R ≠ 0, t =(L/R)In[(I *R)/(1.3*Rated BV
− V )+1]
DD
AV
AS
DSS
100 ms
Starting T = 25°C
10
J
T
C
= 25°C
T = Max Rated
Starting T = 150°C
J
J
Single Pulse
1 ms
1
10 ms
Operation in this area may
NOTE: Refer to onsemi
100 ms
be limited by R
DS(on)
Application Notes AN7514 and AN7515
0.001 0.01 0.1
, TIME IN AVALANCHE (mS)
0.1
1
0.1
1
10
100
1
10
100
−V , DRAIN−TO−SOURCE VOLTAGE (V)
DS
t
AV
Figure 5. Forward Bias Safe Operating Area
Figure 6. Unclamped Inductive Switching
Capability
100
80
100
10
1
V
GS
= 0 V
Pulse Duration = 250 ms
Duty Cycle = 0.5% Max
V
DS
= −5 V
60
40
T = 25°C
J
0.1
T = 175°C
J
20
0
0.01
T = 175°C
J
T = −55°C
J
T = 25°C
J
T = −55°C
J
0.001
1
2
3
4
5
6
7
8
0
0.2
0.4
0.6
0.8
1.0
1.2
V
GS
, GATE−TO−SOURCE VOLTAGE (V)
−V , BODY DIODE FORWARD VOLTAGE (V)
SD
Figure 7. Transfer Characteristics
Figure 8. Forward Diode Characteristics
120
80
120
80
250 ms Pulse Width
T = 25°C
J
V
GS
= 10 V
250 ms Pulse Width
T = 175°C
J
7.0 V
V
GS
= 10 V
7.0 V
5.0 V
4.5 V
4.0 V
3.5 V
5.0 V
4.5 V
4.0 V
40
0
40
0
3.5 V
0
1
2
3
4
5
0
1
2
3
4
5
−V , DRAIN−SOURCE VOLTAGE (V)
DS
V
DS
, DRAIN−SOURCE VOLTAGE (V)
Figure 9. Saturation Characteristics
Figure 10. Saturation Characteristics
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4
FDWS9511L−F085
TYPICAL CHARACTERISTICS
140
105
70
1.8
Pulse Duration = 250 ms
Duty Cycle = 0.5% Max
I
V
= 30 A
D
1.6
1.4
1.2
1.0
= 10 V
GS
I
D
= −30 A
T = 175°C
J
35
0
0.8
0.6
T = 25°C
J
3
4
5
6
7
8
9
10
−80
−40
0
40
80
120
160
200
V
GS
, GATE−TO−SOURCE VOLTAGE (V)
T , JUNCTION TEMPERATURE (°C)
J
Figure 11. RDS(on) vs. Gate Voltage
Figure 12. Normalized RDS(on) vs. Junction
Temperature
1.2
1.0
0.8
1.10
1.05
1.00
V
= V
DS
= −250 mA
GS
I
D
= −1 mA
I
D
0.95
0.90
0.6
0.4
−80
−40
0
40
80
120
160
200
−80
−40
0
40
80
120
160 200
T , JUNCTION TEMPERATURE (°C)
J
T , JUNCTION TEMPERATURE (°C)
J
Figure 13. Normalized Gate Threshold Voltage
vs. Temperature
Figure 14. Normalized Drain−to−Source
Breakdown Voltage vs. Junction Temperature
10K
10
8
V
DD
= 16 V
V
DD
= 24 V
C
C
C
ISS
1K
6
OSS
RSS
V
DD
= 20 V
100
4
10
1
2
0
f = 1 MHz
= 0 V
V
GS
0
4
8
12
16
20
0.1
1
10
40
−V , DRAIN−TO−SOURCE VOLTAGE (V)
DS
Q , GATE CHARGE (nC)
g
Figure 15. Capacitance vs. Drain−to−Source
Figure 16. Gate Charge vs. Gate−to−Source
Voltage
Voltage
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5
FDWS9511L−F085
PACKAGE DIMENSIONS
DFNW8 5.2x6.3, 1.27P
CASE 507AU
ISSUE A
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6
FDWS9511L−F085
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provided by onsemi. “Typical” parameters which may be provided in onsemi data sheets and/or specifications can and do vary in different applications and actual performance may
vary over time. All operating parameters, including “Typicals” must be validated for each customer application by customer’s technical experts. onsemi does not convey any license
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◊
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