FSB70250 [ONSEMI]
智能功率模块,500V,2A;型号: | FSB70250 |
厂家: | ONSEMI |
描述: | 智能功率模块,500V,2A |
文件: | 总12页 (文件大小:525K) |
中文: | 中文翻译 | 下载: | 下载PDF数据表文档文件 |
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2015 年12 月
FSB70250
Motion SPM® 7 系列
特性
应用
• 通过 UL 第 E209204 号认证 (UL1557)
• 高性能 PQFN 封装
• 小功率交流电机驱动器的三相逆变器驱动
相关资料
• AN-9077 - Motion SPM® 7 Series User’s Guide
• 500 V RDS(on) = 3.4 (最大值)FRFET MOSFET 三
相逆变器,带有栅极驱动器和保护功能
• AN-9078 - Surface Mount Guidelines for Motion
SPM® 7 Series
• 低端 MOSFET 的三个独立开源引脚用于三相电流感测
• 高电平有效接口,可用于 3.3 / 5 V 逻辑电平,施密特触
发脉冲输入
概述
FSB70250 是一款先进的 Motion SPM® 7 模块,为交流
感应、无刷直流电机和 PMSM 电机提供非常全面的高性
能逆变器输出平台。这些模块综合优化了内置 MOSFETs
(FRFET® 技术)的栅极驱动以最小化电磁干扰和能量损
耗。同时也提供多重模组保护特性,集成欠压闭锁,热量
监测,故障报告和互锁功能。内置的一个 HVIC 将逻辑电
平栅极输入转化为适合驱动模块内部 MOSFET 的高电
压,高电流驱动信号。独立的开源 MOSFET 端子在每个
相位均有效,可支持大量不同种类的控制算法。
• 针对低电磁干扰进行优化
• 内置于 HVIC 的温度感测
• 用于栅极驱动,互锁功能和欠压保护的 HVIC
• 绝缘等级:1500 Vrms / 分钟
• 湿度敏感等级 (MSL) 3
• 符合 RoHS 标准
封装标识与定购信息
器件标识
器件
封装
卷尺寸
卷带宽度
数量
FSB70250
FSB70250
PQFN27A
13’’
24 mm
1000 个
©2013 飞兆半导体公司
FSB70250 Rev. 1.3
1
www.fairchildsemi.com
绝对最大额定值
逆变器部分 (单个 MOSFET,除非另有说明。)
符号
VDSS
*ID 25
*ID 80
*IDP
参数
工作条件
额定值
500
3.3
单位
V
A
单个 MOSFET 的漏极 - 源极电压
单个 MOSFET 的漏极持续电流
单个 MOSFET 的漏极持续电流
单个 MOSFET 的漏极峰值电流
最大功耗
TCB = 25°C (注 1)
TCB = 80°C
CB = 25°C, PW < 100 μs
2.5
A
T
6.7
A
*PD
81
W
TCB = 25°C,单个 MOSFET
控制部分 (单个 HVIC,除非另有说明。)
符号
VDD
VBS
VIN
参数
工作条件
施加在 VDD 和 COM 之间
施加在 VB 和 VS 之间
施加在 IN 和 COM 之间
施加在 FO 和 COM 之间
灌电流 FO 引脚
额定值
单位
V
20
20
控制电源电压
高端偏压
V
-0.3 ~ VDD + 0.3
-0.3 ~ VDD + 0.3
5
V
输入信号电压
故障输出电源电压
故障输出电流
电流感测输入电压
VFO
IFO
V
mA
V
VCSC
-0.3 ~ VDD + 0.3
施加在 Csc 和 COM 之间
整个系统
符号
TJ
参数
工作条件
额定值
-40 ~ 150
-40 ~ 125
单位
°C
工作结温
存储温度
TSTG
°C
60 Hz,正弦波形, 1 分钟,连接陶
瓷基板到引脚
VISO
1500
Vrms
绝缘电压
注:
1. T 是壳体底部的垫片温度。
CB
2. 标记为 “ * “ 的为计算值或设计因素。
©2013 飞兆半导体公司
FSB70250 Rev. 1.3
2
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引脚描述
引脚号
引脚名
/FO
引脚描述
1
故障输出
2
VTS
以电压形式输出的 HVIC 温度
用于故障输出持续时间的电容
短路电流感测输入电容 (低通滤波器)
驱动 IC 和 MOSFET 的电源偏置电压
高端 U 相的信号输入
3
4
Cfod
Csc
5
VDD
6
IN_UH
IN_VH
COM
IN_WH
IN_UL
IN_VL
IN_WL
Nu
7
高端 V 相的信号输入
8 (8a)
9
公共电源接地
高端 W 相的信号输入
低端 U 相的信号输入
10
11
低端 V 相的信号输入
12
低端 W 相的信号输入
U 相的直流输入负端
13
14
U
U 相输出
15
Nv
V 相的直流输入负端
16
V
V 相输出
17
W
W 相输出
18
Nw
W 相的直流输入负端
19
VS(W)
PW
W 相 MOSFET 驱动的高端偏压接地
W 相的直流输入正端
20
21
PV
V 相的直流输入正端
22
PU
U 相的直流输入正端
23 (23a)
24 (24a)
25
VS(V)
VS(U)
VB(U)
VB(V)
VB(W)
V 相 MOSFET 驱动的高端偏压接地
U 相 MOSFET 驱动的高端偏压接地
U 相 MOSFET 驱动的高端偏压
V 相 MOSFET 驱动的高端偏压
W 相 MOSFET 驱动的高端偏压
26
27
(19) VS(W)
(23), (23a) VS(V)
(24), (24a) VS(U)
(22) Pu
(21) Pv
(20) Pw
OUT(UH)
VS(U)
(25) VB(U)
(26) VB(V)
(27) VB(W)
VB(U)
VB(V)
VB(W)
(14) U
OUT(VH)
VS(V)
(16) V
(5) VDD
VDD
COM
OUT(WH)
VS(W)
(8),(8a) COM
UH
VH
WH
UL
(6) IN_UH
(7) IN_VH
(9) IN_WH
(10) IN_UL
(11) IN_VL
(12) IN_WL
(1) /Fo
(17) W
OUT(UL)
OUT(VL)
VL
(13) Nu
(15) Nv
(18) Nw
WL
/Fo
(2) VTS
(3) Cfod
(4) Csc
VTS
Cfod
Csc
OUT(WL)
图 1. 引脚布局和内部框图
注:
®
4. 每个低端 MOSFET 的源极端子与 Motion SPM 7 中的电源接地或偏压接地不连接。外部连接应当如图 2 所示。
5. 后缀为 -a 的垫片连接到相同数字的引脚,例如:8 和 8a 在内部连接在一起。
©2013 飞兆半导体公司
FSB70250 Rev. 1.3
3
www.fairchildsemi.com
电气特性 (TJ = 25°C, VDD = VBS = 15 V 除非另有说明。)
逆变器部分 (单个 MOSFET,除非另有说明。)
符号
BVDSS
IDSS
参数
工作条件
最小值 典型值 最大值 单位
500
-
-
V
mA
漏极-源极击穿电压
零栅极电压漏极电流
漏极至源极静态导通电阻
漏极-源极二极管正向电压
VIN = 0 V, ID = 1 mA (注 1)
VIN = 0 V, VDS = 500 V
-
-
-
-
-
-
-
-
-
-
-
-
1
RDS(on)
VSD
VDD = VBS = 15 V, VIN = 5 V, ID = 1.0 A
2.5
0.9
720
660
520
460
1.1
145
75
3.4
V
DD = VBS = 15 V, VIN = 0 V, ID = -1.0 A
1.2
V
tON
-
-
-
-
-
-
-
-
ns
ns
ns
ns
A
tD(ON)
tOFF
tD(OFF)
Irr
V
V
PN = 300 V, VDD = VBS = 15 V, ID = 1.0 A
IN = 0 V 5 V, 电感负载 L = 3 mH
低端 MOSFET 开关
开关时间
(注 2)
trr
ns
μJ
μJ
EON
EOFF
7
控制部分 (单个 HVIC,除非另有说明。)
符号
参数
工作条件
最小值 典型值 最大值 单位
IQDD
VDD=15 V, VIN=0 V
VDD - COM
B(X)-VS(X),VB(V)
VS(V), VB(W)-VS(W)
-
1.7
3.0
mA
V
V
DD 静态电流
V
-
IQBS
V
V
BS=15 V, VIN=0 V
DD=15 V,FPWM=20 kHz,
-
45
70
μA
BS 静态电流
IPDD
VDD - COM
-
-
1.9
3.2
mA
V
V
DD 工作电流
duty=50%,PWM 信号低端
输入
V
BS=15 V,FPWM=20 kHz,
VB(U)-VS(U),VB(V)
VS(V), VB(W)-VS(W)
-
IPBS
300
400
μA
BS 工作电流
duty=50%,PWM 信号高端
输入
UVDDD
UVDDR
UVBSD
UVBSR
7.4
8.0
7.4
8.0
8.0
8.9
8.0
8.9
9.4
9.8
9.4
9.8
V
V
V
V
V
V
V
V
DD 欠压保护检测电平
DD 欠压保护复位电平
BS 欠压保护检测电平
BS 欠压保护复位电平
低端欠压保护 (图 6)
高端欠压保护 (图 7)
VTS
mV
580
-
675
770
2.4
-
HVIC 温度感测电压输出 VDD=15 V, THVIC=25°C (注 3)
VIH
VIL
-
-
V
V
导通阈值电压
关断阈值电压
逻辑高电平
逻辑低电平
IN - COM
SC - COM
0.8
VSC(ref)
tFOD
V
DD=15 V
0.45
1.0
0.5
1.4
0.55
1.8
V
短路电流保护触发电平
故障输出脉宽
C
ms
CFOD=33 nF (注 4)
注:
®
1. BV
是 Motion SPM 7 产品中的单个 MOSFET 的漏极和源极端子之间的绝对最大额定电压。考虑到寄生电感,V 应远低于该值,因此 V 在任何情况下不得超过 BV
。
DSS
DSS
PN
PN
2. t 和 t
包括内部驱动 IC 的传输延迟。所列出的数值是在实验室测试条件下测得,在实际应用中因为印刷电路板和布线的差异,数值也会有所不同。请参阅图 3 介绍的开关
ON
OFF
时间定义,以及图 4 中的开关测试电路。
3. V 只能用作模块的温度感测,但不能自动关闭 MOSFETs。
ts
-6
4. 故障输出脉宽 t
取决于电容 C
的值,可采用下面的近似公式进行计算:C
= 24 x 10 x t
[F]
FOD
FOD
FOD
FOD
©2013 飞兆半导体公司
FSB70250 Rev. 1.3
4
www.fairchildsemi.com
推荐工作条件
符号
参数
工作条件
最小值 典型值 最大值 单位
VPN
VDD
VBS
-
300
15.0
15.0
400
16.5
16.5
V
V
V
电源电压
施加在 P 和 N 之间
13.5
13.5
控制电源电压
高端偏压
施加在 VDD 和 COM 之间
施加在 VB 和 VS 之间
dVDD/dt,
dVBS/dt
-1.0
-
1.0
V/μs
控制电源波动
tdead
fPWM
VDD = VBS = 13.5 ~ 16.5 V, TJ 150°C
TJ 150°C
500
-
-
-
-
ns
防止桥臂直通的死区时间
15
kHz
PWM 开关频率
热阻
符号
参数
工作条件
最小值 典型值 最大值 单位
单个 MOSFET 工作条件下
(注 1)
-
1.2
-
°C/W
RθJCB
结点 - 壳体底部的热阻
These values depend on PWM
5-V
Line
15-V
control algorithm
One-Leg Diagram of SPM
Line
C
1
P
VPN
VB
VDD
HIN
R5
HO
VS
Inverter
Output C3
Micom
LIN
/Fo
C5
VTS
LO
R3
N
CSC
COM
C4
C2
C6
10F
R2
* Example of bootstrap paramters:
C1 = C2 = 1 F ceramic capacitor,
图 2. 推荐的 MCU 接口和自举电路及其参数
注:
1.
2. 自举电路的参数取决于 PWM 算法。上述为开关频率为 15 kHz 时的参数的典型例子。
3. (虚线显示部分)每个输入端的 RC 耦合 (R 和 C ),可用于防止由浪涌噪声产生的错误输入信号。 SPM 的信号输入与标准 COMS 或 LSTTL 的输出兼容。
R
是根据应用电路板布局得出的模拟值。(请参考用户指导手册 SPM7 系列)
θJCB
®
5
5
4. 印刷电路板图形中的粗线应尽量短且粗,以减少电路中的寄生电感,从而导致浪涌电压的降低。
©2013 飞兆半导体公司
FSB70250 Rev. 1.3
5
www.fairchildsemi.com
1
0 0 % I D
1 2 0 % I D
t r r
I r r
V
I D
I D
V
D
D
S
S
V
I N
V
I N
t D
t D
( O
N )
( O
F F )
t O
N
t O
F
F
V
V
I N ( O F F )
9 0
%
I D
1 0 % I D
I N ( O
N
)
1
0
%
I D
9
0 % I D
( b ) T u r n - o f f
( a ) T u r n - o n
图 3. 开关时间的定义
5-V
Line
15-V
Line
ID
VDD
HIN
LIN
VB
HO
VS
LO
L
VDC
+
VDS
-
/Fo
VTS
COM
图 4. 开关测试电路 (低端)
Input Signal
UV Protection
Status
RESET
DETECTION
RESET
UVBSR(DDR)
High-side/Low-side
UVBSD(DDD)
MOSFET Drain Current
Fault Output
(Only Low-side UV protection)
图 5. 欠压保护
©2013 飞兆半导体公司
FSB70250 Rev. 1.3
6
www.fairchildsemi.com
Control input
c6
c7
Protection
Circuit state
SET
RESET
Internal MOSFET
Gate-Source Voltage
c4
c3
c2
SC
c1
c8
Output Current
SC Reference Voltage
Sensing Voltage
of the shunt
resistance
CR circuit time
constant delay
c5
Fault Output Signal
图 6. 短路电流保护
(包含外部分流电阻和 CR 连接)
c1 : 正常工作:MOSFET 导通并加载电流。
c2 : 短路电流检测 (SC 触发)。
c3 : MOSFET 栅极硬中断。
c4 : MOSFET 关断。
c5 : 故障输出延时工作启动:故障持续时间 (tFOD)。
c6 : 输入 “L”:MOSFET 关断状态。
c7 : 输入 “H”:MOSFET 导通状态,但是在故障输出有效的时间内, MOSFET 不导通。
c8 : MOSFET 关断状态。
Hin
Lin
Ho
Lo
图 7. 互锁功能的时间图
©2013 飞兆半导体公司
FSB70250 Rev. 1.3
7
www.fairchildsemi.com
4.0
3.5
3.0
2.5
2.0
1.5
1.0
0.5
0.0
Min.
Typ.
Max.
Typ. 2.57V@125°C
Typ. 2.10V@100°C
125±5°C
100±5°C
Typ. 1.15V@50°C
50±5°C
0
25
50
75
100
125
150
175
HVIC Temperature, THVIC [°C]
图 8. 温度曲线 V vs. T
TS
HVIC
VS(W)
VS(V)
VS(U)
P
U
OUT(UH)
C
1
VB(U)
VB(V)
VB(W)
VB(U)
VB(V)
VB(W)
VS(U)
OUT(VH)
VS(V)
V
M
VDC
C
3
15V
OUT(WH)
VS(W)
VDD
VDD
5V
W
Nu
Nv
C
2
COM
COM
R
5
OUT(UL)
OUT(VL)
/Fo
IN_UH
/Fo
UH
VH
WH
UL
IN_VH
IN_WH
IN_UL
IN_VL
IN_WL
MCU
R
3
VL
WL
C5
C
8
VTS
Vts
OUT(WL)
Cfod
Csc
Cfod
Csc
Nw
C4
C7
R
2
C
6
图 9. 应用电路实例
注:
1. Motion SPM 7 产品和 MCU 的每个输入端的 RC 耦合 (R 和 C ,R 和 C )和 C , C , C , C ,能有效的防止由浪涌噪声产生的错误的输入信号。
®
5
5
2
6
1
5
7
8
2. 为避免浪涌电压和 HVIC 故障,接地线和输出端子之间的接线应短且粗。
3. 所有的滤波电容器应紧密连接到 Motion SPM 7 产品,它们应当具有能够很好的阻挡高频纹波电流的特性。
©2013 飞兆半导体公司
FSB70250 Rev. 1.3
8
www.fairchildsemi.com
0.10
C
A B
0.75
0.55
0.65
3 4
(9X)
1
2
5
6
7
8
9
10 11 12
13
6.45
5.85
5.60
5.05
4.50
27
26
5.80
4.75
3.90
14
15
0.40
(26X)
8a
0.20
2.85
2.25
2.05
(1.15)
1.85
1.55
1.15
25
24
(1.50)
24a
(1.60)
23a
1.00
0.60
16
16
0.45
0.00
0.15
0.20
0.30
23
0.65
0.80
1.20
1.10
2.25
2.65
2.50
2.75
2.90
17
17
22
22
4.05
4.45
4.90
5.60
6.10
6.45
4.40
5.95
22
22
21
21
20
20
19
18
18
0.35
0.15
(6X)
0.35
0.15
(4X)
1.65
1.45
BOTTOM VIEW
SCALE: 2:1
13.00
12.80
A
PKG
C
L
B
22
21 21 20 20
19
18 18
22
0.10 C
1.40
22
22
17
17
1.20
13.00
12.80
16
16
23a
0.08 C
C
C23
L
PKG
24a
0.05
0.00
0.30
0.20
24
25
SEATING
PLANE
15
14
8a
26
27
SCALE: 2:1
1
2
3
4
5
6
7
8
9 10 1112
13
PIN 1
QUADRANT
TOP VIEW
SEE DETAIL 'A'
0.10 C
1.40
1.20
FRONT VIEW
0.35
0.55
20
22
21
21
20
19
18 18
6.88
22
6.13
4.40
6.13
5.58
4.88
4.48
4.05
0.35
TYP
22
22
17
17
2.73
2.48
2.65
2.23
1.55
24a
1.65
23a
1.23
0.80
0.98
0.20
0.00
0.70
16
16
23
0.65
0.48
0.60
1.03
24
25
1.05
1.15
1.53
1.85
2.03
2.23
2.88
3.42
3.88
15
14
1.11 (9X)
8a
26
27
4.50
5.08
4.78
5.58
5.78
6.23
6.88
5.85
0.35
1
2
3
4
5
6
7
8
9
10 11 12
13
0.65
TYP
0.30
LAND PATTERN
RECOMMENDATION
SCALE: 2:1
NOTES: UNLESS OTHERWISE SPECIFIED
A) THIS PACKAGE IS NOT PRESENTLY
REGISTERED TO ANY STANDARD
COMMITTEE.
B) DIMENSIONS DO NOT INCLUDE BURRS OR
MOLD FLASH. MOLD FLASH OR BURRS DOES
NOT EXCEED 0.10MM.
C) ALL DIMENSIONS ARE IN MILLIMETERS.
D) DRAWING CONFORMS TO ASME Y14.5M-1994.
E) LAND PATTERN REFERENCE:
QFN65P1290X1290X140-40N-40N
F) DRAWING FILE NAME: MKT-PQFN27AREV3.
G) IT IS NOT NECESSARY TO SOLDER 23a AND
24a, AND CAN BE OMITTED FROM THE
FOOTPRINT
H) FAIRCHILD SEMICONDUCTOR
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