FSL336LRN [ONSEMI]
650V 集成电源开关，带误差放大器，无偏置绕组，用于 9W 离线反激转换器;
| 型号： | FSL336LRN |
| 厂家： | 
ONSEMI |
| 描述： | 650V 集成电源开关，带误差放大器，无偏置绕组，用于 9W 离线反激转换器 开关 放大器 电源开关 光电二极管 转换器 |
| 文件： | 总14页 (文件大小：499K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
DATA SHEET
www.onsemi.cn
ൂᰁꢀ onsemi ℝꢁꢂꢃ
FSL336LR
PDIP−7 (PDIP−8 LESS PIN 6)
CASE 626A
ꢄᫀ
®
FSL336LRꢀꢀᏰꢁඝꢂЖ
ࡈ
(PWM)ꢀ٬
SENSEFET ，ꢁꢂᲗ ✈ᣠ᮸ঔꢃŔ▨ሇ்ҋএℝի、ԧℝ
ի٬
∮Ⅴҋ֭↠ჯრ ͓ꢀ⁰ (SMPS)ꢀᚎᙱ。ᚵᚎ૧ꢀᏰf▨ꢀիѿ╧ꢂ
ࡈ
，ईẁ ᣩᩕ҉ȯիথঔŔእΕ⛻࿅ļ。⛰ꢄͥ᮸ᢸොଇ
ࡈ
ί֭ ጵɟꢀᢿŔ᮸̣
ࡈ
ꢃ。 PDIP7 MINUS PIN 6 GW
CASE 707AA
ꢀᏰŔ PWMꢀᖇЖ
ࡈ
ӥᓌ：✈nៀ᮸ȯիꢀᢿŔ 10 Vꢀꢂ ࡈ
、ᴀիῑൺ (UVLO)、ЭẟὨⅠ- (LEB)、øӶŔ᧥ᥡො /ꢀ ͓ឍ╁҈
ࡈ
、EMIꢀፀίࡈ
、⋍͓ឍ (TSD)、✈n▏ᢿጵɟŔꢁ ႆጵɟ
ގ
ඦꢀἡ⁰٬ᜥ
Ⅼƽᒄꢀᢿ。ƽᒄѿ்ӥᓌ：᪗ᩍƽᒄ (OLP)、᪗իƽᒄ (OVP)ꢀ
٬֭
რᢿƽᒄ (FB_OLP)。FSL336LR ई؏҈ᖰŻിଢ଼Ŕᨿ؏҈ሇ்。
MARKING DIAGRAM
$Y&Z&2&K
L336LR
ͥ᮸▨ի؏҈რ͓
٬Ցֱᰁჯ
᪠ጜş✈ᥡĮŔ࿅ļꢀἡℝĮ fᅥᤚᰁჯ⛻Ŕѿꢂ。ণ᠏，ᩣͅꢀիꢂ 230 V ꢀ៖，ୢ
AC
ẁᣩ᮸ȯի，ѿꢂ
்А 120 mW，ୢᣩ᮸ȯի，ѿꢂ ¥ꢂ 25 mW。
$Y
&Z
&2
&K
= Logo
= Assembly Plant Code
= 2−Digit Date Code
= 2−Digits Lot Run Traceability Code
ꢅ
LR336LR = Specific Device Code
•ꢅͥਾ↺༉ૠ✈ SENSEFET：650 V
•ꢅ
ࣚ
ൺ࿅ļ⍡╧：50 kHz •ꢅៀᩍѿꢂ：
ORDERING INFORMATION
See detailed ordering and shipping information on page 11 of
this data sheet.
<25 mW (230 V ៖，ᣩ᮸ȯի)
AC
<120 mW (230 V ៖，ៀ᮸ȯի)
AC
•ꢅៀ⇐ᩕ҉ȯիথঔ
•ꢅᖰŻ⍡╧ꢂЖѿ்，
ί EMI ᩠ •ꢅꢁΒ℠ἡ
•ꢅᡕĮ᪠ጜꢀἡ：250 mA
•ꢅͥਾᨿ
؏҈٬؏҈ꢀ
ᢿ •ꢅ
ꢂ໐Ȝ℠ἡ •ꢅͥਾᢸො（ᚿ࿎）ଇ
ࡈ
•ꢅᖰŻ
פ
ҝƽᒄ：᪗ᩍƽᒄ (OLP)，᪗իƽᒄ (OVP)，֭რᢿƽ ᒄ (FB_OLP)，⋍͓ឍ (TSD)
•ꢅ
ࣚ
ൺŔ 650 ms Ო؏៖，✈n൩͈҈Ო؏ᐠᣩƽᒄѿ் • These Devices are Pb−Free, Halide Free and are RoHS Compliant
ꢆ✈
•ꢅ✈nඖ✈ꢀ
ࡈ
٬࿅
✊ၴ✈Ŕ SMPS •ꢅ✈ļᩕ҉ꢀ⁰Ŕრ͓ꢀ⁰
© Semiconductor Components Industries, LLC, 2013
1
Publication Order Number:
November, 2022 − Rev. 2
FSL336LRCN/D
FSL336LR
ꢆ✈ꢇꢈ
+
+
DC
OUT
_
VCOMP
Drain
VFB
HV−DC
INPUT
ILIMIT
VCC
Drain GND
HV−DC
INPUT
DC
OUT
_
ꢈ 1. ℝꢁᨼꢉꢊꢆ✈
ꢈ 2. ∮Ⅴҋꢋ↠ꢀᨼꢉꢊꢆ✈
ꢇꢈ
Drain
6, 7
V
CC
2
10 V HV
REG
Internal
Bias
V
Good
CC
V
V
BIAS
START
/ V
STOP
Transconductance
Amplifier
V
4
FB
V
/V
Green−
Mode
BURH BURL
OSC
Controller
V
BIAS
V
REF
Q
Q
S
R
I
PK
Gate
Driver
3R
R
PWM
Soft−
Start
LEB
I
3
5
LIMIT
650 ms
Protection
Timing Control
R
SENSE
V
COMP
40 ms
Delay
1
GND
V
OLP
V
CC
TSD
V
FB
V
OVP
V
FB_OLP
ꢈ 3. ꢌ᮸ꢇꢈ
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2
FSL336LR
ꢍ௪ᰝਾ
GND
VCC
Drain
Drain
7DIP
7LSOP
ILIMIT
VFB
VCOMP
ꢈ 4. ꢍ௪ᰝਾ
ꢍ௪ꢎꢏ
ꢍ௪ꢐ
ꢑӀ
ꢄᫀ
1
2
GND
ꢀꢁ。ꢀꢀꢁꢂꢁꢃꢄꢂꢅꢃꢆ SENSEFET ꢇꢈꢁ。
V
CC
ꢂꢃꢄꢅꢄꢆꢇꢈ。ꢉꢊꢋꢄꢌꢇꢍꢎͅ，ꢄ؏҈ꢂԃᇡ᪠ጜᖰŻꢁꢃ࿅ļꢌἡ。ईẁᣩꢃȯիꢌᢿꢆእΕ⛻，ꢉ
ꢊꢋꢌի᪗ꢁꢃ▨իꢌἡꢇ፻ᛓꢄ10 V (֢ᒑ
ࣞ
3ꢅ)。ᄳꢃȯի▨n10 Vꢅ៖，ꢉꢊꢋё✈ꢁꢃ▨իᛓࡈ
ၖℝĮ ѿ૧。
3
4
I
ꢉꢊꢋꢌ。ᛓ SENSEFETꢅꢆ໐Ȝ℠ἡ。ꢁꢃ 50ĂmAꢅꢌἡꢇἡ᪗⛰ꢆꢁꢃ 46 kW (3R + R)ꢅꢌℋ⛾ꢉꢊꢋꢃᖅА
GND ꢆÛĵꢃꢌℋꢆၖତঔ
ר
，Å̾ൺ໐Ȝꢌἡ℠ꢂ。 LIMIT
V
FB
ꢍꢎꢄꢆ。ᢸොଇ
ࡈ
ꢆ֭Ljꢎͅ。ꢉꢊꢋ᪗nVCOMPꢊꢋꢎϚꢌἡ᥅ꢄꢂᨼᕂࡈ
ꢎϚꢌի，ꢉꢌἡ⛾֢ꢌի⛾ ট᪗ꢃꢌℋϦի
ꢆꢎϚꢌի+࿎Ᏸꢍᶴ。 5
V
COMP
ꢏꢐꢄꢆ。ᢸොଇ
ࡈ
ꢆꢎϚ。ጵɟਡবਾई V ꢅꢂ GNDꢅꢊꢋ+，Åൾ▐ԃൺሇꢂിଢ଼ꢆ҈ᇡሇ்。
COMP
6, 7
Drain
ꢑꢃ。▨իѿ╧ SENSEFETꢅ⃯ꢈᖅ。ᵄ，ई؏҈ꢂԃᇡ᪠ጜ，ꢁꢃ▨իꢌἡꢇᖰŻꢁꢃȯիၖꢄᖅА
ꢊꢋꢆꢃꢌ
ࡈ
̥ꢌ。⛰ំ V ꢅА8 V，ᐠᣩꢁꢃᰁषᯍ፻↠Ἓ。ꢁꢃ▨իꢌἡꢇꢈई V ꢅА10 Vꢅ៖ᐭ V
CC
CC
CC
ú፻؏✈。⌖
，ꢁꢃ▨իᛓࡈ
ൺොꢂ͓ឍ，®şV ꢅৄᓡई 10 V。 CC
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3
FSL336LR
ভꢒꢓꢔ⍭ꢎꢕ(ℴ∮
׆
ᣩᛄ，T = 25°C。) A
ꢐ ꢖꢗ
ꢓꢘꢕ
ꢓꢔꢕ
ꢙꢚ
V
V
DS
⃯ꢈꢊꢋꢌի
ꢌꢇꢌի
−0.3
−0.3
−0.3
−0.3
−0.3
−
650.0
V
CC
26.0
V
V
COMP
V
COMP
ꢊꢋꢌի
ꢁꢃ
٭
ĭꢌի(Ỉ 1) V
V
֭ꢌի
12.0
12.0
12
V
FB
LIMIT
I
℠ἡꢊꢋꢌի
Β⃯ꢌἡ (Ỉ 2)
ԵΒ↺༉்Ჟ (Ỉ 3)
ማѿ૧
V
I
A
DM
E
AS
−
230
1.25
125
150
150
mJ
W
°C
°C
°C
P
D
−
T
J
−40
−
࿅ļণꢏ (Ỉ 4)
ᣠଇণꢏ
T
STG
സʈꢏႆ
−55
Product parametric performance is indicated in the Electrical Characteristics for the listed test conditions, unless otherwise noted. Product
performance may not be indicated by the Electrical Characteristics if operated under different conditions.
(֢ᚡᝧ)
ℴ∮
׆
ᣩᛄ，“ꢌᷴሇ”ጸꢇϷϚꢆ᠏ᐠϷἫᚥÖ⛻ꢆڡ
ሇ்֢ᝐ。ୢई⛽
Ö⛻᪠ጜ，ڡ
ሇ்
்⛾“ꢌᷴሇ”ጸ ꢇᐠϷሇ்֢ᝐ⛽⛰ೄ。
1.
2. Ო૭⍭ൺȜ：Βඝႆַ℠nᣠଇণꢏ。
V
ꢐꢁꢃ
٭
ĭlꢈٱ
᪫ጜ٭
ĭ(11 V、I < 100 mA)
COMP
CLAMP_MAX
3. L = 51 mH，؏҈T = 25°C。
J
4. ᅍ⌖ᵄ֢ᝐƽᚑ IC ࿅ļ，Ħ⛽ƽᚑᐠᣩꢌᷴሇ。
⋍ℋἫᚥ (ℴ∮
׆
ᣩᒔൺ，؆ϹT = 25°C。) A
ꢐ ꢖꢗ
ꢗꢕ
ꢙꢚ
q
ণೃ▏⋍ℋ (Ỉዯ 5)
100
°C/W
JA
5. JEDEC ᖈภ▏，JESD51-2 ꢂἫᚥᥟ JESD51-3，͗ᣩᣠ෯⋪ƨꢑ。
∩ꢀꢛꢀ (ESD) ்ꢜ
ꢐ ꢖꢗ
ijᰁ५，ANSI/ESDA/JEDEC JS-001-2012 (Ỉ 6)
̥ꢌ
ࡈ
Öᰁ५，JESD22-C101 (Ỉ 6) ꢗꢕ
ꢙꢚ
ESD
4
2
kV
6. АJEDEC ᧧ΦANSI/ESDA/JEDEC JS-001-2012 ꢂ JESD 22-C101。
ꢀᷴꢅ(ℴ∮
׆
ᣩᛄ，؆ϹT = 25°C。) A
ꢐ ꢖꢗ
ꢝļÖ
ꢓꢘꢕ ͘५ꢕ ꢓꢔꢕ
ꢙꢚ
SENSEFET ᮸Ϧ
BV
⃯ꢈ－ꢇꢈϛՏꢌի
V
CC
V
DS
V
GS
V
GS
V
GS
V
GS
V
DD
V
DD
= 0 V, I = 250 mA
650
−
−
−
−
250
4.0
−
V
DSS
D
I
⇆᧥ꢈꢌի⃯ꢈꢌἡ
⃯ꢇꢈොꢌℋ
ꢎͅꢌ
= 520 V, T = 125°C
mA
W
DSS
A
R
DS(ON)
= 10 V, I = 1 A
−
3.5
290
45
5.5
22
19
D
C
ISS
= 0 V, V = 25 V, f = 1 MHz
−
pF
pF
pF
ns
ns
DS
C
ꢎϚꢌ
= 0 V, V = 25 V, f = 1 MHz
−
−
OSS
RSS
DS
C
֭
ױ
Āꢎꢌ ꢃԧ៖
= 0 V, V = 25 V, f = 1 MHz
−
−
DS
t
= 350 V, I = 3.5 A
−
−
r
D
t
⛻ℝ៖
= 350 V, I = 3.5 A
−
−
f
D
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4
FSL336LR
ꢀᷴꢅ(ℴ∮
׆
ᣩᛄ，؆ϹT = 25°C。) (ᖅꢃ⍅) A
ꢐ ꢖꢗ
ꢝļÖ
ꢓꢘꢕ ͘५ꢕ ꢓꢔꢕ
ꢙꢚ
ᖇЖ᮸Ϧ
f
რ͓⍡╧
V
V
V
V
= 2.5 V
45
−
50
3
55
−
kHz
kHz
ms
OSC
COMP
COMP
COMP
COMP
f
M
⍡╧ᛓꢂ(Ỉ 7)
ᣠଇො៖
UVLO ⃘Ȝꢌի
= 2.5 V ៖，⅟ᤚ᪫ጜ⍡╧ᛓꢂ
t
= 2.5 V
11.2
7.2
6.3
35
7
13.3
8.0
7.0
50
15.4
8.8
7.7
65
on.max
V
START
= 0 V ៖，V ᑋ⍡
V
CC
V
STOP
ො
V
I
t
ꢌἡ℠ꢂꢇꢌἡ
ᨿ؏҈៖
V
V
= 2.5 V
= 2.5 V
mA
ms
PK
COMP
10
13
SS
COMP
ᴧᰁꢀ᮸Ϧ
V
ᴧᰁჯ▨⃐Ȝꢌի
ᴧᰁჯĮ⃐Ȝꢌի
ᴧᰁჯ₾
ࢾ
V
V
= 15 V, V
ꢃԧ
0.58
0.52
−
0.65
0.59
60
0.72
0.66
−
V
V
BURH
CC
COMP
V
= 15 V, V
ℝĮ
BURL
CC
COMP
HYS
mV
BUR
ƽᒄ᮸Ϧ
I
໐Ȝ℠ἡ
V
V
= 2.5 V, di/dt = 1.2 A/ms
1.6
−
1.8
200
3.0
2.0
−
A
ns
V
LIM
COMP
t
℠ἡზ (Ỉ 7)
᪗ᩍƽᒄ
CLD
V
ꢃԧ
2.7
−
3.3
−
OLP
LEB
COMP
t
ЭẟὨⅠ៖ (Ỉ 7)
FB რᢿƽᒄ
200
0.5
ns
V
V
V
V
ℝĮ
0.4
23.0
125
−
0.6
26.0
150
−
FB_OLP
FB
V
᪗իƽᒄ
ꢃԧ
24.5
135
60
V
OVP
CC
TSD
⋍͓ឍꢏႆ (Ỉ 7)
TSD ₾
ꢏႆ (Ỉ 7) ᪗ᩍƽᒄზ៖ (Ỉ 7)
ƽᒄ
Ო؏៖ (Ỉ 7) °C
°C
ms
ms
HYS
TSD
t
V
COMP
> 3 V
−
40
−
DELAY
t
−
650
−
RESTART
ᢸොꢛꢔꢊ᮸Ϧ
G
ᚿ࿎ଇ
ࡈ
ᢸො ꢌի֢֭
ꢎϚꢇꢌἡ
380
2.45
−
480
2.50
−12
12
580
2.55
−
mmho
V
m
V
REF
I
V
V
= V
= V
− 0.025 V
+ 0.025 V
mA
EA.SR
FB
REF
I
ꢎϚ∬ꢌἡ
−
−
mA
EA.SK
FB
REF
▨ꢁᛓꢊ᮸Ϧ
V
▨իᛓ
ࡈ
ꢌի V
COMP
= 0 V, V
= 40 V
9
10
11
V
HVREG
DRAIN
ማꢊÖ᮸Ϧ
I
I
࿅ļꢌꢇꢌἡ (¥ꢄꢂꢃϦ，ៀრ͓᪗ӛ)
࿅ļꢌꢇꢌἡ (რ͓᪗ӛꢇ)
؏҈̥ꢌꢌἡ
0 V < V
< V
−
−
−
−
−
0.25
0.8
6
0.35
1.3
−
mA
mA
mA
mA
V
OP1
COMP
BURL
V
V
V
V
< V
< V
COMP OLP
OP2
BURL
I
= 0 V, V
> 40 V
CH
CC
CC
CC
DRAIN
I
؏҈ꢌἡ
= Before V
, V = 0 V
120
35
155
−
START
START COMP
V
DRAIN
ᣠĮ⃯ꢈꢌꢇꢌի
= V
= 0 V, V
ꢃԧ
COMP
DRAIN
Product parametric performance is indicated in the Electrical Characteristics for the listed test conditions, unless otherwise noted. Product
performance may not be indicated by the Electrical Characteristics if operated under different conditions.
(֢ᚡᝧ)
ℴ∮
׆
ᣩᛄ，“ꢌᷴሇ”ጸꢇϷϚꢆ᠏ᐠϷἫᚥÖ⛻ꢆڡ
ሇ்֢ᝐ。ୢई⛽
Ö⛻᪠ጜ，ڡ
ሇ்
்⛾“ꢌᷴሇ”ጸ ꢇᐠϷሇ்֢ᝐ⛽⛰ೄ。
7. ᅍ⌖ᣩᚎᙱƽᚑ；Ħꢒईꢓꢇ᪫ጜ 100% Ἣᚥ。
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5
FSL336LR
͘५ꢅ்ᅡ
Switching Frequency (f
)
HV Regulator Voltage (V
)
OSC
HVREG
1.15
1.10
1.05
1.00
0.95
0.90
0.85
1.15
1.10
1.05
1.00
0.95
0.90
0.85
−40 −20
0
25
50
75
100 125
100 125
100 125
−40 −20
0
25
50
75
100 125
Temperature (°C)
Temperature (°C)
ꢈ 5. ꢝļ⍡╧⛾ꢁႆŔꢃ
ߋ
ꢈ 6. ▨ꢁᛓꢊꢀꢁ⛾ꢁႆŔꢃ
ߋ
Start Threshold Voltage (V
)
Stop Threshold Voltage (V
)
START
STOP
1.15
1.10
1.05
1.00
0.95
0.90
0.85
1.15
1.10
1.05
1.00
0.95
0.90
0.85
−40 −20
0
25
50
75
−40 −20
0
25
50
75
100 125
Temperature (°C)
Temperature (°C)
ꢈ 7. ؏҈⃘ꢕꢀꢁ⛾ꢁႆŔꢃ
ߋ
ꢈ 8. ȼᵂ⃘ꢕꢀꢁ⛾ꢁႆŔꢃ
ߋ
Burst Mode High Voltage (V
)
Burst Mode Low Voltage (V
)
BURH
BURL
1.15
1.10
1.05
1.00
0.95
0.90
0.85
1.15
1.10
1.05
1.00
0.95
0.90
0.85
−40 −20
0
25
50
75
−40 −20
0
25
50
75
100 125
Temperature (°C)
Temperature (°C)
ꢈ 9. ᴧᰁꢀ▨ꢁ⛾ꢁႆŔꢃ
ߋ
ꢈ 10. ᴧᰁꢀꢞꢁ⛾ꢁႆŔꢃ
ߋ
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6
FSL336LR
͘५ꢅ்ᅡ(ᖅꢃ⍅)
Operating Supply Current (I
)
Feedback Voltage Reference (V
)
OP1
REF
1.15
1.10
1.05
1.00
0.95
0.90
0.85
1.15
1.10
1.05
1.00
0.95
0.90
0.85
−40 −20
0
25
50
75
100 125
−40 −20
0
25
50
75
100 125
Temperature (°C)
Temperature (°C)
ꢈ 11. ꢝļꢀ⁰ꢀἡ 1 ⛾ꢁႆŔꢃ
ߋ
ꢈ 12. ꢋꢀꢁꢖ⛾ꢁႆŔꢃ
ߋ
Transconductance of gm amp (G )
FB Open Loop Protection (V
)
m
FB_OLP
1.15
1.10
1.05
1.00
0.95
0.90
0.85
1.15
1.10
1.05
1.00
0.95
0.90
0.85
−40 −20
0
25
50
75
100 120
−40 −20
0
25
50
75
100 125
Temperature (°C)
Temperature (°C)
ꢈ 13. gm ꢛꢔꢊᢸො⛾ꢁႆŔꢃ
ߋ
ꢈ 14. FB ꢂᢿƽᒄꢀꢁ⛾ꢁႆŔꢃ
ߋ
Overload Protection (V
)
Over−Voltage Protection (V
)
OLP
OVP
1.15
1.10
1.05
1.00
0.95
0.90
0.85
1.15
1.10
1.05
1.00
0.95
0.90
0.85
−40 −20
0
25
50
75
100 125
−40 −20
0
25
50
75
100 125
Temperature (°C)
Temperature (°C)
ꢈ 15. ᪗ᩍƽᒄ⛾ꢁႆŔꢃ
ߋ
ꢈ 16. ᪗ꢁƽᒄ⛾ꢁႆŔꢃ
ߋ
www.onsemi.cn
7
FSL336LR
ꢟ்ᛄꢠ
Drain
؏҈ꢡ▨ꢁԃꢁꢊ
6,7
؏҈，▨իꢂ
ࡈ
Ŕͥ᮸▨իꢀἡ⁰ (I )ꢀᖰ Green−
Mode
CH
OSC
VOUT
VBIAS
Żͥ᮸ȯਾꢀἡ (I
)，ၖ
ױ
ᖅೃ V ꢀჵ௪Ŕ CC
Controller
START
Transconductance
Amplifier
4
VFB
IPK
᮸ꢀ
ࡈ
(C )ꢀ̥ꢀ，ୢࣞ
17ꢀᐠЊ。ᚵͥ᮸▨իꢀἡ A
3R
PWM
LEB
⛰DŽnş்⒖ᇡ，DŽೃꢀV Аꢀ10 V。ԃᇡ᪠ጜ᪗
Gate
Driver
CC
VREF
D2
D1
R
ӛꢆ，ᵄͥ᮸▨իԃի
ࡈ
ꢀ(HV ) ᙹꢀV ꢀৄᓡꢀ10 V
CC
REG
ꢀի，ၖꢂᐠᣩͥ᮸ꢀᢿᖰŻ࿅ļꢀἡ (I )。
ࣀ
ᵄ， ៀ⇐᮸ȯիꢀᢿ。᮸ȯի▨nꢀ10 V ៖，෦ё✈ᚵ
▨իꢂ
ࡈ
。 VCOMP
OP
RSENSE
5
CC1
RC1
CC2
VDC.link
Drain
6, 7
ꢈ 19. ꢥᛓЖ(PWM) ꢀᢿ
ᢸොଇ
ࡈ
(gm ଇࡈ
) VCC
ICH
ᢸොଇ
ࡈ
ŔᩣϚϦЋױ
ꢀV ჵ௪⛺ᖅŔጵɟ
COMP
3
10 V HVREG
ꢀᢿᖰŻ⁰ꢀἡၖᖅ∬ꢀἡꢀ(ꢌ
ࣞ
ꢀ20)。᪗⛾ ꢀꢇֿŔꢀիꢍጜᶴꢎ，ᵄጵɟꢀV ჵ௪ꢀ
ISTART (during startup)
Iop (during steady−state operation)
R
SENSE
CA
COMP
իᖇЖȐრ͓ՀՊᶴ。֭ჵ௪ꢀիᡕ᪗ꢀ2.5 V Ŕͥ
᮸֢ꢀիꢀ(V ) ៖，ᢸොଇ
ࡈ
෦®ጵɟꢀᢿᖅ VBIAS
UVLO
REF
∬ꢀἡ，V
ꢀᒩĮ，ՀՊᶴί෯。ꢏҝእΕဘई
COMP
ᩣͅꢀիᖰ▨ᩣϚᩍℝĮ៖ֱ⛿。ꢂfꢐᅷᣠœ
ᩣ
ϚꢀիᖇЖ٬
ACꢀ҈ᇡ，ლꢑᲗ✈֬ᥡ⊙Եꢒ⊙ጵ ɟਡব。⛰ꢓ᥅ꢔ，220 nF、75 kWꢀ
٬
220 pFꢀϦЋ✈ ꢈ 17. ؏҈ꢡHVREG ᰁꢢ
ꢣัꢊᰁꢢ
ᔏั
ࡈ
⍡╧ͥ᮸ᚎਾ，ᣩ⅟ᤚ⍡╧Ể҈ѿ்。რ͓ ⍡╧ŔỂ҈෦்ᲟϦईᶴꢀEMI Ἣᚥᚎ૧ἫᅷŔဆඝ
ᣔඝŔ⍡╧ී
ࣔ
ͥ，ࣀ
்૿ίꢀΑၒᑐꢀ(EMI)。 EMIꢀℝĮᲟDŽᖅ⛾⍡╧ָӶී
ࣔ
Lj͓。⍡╧ָӶීࣔ
ईͥ᮸
ࣚ
ൺ；⌖，⍡╧ීࣔ
Ŕꢃᓉꢃ᮸֭ꢀի ٬ͥ
᮸↠ᔏัࡈ
͑
⅟ᤚΓൺ。⅟ᤚꢃᓉŔრ͓⍡ ╧෦ꢀEMI
ࡊ
ૐᣩᜨऐϦईრ͓⍡╧ꢄꢅ，ၖ̡ꢆş ✈͗ᣩᏰᤌᜨƚŔꢀዿ
ࡈ
，⛽᠏ἡᩣͅꢀ⁰Ể ࡈ
，᥅ꢇ͈◣ EMI ꢈḢ。 n C 、R
٬
C 。 C2
C1
C1
Sinking current 12 mA
at 2.525 V
I
(A)
EA
+24 mA
−24 mA
Sourcing current 12 mA
at 2.475 V
IDS
several
mseconds
G
m
(mmho)
960 mmho
480 mmho
t
= 1/f
SW
SW
tSW
V
2.45 V
V
2.55 V
V
FB
FB
REF
t
Dt
(2.5 V)
fSW
MAX
t
+ 1/2D f
SW
SW
ꢈ 20. gm ꢛꢔꢊŔꢅ
Β℠ἡ
MAX
t
− 1/2D f
SW
SW
no repetition
ꢃnᲗ✈ꢀἡᰁჯᖇЖ，
ࣀ
ᵄ᪗ PWMꢀᶴꢎࡈ
Ŕ ֭Ljᩣͅ℠Жfἡট SENSEFETꢀŔ໐Ȝꢀἡ，ୢ
ࣞ
19ꢀᐠЊ。ȧᚎ 50ĂmAꢀŔ⁰ꢀἡ
ἡটͥ᮸ꢀꢉ (3R + R = 46 kW)，Ϲlᥡ
ٱ
D2ꢀŔꢕᥡꢀիॶꢂ several
miliseconds
t
ꢈ 18. ⍡╧Ể҈Ểꢤ
2.4 V。ꢃn V
ꢀᡕ᪗ 2.4 Vꢀ៖ D1ꢀַꢉ，ᐠÅ D2
Ŕ ᣠ ଇ ꢕ ᥡ ꢀ ի ෦
٭
ĭ ई ᵄ ꢀ ի Ȝ 。 ࣀ
ᵄ ， COMP
ꢋᖇЖ
SENSEFET Ŕꢀἡ໐Ȝ෦ַА℠Ж。
FSL336LR Თ✈ꢀἡᰁჯᖇЖ，෦ᢸොଇ
ࡈ
✈n ֭ᖇЖ，ୢ
ࣞ
ꢀ19ꢀᐠЊ。ဘईꢀV ჵ௪⛺ş✈ꢇ FB
ЭẟὨⅠ (LEB)
ꢄꢀꢉ᥅᪠ἫᩣϚꢀի。ᖈꢊईꢀV
ჵ௪⛺ᖅ
COMP
ईͥ᮸ SENSEFETꢀොŔɼ，֭↠ჯၴ✈ꢆϽॷ
ֿꢀ٬ᴁॷֿἡ
lᥡٱ
Ŕ֭ױ
ቂ૭、ℝիၴ✈Ŕ ঽἡlᥡ
ٱ
֭ױ
ቂ૭Å֪͖ൣඤ⛿ꢀဘúොꢖ▨ ᮸ጵɟꢀᢿ，®ᖇЖᩣϚꢀի。ͥਾᢸොଇ
ࡈ
Å
ގ
̾ᖇЖᩣϚꢀի，✄ៀ⇐᮸ঔꢃ，ūୢꢋঃl ᥡ
ٱ
٬ᡖ
ijٱ
。 www.onsemi.cn
8
FSL336LR
VCC
ꢀἡ໐᪗ SENSEFET。ዿἫꢀꢉ (R
)ꢀꢇֿŔ
SENSE
᪗ଇꢀիúොꢖꢀἡᰁჯᖇЖꢆϚ▐⛽ᵃ̾Ŕ֭᪠
ጜ⒖Ε。ꢂfᒕὨꢏҝᜨၴ， FSL336LRꢀᲗ✈fЭẟ
ὨⅠ (LEB)ꢀꢀᢿ (ꢌ
ࣞ
19)。SENSEFETꢀො
，ᵄꢀ HVREG
VSTART
VSTOP
20 ms
IDS
40 ms 650 ms
Normal
with SS
SS 40 ms 650 ms
ᢿ෦ईʽ៖ͥᑱЖ PWM ᶴꢎ
ࡈ
(t )。
LEB
ƽᒄꢀᢿ
ƽᒄѿ்ӥᓌ᪗ᩍƽᒄ (OLP)、᪗իƽᒄ (OVP)、
ᴀիῑൺ (UVLO)、֭რᢿƽᒄ (FB_OLP)ꢀ
٬⋍
͓ ឍ (TSD)。ᐠᣩꢏ{ƽᒄѿ்ꢗई҈Ო؏ᰁჯ⛻࿅
ļ。ꢃnꢏ{ƽᒄꢀᢿꢗ൬͈ꢀᏰई ICꢀꢆ，ៀ⇐Û
ĵ᮸̣ꢃ，
ࣀ
ᵄ்૿ई⛽ҀᏰᤌ٬
PCBꢀՊŔእ Ε⛻ᖰ▨
ꢘሇ。ୢϚ▐ᜥⅬእΕ，რ͓෦ঘᵂ， ✄ SENSEFETꢀƽᓡ͓ឍ。
៖ꢙú↠Ἓͥ᮸ƽᒄᙱ៖ ᖇЖ，ÅƟℝĮ҈Ო؏᪗ӛꢆ
ៀ⁰٬ᣩ⁰
̣ࡈ
ꢃ⛺ Power on
Overloading
Overloading Overloading
Stops
Overloading
Stops
ꢈ 22. ᪗ᩍƽᒄ(OLP) Ểꢤ
⋍͓ឍ (TSD)
SENSEFET
٬ᖇЖ
IC ꢀᏰई
⛰ꢞꢆយƟf᪠Ἣ SENSEFETꢀŔꢁႆ。ণꢁᡕ᪗ 135°Cꢀ៖，෦↠Ἓ⋍͓
ឍ。ꢁႆℝೃ 60°C ៖，෦Ო؏ FSL336LR。
Ŕѿꢂ٬ၴѻ
。ͥ᮸ƽᒄᙱ៖ᖇЖ↠Ἓ៖，V ꢀ෦ CC
᪗ͥ᮸▨իԃի
ࡈ
ꢂꢂ 10 V，DŽАঘᵂრ͓。ꢏҝ ͥ᮸ƽᒄᙱ៖ᖇЖú⛰DŽᓡঽАᲝ؏៖ (650 ms)ꢀণ
。ᙱᝐА 650 msꢀ៖，෦ё✈ͥ᮸▨իꢂ
ࡈ
ၖℝĮ ᪗ꢁƽᒄ(OVP)
ୢᣩÛĵ֭▏ᢿঔꢃ
ࣀ
ꢂ⋪ᖅਊꢟϚ▐ᜥ V
。V ꢀА UVLOꢀȼᵂꢀի V
(7 V)ꢀ៖，෦
STOP
૭ĭƽᒄѿ்，ͥ᮸▨իꢀἡ⁰ͭᴁ᪗⃯ᥡჵ௪
ױ
CC
CC
Ⅼ， V
ꢀ෦Å
Ĝn᪗ᩍእΕŔយჯᛠԧ，® COMP
ොꢖᄚЖ
ױ
SMPSꢀᖰŻᣠଇꢀἡ，DŽАꢠֱ OLP。ꢏ ҝእΕ⛻，ꢃn
ױ
ᩣϚֿᖰŻf᪗ଇ்Ჟ，ई OLPꢀ↠ Ἓ+Э，ᩣϚꢀի
்ฑᡕϚfꢝൺꢀի。ꢂꢡᵂϚ ▐ꢏҝ▐ꢢ，Თ✈f᪗իƽᒄ (OVP)ꢀꢀᢿ。⛰ꢓ
V
V
ꢀꢀ
ࡈ
̥ꢀ。ᄳ V ꢀА UVLOꢀ؏҈ꢀի， CC
CC
(8 V)ꢀ៖，ቂ૭ᵃဘᚭļ。᪗ꢏҝយჯ，
START
҈Ო؏ѿ்
Åᣟş்٬ё✈ѿ╧
SENSEFETꢀŔრ ͓，DŽАὨꢚᜥⅬꢃ。
ꢣ，
᪗ V ꢀơᖇᩣϚꢀի，ᄳ V ꢀᡕ᪗ 24.5 V CC
CC
᪗ᩍƽᒄ (OLP)
៖，෦ꢠֱ OVP，ꢍොꢖრ͓ᚭļঘᵂ。ꢂꢛ̭ई
᪗ᩍൺ)ꢂᩍꢀἡ
ࣀ
ዯkꢃᡕ᪗ᚎൺȜ。ꢏ ҝእΕ⛻，ၴᚵ↠Ἓƽᒄꢀᢿ，®ƽᒄ SMPS。⌖
，Փş SMPSꢀᵃဘ࿅ļ，OLPꢀꢀᢿ?úईᩍɼᇡ
؏҈ꢍͅş்⒖ᇡ。ꢂfꢛ̭Ϛ▐ꢏҝ⛽ᆥꢈ
Ŕ࿅ļ⒖Ε，ͥ᮸
ࣚ
ൺზꢜ (40 ms)ꢀꢀᢿ෦̾ൺꢏ᠏ ɼᇡእΕꢙ᠏ǯᵃŔ᪗ᩍእΕ (ꢌ
ࣞ
21)。ꢀἡᰁჯ֭ ᢿᅤú℠Жᣠଇꢀ⁰ᩣϚꢀἡ，⛰ំᩣϚֿѿꢂᡕ
ᵃဘ࿅ļ↠Ἓ OVP，V ꢀၴᚵᚎᙱꢂĮn 24.5 V
(֢ꢌ
ࣞ
23)。 CC
OSC
OVP
S Q
3R
PWM
Gate
Driver
LEB
Q
R
R
ϚᵄᣠଇȜ，ᩣϚꢀի (V )ꢀ෦ℝೃ͖ꢝൺꢀիÅ⛻。
O
ꢏᨗúℝĮ֭ჵ௪ꢀի，®ᖰ▨ͥ᮸ᢸොଇ
ࡈ
VCC
RSENSE
2
OVP
ŔᩣϚꢀἡ。ᣠঘ V ꢀ⅟+ᖰ▨。V ꢀА 3 V
COMP COMP
VOVP
៖，෦↠Ἓͥ᮸
ࣚ
ൺ OLPꢀზꢜ (40 ms)。ईᵄზꢜ+
，რ͓ᚭļ෦ঘᵂ，ୢࣞ
22ꢀᐠЊ。 ꢈ 23. ᪗ꢁƽᒄꢀᢿ
ꢋꢂᢿƽᒄ(FB_OLP)
Ϛ▐֭▏ᢿᜥⅬ៖，ค͖᠏֭ჵ௪ŔʽᢿĮƇ
OSC
OLP
S Q
3R
PWM
Gate
Driver
ꢀꢉ，⛽¥ V ꢀúÅ
Ĝn᪗ᩍእΕŔយჯԧ COMP
LEB
Q
R
R
▨，V ꢀ?რℝೃ ICꢀᖅऐꢀၓ。ฝ
ٱ
OLPꢀ٬
OVP FB
VCOMP
?்ईꢏҝእΕ⛻ƽᒄ SMPS，Ħ FB_OLPꢀ
ÅℝĮ SENSEFETꢀ⛺Ŕၴѻ。ୢẁᣩ FB_OLP，ई OLPꢀ
OVPꢀꢠֱ+Э，ᩣϚꢀիฑ࿒টꢤꢤ▨nꢝൺꢀի。
RSENSE
5
40 ms
Delay
OLP
VOLP
V
ꢀℝೃ 0.5 VꢀÅ⛻៖，෦↠Ἓ FB_OLP，®ঘᵂ
რ͓ᚭļ。ꢂꢛ̭ई؏҈Ϛ▐⛽ᆥꢈŔ↠Ἓ▐
FB
ꢈ 21. ᪗ᩍƽᒄꢌ᮸ꢀᢿ
ꢢ，ईᨿ؏҈ᵄѿ்únё✈⒖ᇡ。
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9
FSL336LR
V
O
OSC
FB_OLP
set
V
O
S
R
Q
Q
3R
PWM
VOUT
Gate
Driver
LEB
R
RH
VFB
V
COMP
RSENSE
4
FB_OLP
RL
V
BURH
VFB_OLP
V
BURL
ꢈ 24. ꢋꢂ▏ƽᒄꢀᢿ
I
DS
ᨿ؏҈
ͥ᮸ᨿ؏҈ꢀᢿ؏҈
，úৣፂᖰ▨ SENSEFETꢀꢀ ἡ。͘५ᨿ؏҈៖ꢂ 10 ms，ୢ
ࣞ
25ꢀᐠЊ，؏҈᪗ ӛꢆ̡ꢆ SENSEFETꢀꢀἡꢥ。ᩣͅѿ╧რ͓
ࡈ
ꢃŔꢁඝҀ，®ლ֛
ר
ָիࡈ
、ꢀዿࡈ
٬
ꢀ
ࡈ
Ŕᵃ̾࿅ļꢃ。ᩣϚꢀࡈ
⛺Ŕꢀի Ҁ，®ꢦꢄऐლ֛ᐠ⇐ŔᩣϚꢀի。ᨿ؏҈?ᣩ҉
nꢡᵂָի
ࡈ
ꢧ٬
，ၖℝĮᴁॷlᥡٱ
⛺Ŕၴѻ。 V
DS
time
Switching
disabled
Switching
disabled
1.25 ms
t1
t2 t3
t4
ILIM
ꢈ 26. ᴧᰁꢀꢝļ
ൂᰁꢀ᪠ጜ
Soft−start envelope
⅟ȐᩣϚᩍꢃί，რ͓ᔿꢂúָꢂᣠଇŔѿ
╧ᔿꢂ
ࣀ
߰。FSL306LRꢀЉ✈ V ꢀჵ௪ꢀիơᖇᩣ COMP
Ϛᩍꢃ。⅟ȐᩣϚᩍί෯，V
რ͓⍡╧?⛻ℝ，ୢ
ࣞ
27ꢀᐠЊ。⛰ំ V ℝೃ 0.8 V，ꢍͅᴧᰁჯЭრ͓⍡╧úई 21 kHzꢀ
٬
23 kHzꢀ+ָӶ。ईᴧᰁჯ⛻，⅟ᤚ⍡╧Ể҈ꢈ⌖
സई。
ꢀ?úℝĮ，
ꢀ⛻
COMP
0.2ILIM
COMP
Drain Current
t
8−Steps
ꢈ 25. ꢌ᮸ᨿ؏҈
Random Frequency
modulation range
Switching frequency
53 kHz
ᴧᰁꢀ᪠ጜ
ꢂᣠଇӛႆऐℝĮᅥᤚᰁჯ⛻Ŕѿꢂ，FSL336LR
úꢍͅᴧᰁჯ。⅟ȐᩍℝĮ，COMPꢀჵ௪ꢀի
47 kHz
(V
)?úℝĮ。ୢ
ࣞ
26ꢀᐠЊ，֭ꢀիℝೃ ꢀÅ⛻៖，
ࡈ
ꢃ҈ꢍͅᴧ᪠ጜᰁჯ。ᵄ៖， COMP
V
BURL
რ͓ᚭļ෦ȼᵂ，ᩣϚꢀիრℝĮ，ℝĮŔꢨ╧ֶ
Γnᅥᤚꢀἡᩍ。ꢏúොꢖ V ꢀԧ▨。⛰ំᵄ
COMP
Ȝᡕ᪗ V
，რ͓ᚭļ෦ቂ૭。V
ꢀ⅟ՓℝĮ，
BURH
COMP
23 kHz
21 kHz
Ო૭⛺ꢩ᪗ӛ。ᴧ᪠ጜᰁჯúᣟş்
٬
ё✈ SENSEFETꢀŔრ͓ᚭļ，ၖℝĮᅥᤚᰁჯ⛻Ŕრ͓ᔿ
ꢂ。
1.9 V
VCOMP
VBURL VBURH 0.8 V
ꢈ 27. ൂᰁꢀ᪠ጜ
www.onsemi.cn
10
FSL336LR
ᛓ℠ἡ
Transconductance
Amplifier
4
V
FB
ୢ
ࣞ
28ꢀᐠЊ，PWMꢀᶴꢎࡈ
Ŕ֭Ljჵ௪⛺ᖅf⛰ ꢄঔ
ר
ჯ 46 kWꢀͥ᮸ꢀꢉ (3R + R)。ᄳͥ᮸lᥡٱ
ꢃ 50ĂmAŔꢉꢀἡ⁰ȯਾ៖，I
V
BIAS
V
REF
ꢀჵ௪⛺Ŕ Rxꢀ᮸ꢀ
LIMIT
I
PK
ꢉᅂᏰf⛾ 46 kWꢀၖꢪŔꢀꢉꢀ。ୢ， FSL336LRꢀŔ͘
५ SENSEFETꢀ໐Ȝ℠ἡꢂ 1.8 A。᪗ई I ꢀჵ௪
PWM
3R
LIMIT
V
COMP
5
3
٬ᖅऐ
+ᖲͅ R ，
෦℠ἡꢂꢂ 1.2 A。ᨙᕎÅ R
X
⛻ؙჯ
ꢊ٧
R ꢀŔȜ： X
I
LIMIT
V
SENSE
1.8 A : 1.2 A + (46 kW ) Rx) : Rx
(eq. 1)
R
X
ꢈ 28. ℠ἡᛓ
ᙲꢦꢧ
͘५ᩣꢪꢟ╧ (Ỉዯ 8)
85 V ೃ 265 V & ꢂꢫꢀ(Ỉዯ 9)
AC
AC
†
ℝꢁꢆ✈ (ꢔ 10)
ꢋ↠ꢀꢆ✈
ꢊÖ५ꢐ
FSL336LRN
FSL336LRLX
ꢝļণꢁ
PKG
7−DIP
ꢨ᎕ꢩẵ
℠ἡ
R
DS(ON),MAX
−40°C~125°C
1.8 A
4 W
9 W
20 W
ꢕ
7−LSOP
ꢖꢂƨ
†For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging
Specifications Brochure, BRD8011/D.
8. ণꢏ
℠ꢂᣠଇꢎϚѿ╧。 9. 50°C a▏ꢏႆ៖რꢗჯᚎᙱꢇꢆᣠଇൾꢘᓡꢙѿ╧。
10. ꢚn15 V ꢆꢎϚꢌիÖ。ꢎϚꢌի
Å℠ꢂᣠଇꢎϚѿ╧。 SENSEFET is registered trademark of Semiconductor Components Industries, LLC dba “onsemi” or its affiliates and/or subsidiaries in the United States
and/or other countries.
www.onsemi.cn
11
MECHANICAL CASE OUTLINE
PACKAGE DIMENSIONS
PDIP−7 (PDIP−8 LESS PIN 6)
CASE 626A
ISSUE C
DATE 22 APR 2015
SCALE 1:1
NOTES:
D
A
1. DIMENSIONING AND TOLERANCING PER ASME Y14.5M, 1994.
2. CONTROLLING DIMENSION: INCHES.
E
3. DIMENSIONS A, A1 AND L ARE MEASURED WITH THE PACK-
AGE SEATED IN JEDEC SEATING PLANE GAUGE GS−3.
4. DIMENSIONS D, D1 AND E1 DO NOT INCLUDE MOLD FLASH
OR PROTRUSIONS. MOLD FLASH OR PROTRUSIONS ARE
NOT TO EXCEED 0.10 INCH.
5. DIMENSION E IS MEASURED AT A POINT 0.015 BELOW DATUM
PLANE H WITH THE LEADS CONSTRAINED PERPENDICULAR
TO DATUM C.
H
8
5
4
E1
1
6. DIMENSION eB IS MEASURED AT THE LEAD TIPS WITH THE
LEADS UNCONSTRAINED.
7. DATUM PLANE H IS COINCIDENT WITH THE BOTTOM OF THE
LEADS, WHERE THE LEADS EXIT THE BODY.
8. PACKAGE CONTOUR IS OPTIONAL (ROUNDED OR SQUARE
CORNERS).
NOTE 8
c
b2
B
END VIEW
WITH LEADS CONSTRAINED
NOTE 5
TOP VIEW
INCHES
DIM MIN MAX
−−−−
A1 0.015
MILLIMETERS
A2
A
MIN
−−−
0.38
2.92
0.35
MAX
5.33
−−−
4.95
0.56
e/2
A
0.210
−−−−
NOTE 3
A2 0.115 0.195
L
b
b2
C
0.014 0.022
0.060 TYP
0.008 0.014
1.52 TYP
0.20
9.02
0.13
7.62
6.10
0.36
10.16
−−−
8.26
7.11
D
0.355 0.400
SEATING
PLANE
D1 0.005
0.300 0.325
E1 0.240 0.280
−−−−
A1
D1
E
C
M
e
eB
L
0.100 BSC
−−−− 0.430
0.115 0.150
−−−− 10°
2.54 BSC
−−−
2.92
−−−
10.92
3.81
10°
e
eB
8X
b
END VIEW
M
NOTE 6
M
M
M
0.010
C A
B
SIDE VIEW
GENERIC
MARKING DIAGRAM*
XXXXXXXXX
AWL
YYWWG
XXXX = Specific Device Code
A
= Assembly Location
= Wafer Lot
= Year
= Work Week
= Pb−Free Package
WL
YY
WW
G
*This information is generic. Please refer to
device data sheet for actual part marking.
Pb−Free indicator, “G” or microdot “ G”,
may or may not be present.
Electronic versions are uncontrolled except when accessed directly from the Document Repository.
Printed versions are uncontrolled except when stamped “CONTROLLED COPY” in red.
DOCUMENT NUMBER:
DESCRIPTION:
98AON11774D
PDIP−7 (PDIP−8 LESS PIN 6)
PAGE 1 OF 1
ON Semiconductor and
are trademarks of Semiconductor Components Industries, LLC dba ON Semiconductor or its subsidiaries in the United States and/or other countries.
ON Semiconductor reserves the right to make changes without further notice to any products herein. ON Semiconductor makes no warranty, representation or guarantee regarding
the suitability of its products for any particular purpose, nor does ON Semiconductor assume any liability arising out of the application or use of any product or circuit, and specifically
disclaims any and all liability, including without limitation special, consequential or incidental damages. ON Semiconductor does not convey any license under its patent rights nor the
rights of others.
© Semiconductor Components Industries, LLC, 2019
www.onsemi.com
MECHANICAL CASE OUTLINE
PACKAGE DIMENSIONS
PDIP7 MINUS PIN 6 GW
CASE 707AA
ISSUE O
DATE 31 JAN 2017
Electronic versions are uncontrolled except when accessed directly from the Document Repository.
Printed versions are uncontrolled except when stamped “CONTROLLED COPY” in red.
DOCUMENT NUMBER:
DESCRIPTION:
98AON13755G
PDIP7 MINUS PIN 6 GW
PAGE 1 OF 1
ON Semiconductor and
are trademarks of Semiconductor Components Industries, LLC dba ON Semiconductor or its subsidiaries in the United States and/or other countries.
ON Semiconductor reserves the right to make changes without further notice to any products herein. ON Semiconductor makes no warranty, representation or guarantee regarding
the suitability of its products for any particular purpose, nor does ON Semiconductor assume any liability arising out of the application or use of any product or circuit, and specifically
disclaims any and all liability, including without limitation special, consequential or incidental damages. ON Semiconductor does not convey any license under its patent rights nor the
rights of others.
© Semiconductor Components Industries, LLC, 2019
www.onsemi.com
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, and other names, marks, and brands are registered and/or common law trademarks of Semiconductor Components Industries, LLC dba “onsemi” or its affiliates
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