IRLM220ATF [ONSEMI]

功率 MOSFET,N 沟道,A-FET,200 V,1.13 A,800 mΩ,SOT-223;
IRLM220ATF
型号: IRLM220ATF
厂家: ONSEMI    ONSEMI
描述:

功率 MOSFET,N 沟道,A-FET,200 V,1.13 A,800 mΩ,SOT-223

开关 脉冲 光电二极管 晶体管
文件: 总10页 (文件大小:845K)
中文:  中文翻译
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November 2013  
IRLM220A  
N-Channel A-FET  
200 V, 1.13 A, 800 mΩ  
FEATURES  
BVDSS = 200 V  
ν
ν
ν
ν
ν
ν
ν
Avalanche Rugged Technology  
Rugged Gate Oxide Technology  
Lower Input Capacitance  
RDS(on) = 0.8   
ID = 1.13 A  
Improved Gate Charge  
Extended Safe Operating Area  
Lower Leakage Current : 10 µA (Max.) @ VDS = 200V  
Lower RDS(ON) : 0.609 (Typ.)  
D
S
D
SOT-223  
G
Absolute Maximum Ratings  
Symbol  
Characteristic  
IRLM220ATF  
Units  
VDSS  
Drain-to-Source Voltage  
V
200  
1.13  
0.9  
9
Continuous Drain Current (TA=25°C)  
Continuous Drain Current (TA=70°C)  
Drain Current-Pulsed  
ID  
A
IDM  
VGS  
EAS  
IAR  
(1)  
A
V
Gate-to-Source Voltage  
±20  
29  
(2)  
(1)  
(1)  
(3)  
Single Pulsed Avalanche Energy  
Avalanche Current  
mJ  
A
1.13  
0.2  
5
EAR  
dv/dt  
Repetitive Avalanche Energy  
Peak Diode Recovery dv/dt  
mJ  
V/ns  
W
*
Total Power Dissipation (TA=25°C)  
2
PD  
*
Linear Derating Factor  
Operating Junction and  
W/°C  
0.016  
TJ , TSTG  
- 55 to +150  
300  
Storage Temperature Range  
°C  
Maximum Lead Temp. for Soldering  
TL  
Purposes, 1/8” from case for 5-seconds  
Thermal Resistance  
Symbol  
Characteristic  
Typ.  
--  
Max.  
Units  
RθJA  
*
Junction-to-Ambient  
62.5  
°C/W  
* When mounted on the minimum pad size recommended (PCB Mount).  
www.fairchildsemi.com  
©1999 Fairchild Semiconductor Corporation  
IRLM220A Rev. C0  
1
Package Marking and Ordering Information  
Part Number  
Top Mark  
Package  
Packing Method Reel Size  
13 "  
Tape Width  
Quantity  
IRLM220ATF  
IRLM220A  
SOT-223  
12 mm  
4000 units  
Tape and Reel  
Electrical Characteristics TC = 25oC unless otherwise noted.  
--  
Symbol  
BVDSS  
Characteristic  
Min. Typ. Max. Units  
Test Condition  
--  
V
GS=0V,ID=250µA  
Drain-Source Breakdown Voltage  
Breakdown Voltage Temp. Coeff.  
Gate Threshold Voltage  
V
V/°C  
V
200 --  
-- 0.18  
2.0  
100  
-100  
10  
BV/TJ  
VGS(th)  
ID=250µA  
See Fig 7  
V
V
V
V
V
DS=5V,ID=250µA  
1.0  
--  
--  
--  
--  
--  
--  
GS=20V  
Gate-Source Leakage , Forward  
Gate-Source Leakage , Reverse  
IGSS  
nA  
GS=--20V  
--  
100  
DS=200V  
--  
IDSS  
Drain-to-Source Leakage Current  
µA  
DS=160V,TC=125°C  
--  
Static Drain-Source  
On-State Resistance  
Forward Transconductance  
Input Capacitance  
RDS(on)  
VGS=5V,ID=0.57A  
VDS=40V,ID=0.57A  
--  
--  
0.8  
--  
gfs  
Ciss  
Coss  
Crss  
td(on)  
tr  
--  
--  
--  
--  
--  
--  
--  
--  
--  
--  
--  
2.8  
S
330 430  
V
GS=0V,VDS=25V,f =1MHz  
Output Capacitance  
Reverse Transfer Capacitance  
Turn-On Delay Time  
Rise Time  
70  
30  
25  
20  
60  
20  
15  
--  
55  
8
pF  
See Fig 5  
6
VDD=100V,ID=5A,  
24  
6
RG=9Ω  
See Fig 13  
ns  
td(off)  
tf  
Turn-Off Delay Time  
Fall Time  
(4)  
6
Qg  
VDS=160V,VGS=5V,  
ID=5A  
Total Gate Charge  
Gate-Source Charge  
Gate-Drain (“Miller”) Charge  
10.3  
2.0  
4.4  
Qgs  
Qgd  
nC  
--  
See Fig 6 & Fig 12 (4)  
Source-Drain Diode Ratings and Characteristics  
Symbol  
IS  
Characteristic  
Continuous Source Current  
Pulsed-Source Current  
Diode Forward Voltage  
Reverse Recovery Time  
Reverse Recovery Charge  
Min. Typ. Max. Units  
Test Condition  
Integral reverse pn-diode  
in the MOSFET  
--  
--  
--  
--  
-- 1.13  
A
V
ISM  
(1)  
--  
--  
9
TJ=25°C,IS=1.13A,VGS=0V  
VSD  
trr  
1.5  
ns TJ=25°C,IF=5A  
µC diF/dt=100A/µs  
140 --  
Qrr  
-- 0.59 --  
Notes ;  
Repetitive rating : pulse-width limited by maximum junction temperature.  
L = 35 mH, IAS = 1.13 A, VDD = 50 V, RG = 27 , starting TJ = 25°C.  
SD 5 A, di/dt 180 A/µs, VDD BVDSS , starting TJ = 25°C.  
Essentially independent of operating temperature.  
I
www.fairchildsemi.com  
©1999 Fairchild Semiconductor Corporation  
IRLM220A Rev. C0  
2
ꢀ !ꢁꢂꢃꢄꢅꢆꢇꢃꢈꢃꢂꢉꢊꢈꢁꢋꢉꢁꢂꢋ  
Fig 1. Output Characteristics  
Fig 2. Transfer Characteristics  
V
GS  
1
10 Top :  
7.0V  
6.0V  
5.5V  
5.0V  
4.5V  
4.0V  
3.5V  
1
10  
0
10  
150 oC  
Bottom : 3.0V  
0
10  
25 oC  
@ Notes :  
1. VGS = 0 V  
2. VDS = 40 V  
- 55 oC  
@ Notes :  
-1  
10  
1. 250 s Pulse Test  
µ
3. 250 s Pulse Test  
µ
2. T = 25 oC  
C
-1  
10  
-1  
0
1
0
2
4
6
8
10  
10  
10  
10  
VDS , Drain-Source Voltage [V]  
VGS , Gate-Source Voltage [V]  
Fig 3. On-Resistance vs. Drain Current  
Fig 4. Source-Drain Diode Forward Voltage  
2.0  
1.5  
1.0  
0.5  
0.0  
1
10  
V = 5 V  
GS  
0
10  
@Notes:  
V = 10 V  
150oC  
GS  
1. V =0 V  
GS  
25oC  
@Note: T = 25 oC  
2. 250 sPulseTest  
µ
J
-1  
10  
0
3
6
9
12  
15  
18  
0.4  
0.6  
0.8  
1.0  
1.2  
1.4  
1.6  
1.8  
I , Drain Current [A]  
VSD , Source-Drain Voltage [V]  
D
Fig 5. Capacitance vs. Drain-Source Voltage  
Fig 6. Gate Charge vs. Gate-Source Voltage  
500  
400  
300  
200  
100  
C =C +C (C =shorted)  
iss gs gd  
ds  
C = ds+C  
oss  
gd  
6
Ciss  
C =  
V =40 V  
rss gd  
DS  
V =100V  
DS  
V =160V  
DS  
4
2
0
C oss  
@Notes:  
1. V = 0 V  
GS  
2. f= 1MHz  
C rss  
@Notes:I =5 A  
D
00  
10  
1
0
2
6
8
10  
12  
10  
Q , Total Gate Charge [nC]  
V
DS , Drain-Source Voltage [V]  
G
www.fairchildsemi.com  
©1999 Fairchild Semiconductor Corporation  
IRLM220A Rev. C0  
3
ꢀ !ꢁꢂꢃꢄꢅꢆꢇꢃꢈꢃꢂꢉꢊꢈꢁꢋꢉꢁꢂꢋꢅꢀꢀꢀꢀꢁꢂꢃꢄꢅꢆꢄꢇꢈꢉꢊ  
Fig 7. Breakdown Voltage vs. Temperature  
Fig 8. On-Resistance vs. Temperature  
1.2  
2.5  
2.0  
1.5  
1.0  
0.5  
0.0  
1.1  
1.0  
@ Notes :  
1. VGS = 5 V  
0.9  
@ Notes :  
1. VGS = 0 V  
2. I = 2.5 A  
D
2. I = 250  
A
µ
D
0.8  
-75 -50 -25  
0
25  
50  
75  
100 125 150 175  
-75 -50 -25  
0
25  
50  
75  
100 125 150 175  
o
o
T , Junction Temperature [C]  
T , Junction Temperature [C]  
J
J
Fig 9. Max. Safe Operating Area  
Fig 10. Max. Drain Current vs. Ambient Temperature  
2
1.5  
10  
OperationinThisArea  
isLimitedby RDS(on)  
1
10  
100 s  
1ms  
10ms  
µ
1.0  
0.5  
0.0  
0
10  
DC  
-1  
10  
@Notes:  
1. T = 25 oC  
C
2. T =150oC  
3. SinglePulse  
-2  
J
10  
-3  
10  
-1  
0
1
2
25  
50  
75  
100  
125  
150  
10  
10  
10  
10  
o
T , Ambient Temperature [C]  
VDS , Drain-Source Voltage [V]  
A
Fig 11. Thermal Response  
102  
101  
D=0.5  
0.2  
0.1  
@ Notes :  
1. JA(t)=62.5 oC/W Max.  
0.05  
θ
2.  
ty Factor, D=t1/t2  
0.02  
0.01  
3. JM-TA=PDM*Z JA(t)  
PDM  
100  
θ
t1  
t2  
single pulse  
10-3  
10-1  
10-5  
10-4  
10-2  
10-1  
100  
101  
102  
103  
t1 , Square Wave Pulse Duration [sec]  
www.fairchildsemi.com  
©1999 Fairchild Semiconductor Corporation  
IRLM220A Rev. C0  
4
VGS  
Same Type  
as DUT  
50KΩ  
Qg  
12V  
200nF  
300nF  
VDS  
VGS  
Qgs  
Qgd  
DUT  
IG = const.  
Charge  
Figure 12. Gate Charge Test Circuit & Waveform  
RL  
VDS  
90%  
VDS  
VDD  
VGS  
RG  
10%  
VGS  
DUT  
VGS  
td(on)  
tr  
td(off)  
tf  
t on  
t off  
Figure 13. Resistive Switching Test Circuit & Waveforms  
BVDSS  
--------------------  
BVDSS - VDD  
L
1
2
2
----  
EAS  
=
L IAS  
VDS  
I D  
BVDSS  
IAS  
RG  
VDD  
ID (t)  
VGS  
VDD  
VDS (t)  
DUT  
t p  
t p  
Time  
Figure 14. Unclamped Inductive Switching Test Circuit & Waveforms  
www.fairchildsemi.com  
©1999 Fairchild Semiconductor Corporation  
IRLM220A Rev. C0  
5
+
DUT  
VDS  
_
I SD  
L
Driver  
RG  
Same Type  
as DUT  
VDD  
VGS  
• dv/dt controlled by RG  
• ISD controlled by pulse period  
Gate Pulse Width  
--------------------------  
VGS  
D =  
Gate Pulse Period  
10V  
( Driver )  
IFM , Body Diode Forward Current  
I SD  
di/dt  
( DUT )  
IRM  
Body Diode Reverse Current  
Body Diode Recovery dv/dt  
VSD  
VDS  
( DUT )  
VDD  
Body Diode  
Forward Voltage Drop  
Figure 15. Peak Diode Recovery dv/dt Test Circuit & Waveforms  
www.fairchildsemi.com  
©1999 Fairchild Semiconductor Corporation  
IRLM220A Rev. C0  
6
Mechanical Dimensions  
Figure 16. SOT-223, Molded, 4-Lead  
Package drawings are provided as a service to customers considering Fairchild components. Drawings may change in any manner  
without notice. Please note the revision and/or date on the drawing and contact a Fairchild Semiconductor representative to verify or  
obtain the most recent revision. Package specifications do not expand the terms of Fairchild’s worldwide terms and conditions, specif-  
ically the warranty therein, which covers Fairchild products.  
Always visit Fairchild Semiconductor’s online packaging area for the most recent package drawings:  
http://www.fairchildsemi.com/package/packageDetails.html?id=PN_TTE23-004  
7
www.fairchildsemi.com  
©1999 Fairchild Semiconductor Corporation  
IRLM220A Rev. C0  
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Definition of Terms  
Datasheet Identification  
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Datasheet contains the design specifications for product development. Specifications  
may change in any manner without notice.  
Advance Information  
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Rev. I66  
©1999 Fairchild Semiconductor Corporation  
IRLM220A Rev. C0  
8
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specifications can and do vary in different applications and actual performance may vary over time. All operating parameters, including “Typicals” must be validated for each customer  
application by customer’s technical experts. ON Semiconductor does not convey any license under its patent rights nor the rights of others. ON Semiconductor products are not  
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INFINEON

IRLML0030PBF

ADVANCED PROCESS TECHNOLOGY
INFINEON

IRLML0030PBF-1

Industry-standard pinout SOT-23 Package
INFINEON

IRLML0030PBF-1_15

Industry-standard pinout SOT-23 Package
INFINEON

IRLML0030PBF_15

ADVANCED PROCESS TECHNOLOGY
INFINEON

IRLML0030TRPBF

HEXFET Power MOSFET
INFINEON

IRLML0030TRPBF

HEXFETpower MOSFET Compatible with existing Surface Mount Techniques Lower switching losses
TYSEMI

IRLML0040

The StrongIRFET™ power MOSFET family is optimized for low RDS(on) and high current capability. The devices are ideal for low frequency applications requiring performance and ruggedness. The comprehensive portfolio addresses a broad range of applications including DC motors, battery management systems, inverters, and DC-DC converters. 
INFINEON

IRLML0040PBF

Industry-standard pinout
INFINEON

IRLML0040PBF_15

Industry-standard pinout
INFINEON

IRLML0040TRPBF

HEXFET Power MOSFET
INFINEON

IRLML0040TRPBF

HEXFETpower MOSFET Compatible with existing Surface Mount Techniques Lower switching losses
TYSEMI