LB11850VA-W-AH [ONSEMI]
Single-Phase Full-Wave Fan Motor Pre-Driver with Speed Control Function, 2000-REEL;
| 型号： | LB11850VA-W-AH |
| 厂家： | 
ONSEMI |
| 描述： | Single-Phase Full-Wave Fan Motor Pre-Driver with Speed Control Function, 2000-REEL 驱动器 风扇 电机 |
| 文件： | 总14页 (文件大小：113K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
Ordering number : ENA0609A
LB11850VA
Monolithic Digital IC
For Fan Motor
http://onsemi.com
Single-Phase Full-Wave Pre-Driver
with Speed Control Function
Overview
The LB11850VA is a single-phase bipolar fan motor driver with speed control function that works with a speed
feedback signal. A highly efficient, quiet and low power consumption motor driver circuit, with a high speed
accuracy and large variable speed can be implemented by adding a small number of external components.
This pre-driver is optimal for driving large scale fan motors (with large air volume and large current) such as those
used in servers and consumer products.
Functions and features
• Pre-driver for single-phase full-wave drive
→PMOS-NMOS is used as an external power TR, enabling high-efficiency and low-power-consumption drive by
means of the low-saturation output and single-phase full-wave drive.
• On-chip speed control circuit
→The speed control (closed loop control) using a speed feedback signal makes it possible to achieve higher speed
accuracy and lower speed fluctuations when supply voltage fluctuates or load fluctuates, compared with an
open-loop control system. Separately excited upper direct PWM control method is used as the variable-speed
control system.
• External PWM input or analog voltage input enabling variable speed control
→The speed control input signal is compatible with PWM duty ratio or analog voltages.
• On-chip soft start circuit
• Lowest speed setting pin
→The lowest speed can be set with the external resistor.
• Current limiter circuit incorporated
→Chopper type current limit at start or lock.
• Reactive current cut circuit incorporated
→Reactive current before phase change is cut to enable silent and low-consumption drive.
• Constraint protection and automatic reset functions incorporated
• FG (speed detection), RD (lock detection) output
• Constant-voltage output pin for hall bias
Semiconductor Components Industries, LLC, 2013
May, 2013
32207 MS IM 20070301-S00003 / D0606 MH IM 20060619-S00002 No.A0609-1/15
LB11850VA
Specifications
Absolute Maximum Ratings at Ta = 25°C
Parameter
Symbol
Conditions
Ratings
Unit
V
V
maximum supply voltage
V
max
18
CC
CC
N max
OUTN pin maximum output current
OUTP pin maximum sink current
OUT pin output withstand voltage
HB maximum output current
I
20
mA
mA
V
OUT
I
P max
max
20
OUT
V
18
OUT
HB
10
mA
V
CTL, C pin withstand voltage
CVI, LIM pin withstand voltage
RD/FD output pin output withstand voltage
RD/FG output current
CTL, C max
CVI, LIM max
FG max
7
7
V
19
10
V
FG max
mA
mA
W
5VREG pin maximum output current
Allowable power dissipation
I5VREG max
Pd max
10
Mounted on a specified board *
0.9
Operating temperature range
Storage temperature range
Topr
-30 to +95
-55 to +150
°C
°C
Tstg
Note *1: Mounted on a specified board: 114.3mm×76.1mm×1.6mm, glass epoxy.
Note *2: Tj max = 150°C. Use the device in a condition that the chip temperature does not exceed Tj = 150°C during operation.
Stresses exceeding Maximum Ratings may damage the device. Maximum Ratings are stress ratings only. Functional operation above the Recommended Operating
Conditions is not implied. Extended exposure to stresses above the Recommended Operating Conditions may affect device reliability.
Recommended Operating Ranges at Ta = 25°C
Parameter
Symbol
Conditions
Ratings
Unit
V
V
V
supply voltage 1
V
1
V pin
CC
5.5 to 16
4.5 to 5.5
CC
CC
CC
supply voltage 2
V
2
When V -5VREG shorted
CC
V
CC
CTL input voltage range
LIM input voltage range
VCI input voltage range
VCTL
VLIM
VCVI
VICM
0 to 5VREG
0 to 5VREG
0 to 5VREG
0.2 to 3
V
V
V
Hall input common phase input voltage
range
V
Electrical Characteristics at Ta = 25°C, V
= 12V, unless otherwise specified
CC
Ratings
typ
Parameter
Symbol
Conditions
unit
min
max
15
Circuit current
I
I
1
2
During drive
12
mA
mA
V
CC
During lock protection
I5VREG = 5mA
IHB = 5mA
12
5.0
1.20
210
3.0
1.1
30
15
CC
5VREG voltage
HB voltage
5VREG
VHB
4.8
1.05
190
2.8
0.9
24
5.2
1.35
230
3.2
1.3
36
V
Current limiter voltage
VLIM
mV
V
CPWM pin H level voltage
CPWM pin L level voltage
CPWM pin charge current
CPWM pin discharge current
CPWM oscillation frequency
CT pin H level voltage
VCRH
VCRL
V
ICPWM1
ICPWM2
FPWM
VCTH
VCTL
VCPWM = 0.5V
VCPWM = 3.5V
C = 220pF
μA
μA
kHz
V
21
27
33
30
2.8
0.9
1.6
0.16
8
3.0
1.1
2.0
0.20
10
3.2
1.3
CT pin L level voltage
V
CT pin charge current
ICT1
VCT = 2V
VCT = 2V
ICT1/ICT2
2.5
μA
μA
times
V
CT pin discharge current
CT pin charge/discharge current ratio
OUTN pin output H voltage
OUTN pin output L voltage
OUTP pin output L voltage
ICT2
0.25
12
RCT
VONH
VONL
VOPL
I
I
I
= 10mA
= 10mA
= 10mA
V
-0.85
0.9
0.5
V
-1.0
1.0
O
O
O
CC
CC
V
0.65
V
Continued on next page.
No.A0609-2/14
LB11850VA
Continued from preceding page.
Parameter
Ratings
typ
Symbol
VHN
Conditions
unit
mV
min
max
+
-
Hall input sensitivity
IN , IN difference voltage
(including offset and hysteresis)
IFG = 5mA
15
25
FG output L voltage
VFGL
IFGL
0.15
0.15
030
30
μA
μA
V
FG pin leak current
VFG = 19V
RD output L voltage
VRDL
IRDL
IRD = 5mA
0.30
30
RD pin leak current
VRD = 19V
μA
V
EO pin output H voltage
EO pin output L voltage
RC pin output H voltage
RC pin output L voltage
RC pin clamp voltage
VEOH
VEOL
VRCH
VRCL
VRCCLP
VCTLH
VCTLL
VCTLO
ICTLH
ICTLL
VCH
IEO1 = -0.2mA
IEO1 = 0.2mA
VREG-1.2
VREG-0.8
0.8
1.1
3.7
V
3.2
3.45
0.8
V
0.7
1.05
1.7
V
1.3
1.5
V
CTL pin input H voltage
CTL pin input L voltage
CTL pin input open voltage
CTL pin H input H current
CTL pin L input L current
C pin output H voltage
2.0
VREG
1.0
V
0
V
VREG-0.5
VREG
10
V
VFGIN = 5VREG
VFGIN = 0V
-10
0
-90
μA
μA
V
-120
VREG-0.3
VREG-0.1
2.0
C pin output L voltage
VCL
1.8
2.2
1
V
LIM pin input bias current
LIM pin common phase input voltage range
SOFT pin charge current
SOFT pin operating voltage range
CVI pin input bias current
CVI pin common phase input voltage range
CVO pin output H level voltage
Output L level voltage
IBLIM
-1
μA
V
VILIM
2.0
VREG
1.6
ICSOFT
VISOFT
IB(VCI)
VIVCI
1.0
1.3
μA
V
2.0
VREG
2
-1
2.0
μA
V
VREG
V
(VCO)
VREG-0.35
1.8
VREG-0.2
2.0
V
OH
V
(VCO)
2.2
V
OL
Package Dimensions
unit : mm (typ)
3287
Pd max -- Ta
1.2
Mounted on a specified board:
114.3×76.1×1.6mm3,glass epoxy
6.5
1.0
0.9
0.8
24
13
0.6
0.4
0.2
12
1
0.5
0.22
0.15
(0.5)
0
-30
0
30
60
9095
120
Ambient temperature, Ta -- °C
SSOP24(225mil)
No.A0609-3/14
LB11850VA
Pin Assignment
OUT2P
OUT2N
1
2
3
4
5
6
7
8
9
24 OUT1P
23 OUT1N
22 SGND
21 5VREG
V
CC
SENCE
CVI
20
C
CVO
CTL
19 EO
18 EI
LB11850VA
RC
17 LIM
16 CT
SOFT
+
CPWM 10
FG 11
15 IN
14 HB
-
13 IN
RD 12
Top view
Truth Table
Lock protection CPWM = H
-
+
IN
IN
CT
OUT1P
L
OUT1N
OUT2P
OFF
L
OUT2N
FG
L
Mode
H
L
L
H
L
L
H
L
H
L
OUT1→2 drive
OUT2→1 drive
L
OFF
OFF
OFF
OFF
L
H
L
OFF
OFF
H
L
H
Lock protection
H
H
OFF
Speed control CT = L
-
+
EO
CPWM
IN
IN
OUT1P
L
OUT1N
OUT2P
OFF
L
OUT2N
Mode
H
L
L
H
L
L
H
L
H
L
OUT1→2 drive
OUT2→1 drive
L
H
OFF
OFF
OFF
H
L
OFF
OFF
H
L
H
L
Regeneration mode
H
H
No.A0609-4/14
LB11850VA
Block Diagram
ILB01797
No.A0609-5/14
LB11850VA
Sample Application Circuit
*3
1μF/25V
Rp=1kΩ
(3)
(4)
(1)
(2)
100Ω
RF
RFG/RRD=
10kΩ to 100kΩ
*2
1μF/25V
*9
V
CC
5VREG
RC
FG
*8
RD
*7
SENSE
(1)
LIM
OUT1P
(2)
(3)
OUT1N
OUT2P
SOFT
(4)
OUT2N
CVI
CVO
HB
*4
IN
-
H
C
+
IN
CTLsignal
CTL
EI
CT
CT=1μF
*5
*6
EO
CPWM
CP=220pF
30kHz
SGND
*1
No.A0609-6/14
LB11850VA
Description of Pre-driver Block
*1: <Power supply-GND wiring>
SGND is connected to the control circuit power supply system.
*2: <Power stabilization capacitor>
For the signal-side power stabilization capacitor, the capacitance of more than 0.1μF is used.
Connect the capacitor between V
and GND with the thick pattern and along the shortest route.
CC
*3: <Power-side power stabilization capacitor>
For the power-side power stabilization capacitor, the capacitance of more than 0.1μF is used.
Connect the capacitor between power-side power supply and GND with the thick pattern and along the shortest
route.
+
-
*4: <IN , IN pins>
Hall signal input pins
+
-
Wiring needs to be short to prevent carrying noise. If noise is carried, insert a capacitor between IN and IN . The
Hall input circuit is a comparator having a hysteresis of 15mV.
It has a 30mV (input signal difference voltage) soft switch zone.
It is recommended that the Hall input level is 100mV (p-p) at the minimum.
*5: <CPWM pin>
This is the pin to connect capacitor for generating the PWM basic frequency
Use of CP = 220pF produces oscillation at the frequency of 30kHz which serves as the PWM basic frequency.
Since this pin is also used for the current limiter reset signal, the capacitor must be connected without fail even
when no speed control is implemented.
*6: <CT pin>
This is the pin to connect capacitor for lock detection
Constant-current charging and constant-current discharging circuits are incorporated. When the pin voltage
becomes 3.0V, the safety lock is applied, and when it lowers to 1.0V, the lock protection is reset.
Connect this pin to GND when it is not in use (when lock protection is not required).
*7: <SENSE pin>
This is the pin for current limiter detection
When the pin voltage exceeds 0.21V, current limiting is applied, and the low-side regeneration mode is established.
Connect this pin to GND when it is not in use.
*8: <RD pin>
Lock detection pin
This is the open collector output, which outputs “L” during rotation and “H” at stop. This pin is left open when it is
not in use.
*10: <FG pin>
Speed detection pin.
This is the open collector output, which can detect the rotation speed using the FG output according to the phase
change. This pin is left open when it is not in use.
No.A0609-7/14
LB11850VA
Description of Speed Control Block
1) Speed control diagram
The speed slope is determined by the constant of the RC pin.
(RPM)
CR time constant large
CR time constant small
Rotation speed
Minimum speed
Determined by LIM pin voltage
0%
Small ← CTL signal (PWMDUTY) → Large
Large ← EO pin voltage (V) → Small
100%
Minimum speed
setting rotation
Variable speed
Full speed
ON-Duty small
ON Duty large
CTL pin
5VREG
LIM voltage
EO pin
EO voltage
0V
2) Timing at startup (soft start)
V
pin
CC
CTL pin
Stop
Full speed
Soft start
The slope changes according to the capacitance of SOFT pin.
(Large → Large slope)
SOFT pin
Stop
Full speed
No.A0609-8/14
LB11850VA
3) Additional description of operations
The LB11850 forms a feedback loop inside the IC so that the FG period (motor speed) corresponding to the control
voltage is established by inputting the duty pulse.
LB11850VA
FG
Speed control block
Pre-driver block
CTL
CTL
signal
Closed
Feed-back
Loop
CONTROL
SIGNAL
The operation inside the IC is as follows. Pulse signals are created from the edges of the FG signals as shown in the
figure below, and a waveform with a pulse width which is determined by the CR time constants and which uses these
edges as a reference is generated by a one-shot multivibrator.
These pulse waveforms are integrated and the duty ratio of the pre-driver output is controlled as a control voltage.
FG
EDGE pulse
Slope due to
CR time
constant
RC pin
1 shot output
TRC(s) = 1.15RC
Furthermore, by changing the pulse width as determined by the CR time constant, the VCTL versus speed slope can be
changed as shown in the speed control diagram of the previous section.
However, since the pulses used are determined by the CR time constant, the variations in CR are output as-is as the
speed control error.
No.A0609-9/14
LB11850VA
4) Procedure for calculating constants
<RC pin>
The slope shown in the speed control diagram is determined by the constant of the RC pin.
(RPM)
Motor
at maximum speed
100%
0%
CTL Duty(%)
(1) Obtain FG signal frequency fFG (Hz) of the maximum speed of the motor.
(With FG2 pulses per rotation)
fFG (Hz) = 2 rpm/60 .... <1>
(2) Obtain the time constant which is connected to the RC pin.
(Have “DUTY” (example: 100% = 1.0, 60% = 0.6) serve as the CTL duty ratio at which the maximum speed is to
be obtained.)
R×C = DUTY/(3.3×1.1×fFG) .... <2>
(3) Obtain the resistance and capacitance of the capacitor.
Based on the discharge capacity of the RC pin, the capacitance of the capacitor which can be used is 0.01 to
0.015μF. Therefore, find the appropriate resistance using equation <3> or <4> below from the result of <2>
above.
R = (R×C)/0.01μF .... <3>
R = (R×C)/0.015μF .... <4>
The temperature characteristics of the curve are determined by the temperature characteristics of the capacitor of the
RC pin. When temperature-caused fluctuations in the speed are to be minimized, use a capacitor with good
temperature characteristics.
No.A0609-10/14
LB11850VA
<CVO, CVI pins>
These pins determine the position of the slope origin. (When the origin point is at (0%, 0 rpm), CVO and CVI are
shorted.)
(1) Movement along the X-axis (resistance divided between CVO and GND)
(RPM)
Motor
at maximum speed
Move in the direction
of the X-axis
100%
0%
CTL Duty(%)
(Example) In the case where the characteristics change from ones with the origin point (0%, 0 rpm) to ones where the
speed at a duty ratio of 30% becomes the speed at 0%:
First, obtain the input voltage of the CVI pin required at 0%.
CVI = 5-(3×duty ratio) = 5-(3×0.3) = 5-0.9 = 4.1V
Next, obtain the resistances at which the voltage becomes 4.1V by dividing the resistance between CVO and GND
when CVO is 5V. The ratio of CVO-CVI: CVI-GND is 0.9V: 4.1V = 1: 4.5.
Based on the above, the resistance is 20kΩ between CVO and CVI and 91kΩ between CVI and GND.
Furthermore, the slope changes. (In the case of the example given, since the resistance ratio is 1: 4.5, the slope is now
4.5/5.5 = 0.8 times what it was originally.)
If necessary, change the resistance of the RC pin, and adjust the slope.
LIM
VREF
SOFT
CVI
CVO
R4
R5
C
CTL
CTL
No.A0609-11/14
LB11850VA
(2) Movement along the Y-axis (resistance divided between CVO and V
)
CC
(RPM)
Motor
at maximum speed
Move in the direction
of the Y-axis
100%
0%
CTL Duty(%)
(Example) In the case where the characteristics change from ones with the origin point (0%, 0 rpm) to ones where the
speed at a duty ratio of 25% becomes 0 rpm:
First, obtain the CVO pin voltage required for the CVI voltage to be 5V at 25%.
CVO = 5-(3×duty ratio) = 5-(3×0.25) = 5-0.75 = 4.25V
With CVO = 4.25V, find the resistances at which CVI = 5V.
The ratio of CVO-CVI: CVI-GND is 0.75V: 7V = 1: 9.3
Based on the above, the resistance is 20kΩ between CVO and CVI and 180kΩ between CVI and V
(Due to the current capacity of the CVO pin, the total resistance must be set to 100kΩ or more.)
.
CC
Furthermore, the slope changes. (In the case of the example given, since the resistance ratio is 1: 9.3, the slope is now
9.3/10.3 = 0.9 times what it was originally.)
If necessary, change the resistance of the RC pin, and adjust the slope.
V
CC
LIM
VREF
R5
R4
SOFT
CVI
CVO
C
CTL
CTL
No.A0609-12/14
LB11850VA
<LIM pin>
The minimum speed is determined by the voltage of the LIM pin.
(RPM)
10000
Maximum speed
8000
6000
4000
2000
Minimum
speed setup
0%
5V
100%
2V
CTL Duty(%)
CVO pin voltage (V)
(1) Obtain the ratio of the minimum speed required to the maximum speed.
Ra = Minimum speed/maximum speed .... <1>
In the example shown in the figure above, Ra = minimum speed/maximum speed = 3000/10000 = 0.3.
(2) Obtain the product of the duty ratio at which the maximum speed is obtained and the value in equation <1>.
Ca = Duty ratio at maximum speed×Ra .... <2>
In this example, Ca = duty ratio at maximum speed×Ra = 0.8×0.3 = 0.24.
(3) Obtain the required LIM pin voltage.
LIM = 5-(3×Ca) .... <3>
In this example, LIM = 5-(3×Ca) = 5-(3×0.24) ≈ 4.3V.
(4) Divide the resistance of 5VREG, and generate the LIM voltage.
In this example, the voltage is 4.3V so the resistance ratio is 1: 6.
The resistance is 10kΩ between 5VREG and LIM and 62kΩ between LIM and GND.
5VREG
LIM
VREF
SOFT
CVI
No.A0609-13/14
LB11850VA
<C pin>
In order to connect a capacitor capable of smoothing the pin voltage to the C pin, the correlation given in the
following equation must be satisfied when f (Hz) serves as the input signal frequency of the CTL pin. (R is contained
inside the IC, and is 180kΩ (typ.).)
1/f = t < CR
The higher the capacitance of the capacitor is, the slower the response to changes in the input signal is.
5VREG
Connect a capacitor capable of
CTL pin input inverted waveform
smoothing the pin voltage
(same frequency)
1/f = t < CR
C pin
CTL pin
CTL circuit
VREF circuit
180kΩ
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PS No.A0609-14/14
相关型号：
LB11852FV
Monolithic Digital IC For Fan Motor Single-phase Full-wave Pre-driver with Speed Control Function
SANYO
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