MC100EPT25D [ONSEMI]
Differential LVECL/ECL to LVTTL Translator; 差分LVECL / ECL为LVTTL翻译
| 型号： | MC100EPT25D |
| 厂家： | 
ONSEMI |
| 描述： | Differential LVECL/ECL to LVTTL Translator |
| 文件： | 总8页 (文件大小：99K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
The MC100EPT25 is a Differential LVECL/ECL to LVTTL
translator. This device requires +3.3V, –3.3V to –5.2V, and ground.
The small outline 8–lead SOIC package and the single gate of the
EPT25 make it ideal for applications which require the translation of a
clock or data signal.
The VBB output allows the EPT25 to also be used in a single–ended
input mode. In this mode the VBB output is tied to the D input for a
non–inverting buffer or the D input for an inverting buffer. If used, the
VBB pin should be bypassed to ground via a 0.01mF capacitator.
http://onsemi.com
MARKING
DIAGRAMS*
8
SO–8
D SUFFIX
CASE 751
HPT25
ALYW
8
1
• 1.1ns Typical Propagation Delay
• 275MHz Fmax (Clock bit stream, not pseudo–random)
• Differential LVECL/ECL inputs
• Small Outline SOIC Package
• 24mA TTL outputs
1
8
TSSOP–8
DT SUFFIX
CASE 948R
HR25
ALYW
8
1
1
• Flow Through Pinouts
A = Assembly Location
L = Wafer Lot
Y = Year
• Internal Input Resistors: Pulldown on D, Pulldown and Pullup on D
• Q Output will default LOW with inputs open or at GND
• ESD Protection: >4000V HBM, >200V MM
W = Work Week
*For additional information, see Application Note
AND8002/D
• V Output
BB
• New Differential Input Common Mode Range
• Moisture Sensitivity Level 1, Indefinite Time Out of Drypack.
For Additional Information, See Application Note AND8003/D
• Flammability Rating: UL–94 code V–0 @ 1/8”,
Oxygen Index 28 to 34
PIN DESCRIPTION
PIN
Q
FUNCTION
LVTTL Output
• Transistor Count = 111 devices
D, D
Differential LVECL Input Pair
Positive Supply
V
CC
V
1
2
8
7
V
CC
EE
V
BB
GND
Output Reference Voltage
Ground
LVTTL
V
EE
Negative Supply
D
Q
D
3
4
6
5
NC
GND
ORDERING INFORMATION
LVECL
Device
Package
Shipping
MC100EPT25D
MC100EPT25DR2
MC100EPT25DT
SO–8
98 Units / Rail
VBB
SO–8
2500 / Reel
98 Units / Rail
2500 / Reel
TSSOP–8
MC100EPT25DTR2 TSSOP–8
Figure 1. 8–Lead Pinout (Top View) and Logic Diagram
Semiconductor Components Industries, LLC, 2000
1
Publication Order Number:
May, 2000 – Rev. 1
MC100EPT25/D
MC100EPT25
MAXIMUM RATINGS*
Symbol
Parameter
Value
0 to 3.8
–6.0 to 0
0 to 3.8
Unit
VDC
VDC
VDC
mA
V
CC
V
EE
V
I
Power Supply (Referenced to GND, V
Power Supply (Referenced to GND, V
= –3.3V)
= +3.3V)
EE
CC
Input Voltage (V not more positive than GND)
I
I
Output Current
Continuous
Surge
50
100
out
I
V
Sink/Source Current
± 0.5
mA
°C
BB
BB
T
Operating Temperature Range
Storage Temperature
–40 to +85
–65 to +150
A
T
°C
stg
θ
Thermal Resistance (Junction–to–Ambient)
Still Air
500lfpm
190
130
°C/W
JA
θ
Thermal Resistance (Junction–to–Case)
41 to 44 ± 5%
°C/W
°C
JC
T
Solder Temperature (<2 to 3 Seconds: 245°C desired)
265
sol
* Maximum Ratings are those values beyond which damage to the device may occur.
Use for inputs of same package only.
DC CHARACTERISTICS, ECL/LVECL (V
= +3.3V; V
= –5.5V to –3.0V, GND = 0V)
EE
CC
–40°C
Typ
16
25°C
Typ
16
85°C
Typ
16
Symbol
Characteristic
Power Supply Current
Min
Max
Min
Max
Min
Max
Unit
8.0
25
8.0
25
8.0
25
mA
IEE
(Note 1.)
V
Input HIGH Voltage Single Ended
(Note 4.)
–1165
–1810
–880 –1165
–1625 –1810
–880 –1165
–1625 –1810
–880
–1625
mV
mV
IH
IL
V
Input LOW Voltage Single Ended
(Note 4.)
V
V
Output Voltage Reference
–1550 –1450 –1350 –1550 –1450 –1350 –1550 –1450 –1350
mV
V
BB
Input HIGH Voltage Common Mode
Range (Note 3.)
V +2.0
EE
0.0
V +2.0
EE
0.0
V +2.0
EE
0.0
IHCMR
I
I
Input HIGH Current
150
150
150
µA
µA
IH
Input LOW Current
D
D
0.5
–150
0.5
–150
0.5
–150
IL
NOTE: 100EP circuits are designed to meet the DC specifications shown in the above table after thermal equilibrium has been established. The
circuit is in a test socket or mounted on a printed circuit board and transverse airflow greater than 500lfpm is maintained.
1. (V
= +3.3V, GND = 0V, V
= –3.3V), all other pins floating.
2. All loading with 500 ohms to GND, C = 20pF.
CC
EE
L
3. V
min varies 1:1 with V , max varies 1:1 with V .
EE CC
IHCMR
4. Input and output parameters vary 1:1 with V
.
CC
http://onsemi.com
2
MC100EPT25
TTL OUTPUT DC CHARACTERISTICS (V
= 3.3V ± 0.3V; GND = 0V; V
= –3.3V ± 0.3V; T = –40°C to 85°C)
EE A
CC
Symbol
Characteristic
Power Supply Current (Outputs set to HIGH)
Power Supply Current (Outputs set to LOW)
Output HIGH Voltage (I = –3.0mA) (Note 5.)
Min
6.0
7.0
2.2
Typ
10
Max
14
Unit
mA
mA
V
I
I
CCH
12
17
CCL
V
V
OH
OH
= 24mA) (Note 5.)
Output LOW Voltage (I
OL
0.5
V
OL
I
Output Short Circuit Current
–130
–60
mA
OS
NOTE: 100EP circuits are designed to meet the DC specifications shown in the above table after thermal equilibrium has been established. The
circuit is in a test socket or mounted on a printed circuit board and transverse airflow greater than 500lfpm is maintained.
5. All loading with 500 ohms to GND, CL = 20pF.
AC CHARACTERISTICS (V
= 3.3V ± 0.3V; GND = 0V)
–40°C
CC
25°C
85°C
Symbol
Characteristic
Min
275
800
Typ
Max
Min
275
800
Typ
Max
Min
275
800
Typ
Max
Unit
MHz
ns
f
Maximum Toggle Frequency
max
t
t
,
Propagation Delay to
Output Differential
1200
1800
1100
1600
1100
1600
PLH
PHL
t
t
t
Output–to–Output Skew++
Output–to–Output Skew– –
Part–to–Part Skew (Note 6.)
60
25
500
60
25
500
60
25
500
ps
SK+ +
SK– –
SKPP
t
Cycle–to–Cycle Jitter
TBD
800
TBD
800
TBD
800
ps
JITTER
V
Input Voltage Swing
(Differential) (Note 7.)
100
1200
100
1200
100
1200
mV
PP
t
r
t
f
Output Rise/Fall Times
(0.8V – 2.0V)
Q, Q
450
900
600
1160
750
1400
450
900
600
1100
750
1400
450
900
600
1100
750
1400
ps
6. Skews are measured between outputs under identical conditions.
7. 200mV input guarantees full logic swing at the output.
http://onsemi.com
3
MC100EPT25
PACKAGE DIMENSIONS
SO–8
D SUFFIX
PLASTIC SOIC PACKAGE
CASE 751–06
ISSUE T
NOTES:
D
A
1. DIMENSIONING AND TOLERANCING PER ASME
Y14.5M, 1994.
C
2. DIMENSIONS ARE IN MILLIMETER.
3. DIMENSION D AND E DO NOT INCLUDE MOLD
PROTRUSION.
4. MAXIMUM MOLD PROTRUSION 0.15 PER SIDE.
5. DIMENSION B DOES NOT INCLUDE DAMBAR
PROTRUSION. ALLOWABLE DAMBAR
PROTRUSION SHALL BE 0.127 TOTAL IN EXCESS
OF THE B DIMENSION AT MAXIMUM MATERIAL
CONDITION.
8
1
5
4
M
M
0.25
B
H
E
h X 45
MILLIMETERS
B
e
DIM MIN
MAX
1.75
0.25
0.49
0.25
5.00
4.00
A
A1
B
C
D
E
1.35
0.10
0.35
0.19
4.80
3.80
A
C
SEATING
PLANE
L
e
1.27 BSC
0.10
H
h
L
5.80
0.25
0.40
0
6.20
0.50
1.25
7
A1
B
M
S
S
0.25
C B
A
http://onsemi.com
4
MC100EPT25
PACKAGE DIMENSIONS
TSSOP–8
DT SUFFIX
PLASTIC TSSOP PACKAGE
CASE 948R–02
ISSUE A
8x K REF
NOTES:
1. DIMENSIONING AND TOLERANCING PER ANSI
M
S
S
0.10 (0.004)
T U
V
Y14.5M, 1982.
S
0.15 (0.006) T U
2. CONTROLLING DIMENSION: MILLIMETER.
3. DIMENSION A DOES NOT INCLUDE MOLD
FLASH. PROTRUSIONS OR GATE BURRS. MOLD
FLASH OR GATE BURRS SHALL NOT EXCEED
0.15 (0.006) PER SIDE.
4. DIMENSION B DOES NOT INCLUDE
INTERLEAD FLASH OR PROTRUSION.
INTERLEAD FLASH OR PROTRUSION SHALL NOT
EXCEED 0.25 (0.010) PER SIDE.
2X L/2
8
5
4
0.25 (0.010)
B
–U–
L
1
M
PIN 1
IDENT
5. TERMINAL NUMBERS ARE SHOWN FOR
REFERENCE ONLY.
6. DIMENSION A AND B ARE TO BE
DETERMINED AT DATUM PLANE –W–.
S
0.15 (0.006) T U
A
–V–
F
DETAIL E
MILLIMETERS
INCHES
DIM MIN
MAX
3.10
3.10
1.10 0.031
0.15 0.002
0.70 0.016
MIN
0.114
0.114
MAX
0.122
0.122
0.043
0.006
0.028
A
B
C
D
F
2.90
2.90
0.80
0.05
0.40
C
0.10 (0.004)
SEATING
PLANE
–W–
D
–T–
G
G
K
L
0.65 BSC
0.026 BSC
0.016
0.193 BSC
0.25
0.40 0.010
4.90 BSC
DETAIL E
M
0
6
0
6
http://onsemi.com
5
MC100EPT25
Notes
http://onsemi.com
6
MC100EPT25
Notes
http://onsemi.com
7
MC100EPT25
ON Semiconductor and
are trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC reserves the right to make changes
withoutfurthernoticetoanyproductsherein. SCILLCmakesnowarranty,representationorguaranteeregardingthesuitabilityofitsproductsforanyparticular
purpose, nor does SCILLC assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability,
including without limitation special, consequential or incidental damages. “Typical” parameters which may be provided in SCILLC data sheets and/or
specifications can and do vary in different applications and actual performance may vary over time. All operating parameters, including “Typicals” must be
validated for each customer application by customer’s technical experts. SCILLC does not convey any license under its patent rights nor the rights of others.
SCILLCproductsarenotdesigned, intended, orauthorizedforuseascomponentsinsystemsintendedforsurgicalimplantintothebody, orotherapplications
intended to support or sustain life, or for any other application in which the failure of the SCILLC product could create a situation where personal injury or
death may occur. Should Buyer purchase or use SCILLC products for any such unintended or unauthorized application, Buyer shall indemnify and hold
SCILLC and its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable
attorneyfees arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such claim
alleges that SCILLC was negligent regarding the design or manufacture of the part. SCILLC is an Equal Opportunity/Affirmative Action Employer.
PUBLICATION ORDERING INFORMATION
NORTH AMERICA Literature Fulfillment:
CENTRAL/SOUTH AMERICA:
Literature Distribution Center for ON Semiconductor
P.O. Box 5163, Denver, Colorado 80217 USA
Spanish Phone: 303–308–7143 (Mon–Fri 8:00am to 5:00pm MST)
Email: ONlit–spanish@hibbertco.com
Phone: 303–675–2175 or 800–344–3860 Toll Free USA/Canada
Fax: 303–675–2176 or 800–344–3867 Toll Free USA/Canada
Email: ONlit@hibbertco.com
ASIA/PACIFIC: LDC for ON Semiconductor – Asia Support
Phone: 303–675–2121 (Tue–Fri 9:00am to 1:00pm, Hong Kong Time)
Toll Free from Hong Kong & Singapore:
Fax Response Line: 303–675–2167 or 800–344–3810 Toll Free USA/Canada
001–800–4422–3781
N. American Technical Support: 800–282–9855 Toll Free USA/Canada
Email: ONlit–asia@hibbertco.com
EUROPE: LDC for ON Semiconductor – European Support
German Phone: (+1) 303–308–7140 (M–F 1:00pm to 5:00pm Munich Time)
Email: ONlit–german@hibbertco.com
JAPAN: ON Semiconductor, Japan Customer Focus Center
4–32–1 Nishi–Gotanda, Shinagawa–ku, Tokyo, Japan 141–8549
Phone: 81–3–5740–2745
French Phone: (+1) 303–308–7141 (M–F 1:00pm to 5:00pm Toulouse Time)
Email: ONlit–french@hibbertco.com
English Phone: (+1) 303–308–7142 (M–F 12:00pm to 5:00pm UK Time)
Email: ONlit@hibbertco.com
Email: r14525@onsemi.com
ON Semiconductor Website: http://onsemi.com
EUROPEAN TOLL–FREE ACCESS*: 00–800–4422–3781
For additional information, please contact your local
Sales Representative.
*Available from Germany, France, Italy, England, Ireland
MC100EPT25/D
相关型号：
©2020 ICPDF网 联系我们和版权申明