MC10EL33DT [ONSEMI]
5V ECL ±4 Divider; 5V ECL ± 4分频器
| 型号： | MC10EL33DT |
| 厂家： | 
ONSEMI |
| 描述： | 5V ECL ±4 Divider |
| 文件： | 总10页 (文件大小：156K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
MC10EL33, MC100EL33
5VꢀECL ÷4 Divider
Description
The MC10EL/100EL33 is an integrated ÷4 divider. The differential
clock inputs and the V allow a differential, single-ended or AC coupled
BB
interface to the device. The V pin, an internally generated voltage
BB
supply, is available to this device only. For single-ended input conditions,
the unused differential input is connected to V as a switching reference
BB
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MARKING
voltage. V may also rebias AC coupled inputs. When used, decouple
BB
V
BB
and V via a 0.01 mF capacitor and limit current sourcing or sinking
CC
to 0.5 mA. When not used, V should be left open.
BB
DIAGRAMS*
The reset pin is asynchronous and is asserted on the rising edge. Upon
power-up, the internal flip-flops will attain a random state; the reset allows
for the synchronization of multiple EL33’s in a system.
The 100 Series contains temperature compensation.
Features
8
8
1
8
1
HEL33
KEL33
ALYW
G
ALYW
G
SOIC−8
D SUFFIX
CASE 751
• 650 ps Propagation Delay
• 4.0 GHz Toggle Frequency
1
• ESD Protection: Human Body Model; > 1 kV,
8
1
8
8
Machine Model; > 100 V
1
HL33
ALYWG
G
KL33
ALYWG
G
• PECL Mode Operating Range: V = 4.2 V to 5.7 V with V = 0 V
CC
EE
• NECL Mode Operating Range: V = 0 V with V = −4.2 V to −5.7 V
CC
EE
TSSOP−8
DT SUFFIX
CASE 948R
• Internal Input Pulldown Resistors on CLK(s) and R.
• Meets or Exceeds JEDEC Spec EIA/JESD78 IC Latchup Test
1
• Moisture Sensitivity Level 1
For Additional Information, see Application Note AND8003/D
• Flammability Rating: UL 94 V−0 @ 0.125 in,
Oxygen Index: 28 to 34
• Transistor Count = 95 devices
• Pb−Free Packages are Available
1
4
1
4
DFN8
MN SUFFIX
CASE 506AA
Reset
CLK
1
2
8
7
V
H = MC10
L
Y
= Wafer Lot
= Year
CC
K
= MC100
4V = MC10
2K = MC100
W = Work Week
M = Date Code
G
R
Q
Q
A
= Assembly Location
= Pb−Free Package
÷4
(Note: Microdot may be in either location)
CLK
3
4
6
5
*For additional marking information, refer to
Application Note AND8002/D.
V
BB
V
EE
ORDERING INFORMATION
See detailed ordering and shipping information in the package
dimensions section on page 7 of this data sheet.
Figure 1. Logic Diagram and Pinout Assignment
© Semiconductor Components Industries, LLC, 2006
1
Publication Order Number:
December, 2006 − Rev. 9
MC10EL33/D
MC10EL33, MC100EL33
Table 1. PIN DESCRIPTION
Pin
Function
CLK, CLK
Reset
Q, Q
ECL Clock Inputs*
ECL Asynch Reset*
ECL Data Outputs
V
V
V
Reference Voltage Output
Positive Supply
BB
CC
EE
Negative Supply
EP
Exposed pad must be connected to a sufficient thermal
conduit. Electrically connect to the most negative supply or
leave floating open.
*Pins will default low when left open.
Table 2. MAXIMUM RATINGS
Symbol
Parameter
Condition 1
= 0 V
Condition 2
Rating
Unit
V
V
CC
V
EE
V
I
PECL Mode Power Supply
NECL Mode Power Supply
V
V
8
EE
= 0 V
−8
V
CC
PECL Mode Input Voltage
NECL Mode Input Voltage
V
V
= 0 V
= 0 V
V ꢀ V
6
−6
V
V
EE
I
CC
V ꢁ V
CC
I
EE
I
I
Output Current
Continuous
Surge
50
100
mA
mA
out
V
BB
Sink/Source
± 0.5
mA
°C
BB
T
Operating Temperature Range
Storage Temperature Range
−40 to +85
−65 to +150
A
T
°C
stg
q
Thermal Resistance (Junction−to−Ambient) 0 lfpm
500 lfpm
SOIC−8
SOIC−8
190
130
°C/W
°C/W
JA
q
q
Thermal Resistance (Junction−to−Case)
Standard Board
Thermal Resistance (Junction−to−Ambient) 0 lfpm
500 lfpm
Standard Board
Thermal Resistance (Junction−to−Ambient) 0 lfpm
SOIC−8
41 to 44
°C/W
JC
JA
TSSOP−8
TSSOP−8
185
140
°C/W
°C/W
q
q
Thermal Resistance (Junction−to−Case)
TSSOP−8
41 to 44 ± 5%
°C/W
JC
JA
DFN8
DFN8
129
84
°C/W
°C/W
500 lfpm
T
sol
Wave Solder
Pb <2 to 3 sec @ 248°C
Pb−Free <2 to 3 sec @ 260°C
265
265
°C
Stresses exceeding Maximum Ratings may damage the device. Maximum Ratings are stress ratings only. Functional operation above the
Recommended Operating Conditions is not implied. Extended exposure to stresses above the Recommended Operating Conditions may
affect device reliability.
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2
MC10EL33, MC100EL33
Table 3. 10EL SERIES PECL DC CHARACTERISTICS V = 5.0 V; V = 0.0 V (Note 1)
CC
EE
−40°C
25°C
Typ
85°C
Typ
Symbol
Characteristic
Power Supply Current
Min
Typ
27
Max
Min
Max
33
Min
Max Unit
I
EE
33
27
27
33
mA
mV
mV
mV
mV
V
V
V
V
V
V
V
Output HIGH Voltage (Note 2)
Output LOW Voltage (Note 2)
Input HIGH Voltage (Single−Ended)
Input LOW Voltage (Single−Ended)
Output Voltage Reference
3920
3050
3770
3050
3.57
2.5
4010
3200
4110
3350
4110
3500
3.7
4020
3050
3870
3050
3.65
2.5
4105
3210
4190
3370
4190
3520
3.75
4.6
4090
3050
3940
3050
3.69
2.5
4185
3227
4280
3405
4280
3555
3.81
4.6
OH
OL
IH
IL
BB
Input HIGH Voltage Common Mode
Range (DIfferential Configuration) (Note 3)
4.6
V
IHCMR
I
I
Input HIGH Current
Input LOW Current
150
150
150
mA
mA
IH
0.5
0.5
0.3
IL
NOTE: Device will meet the specifications after thermal equilibrium has been established when mounted in a test socket or printed circuit
board with maintained transverse airflow greater than 500 lfpm. Electrical parameters are guaranteed only over the declared
operating temperature range. Functional operation of the device exceeding these conditions is not implied. Device specification
limit values are applied individually under normal operating conditions and not valid simultaneously.
1. Input and output parameters vary 1:1 with V . V can vary +0.25 V / −0.5 V.
CC EE
2. Outputs are terminated through a 50 W resistor to V − 2.0 V.
CC
3. V
min varies 1:1 with V , V
max varies 1:1 with V . The V
range is referenced to the most positive side of the differential input
IHCMR
EE IHCMR
CC
IHCMR
signal. Normal operation is obtained if the HIGH level falls within the specified range and the peak-to-peak voltage lies between V min and 1 V.
PP
Table 4. 10EL SERIES NECL DC CHARACTERISTICS V = 0.0 V; V = −5.0 V (Note 4)
CC
EE
−40°C
25°C
Typ
27
85°C
Typ
27
Symbol
Characteristic
Power Supply Current
Min
Typ
Max
33
Min
Max
33
Min
Max Unit
I
EE
27
33
mA
mV
V
V
V
V
V
V
Output HIGH Voltage (Note 5)
Output LOW Voltage (Note 5)
Input HIGH Voltage (Single−Ended)
Input LOW Voltage (Single−Ended)
Output Voltage Reference
−1080 −990
−890
−980
−895
−810
−910
−815
−720
OH
OL
−1950 −1800 −1650 −1950 −1790 −1630 −1950 −1773 −1595 mV
−1230
−1950
−1.43
−2.5
−890 −1130
−1500 −1950
−1.30 −1.35
−810 −1060
−1480 −1950
−1.25 −1.31
−720
mV
IH
−1445 mV
IL
−1.19
−0.4
V
V
BB
Input HIGH Voltage Common Mode
Range (DIfferential Configuration) (Note 6)
−0.4
−2.5
−0.4
−2.5
IHCMR
I
I
Input HIGH Current
Input LOW Current
150
150
150
mA
mA
IH
0.5
0.5
0.3
IL
NOTE: Device will meet the specifications after thermal equilibrium has been established when mounted in a test socket or printed circuit
board with maintained transverse airflow greater than 500 lfpm. Electrical parameters are guaranteed only over the declared
operating temperature range. Functional operation of the device exceeding these conditions is not implied. Device specification
limit values are applied individually under normal operating conditions and not valid simultaneously.
4. Input and output parameters vary 1:1 with V . V can vary +0.25 V / −0.5 V.
CC EE
5. Outputs are terminated through a 50 W resistor to V − 2.0 V.
CC
6. V
min varies 1:1 with V , V
max varies 1:1 with V . The V
range is referenced to the most positive side of the differential input
IHCMR
EE IHCMR
CC
IHCMR
signal. Normal operation is obtained if the HIGH level falls within the specified range and the peak-to-peak voltage lies between V min and 1 V.
PP
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3
MC10EL33, MC100EL33
Table 5. 100EL SERIES PECL DC CHARACTERISTICS V = 5.0 V; V = 0.0 V (Note 7)
CC
EE
−40°C
25°C
Typ
85°C
Typ
Symbol
Characteristic
Power Supply Current
Min
Typ
27
Max
33
Min
Max
33
Min
Max Unit
I
EE
27
31
37
mA
mV
mV
mV
mV
V
V
V
V
V
V
V
Output HIGH Voltage (Note 8)
Output LOW Voltage (Note 8)
Input HIGH Voltage (Single−Ended)
Input LOW Voltage (Single−Ended)
Output Voltage Reference
3915
3170
3835
3190
3.62
2.5
3995
3305
4120
3445
4120
3525
3.74
4.6
3975
3190
3835
3190
3.62
2.5
4045
3295
4120
3380
4120
3525
3.74
4.6
3975
3190
3835
3190
3.62
2.5
4050
3295
4120
3380
4120
3525
3.74
4.6
OH
OL
IH
IL
BB
Input HIGH Voltage Common Mode
Range (DIfferential Configuration) (Note 9)
V
IHCMR
I
I
Input HIGH Current
Input LOW Current
150
150
150
mA
mA
IH
0.5
0.5
0.5
IL
NOTE: Device will meet the specifications after thermal equilibrium has been established when mounted in a test socket or printed circuit
board with maintained transverse airflow greater than 500 lfpm. Electrical parameters are guaranteed only over the declared
operating temperature range. Functional operation of the device exceeding these conditions is not implied. Device specification
limit values are applied individually under normal operating conditions and not valid simultaneously.
7. Input and output parameters vary 1:1 with V . V can vary +0.8 V / −0.5 V.
CC
EE
8. Outputs are terminated through a 50 W resistor to V − 2.0 V.
CC
9. V
min varies 1:1 with V , V
max varies 1:1 with V . The V
range is referenced to the most positive side of the differential input
IHCMR
EE IHCMR
CC
IHCMR
signal. Normal operation is obtained if the HIGH level falls within the specified range and the peak-to-peak voltage lies between V min and 1 V.
PP
Table 6. 100EL SERIES NECL DC CHARACTERISTICS V = 0.0 V; V = −5.0 V (Note 10)
CC
EE
−40°C
25°C
Typ
27
85°C
Typ
31
Symbol
Characteristic
Power Supply Current
Min
Typ
Max
Min
Max
33
Min
Max
37
Unit
mA
mV
I
EE
27
33
V
V
V
V
V
V
Output HIGH Voltage (Note 11)
Output LOW Voltage (Note 11)
Input HIGH Voltage (Single−Ended)
Input LOW Voltage (Single−Ended)
Output Voltage Reference
−1085 −1005 −880 −1025 −955
−880
−1025 −955
−880
OH
OL
−1830 −1695 −1555 −1810 −1705 −1620 −1810 −1705 −1620 mV
−1165
−1810
−1.38
−2.5
−880
−1165
−880
−1165
−880
mV
IH
−1475 −1810
−1475 −1810
−1475 mV
IL
−1.26
−0.4
−1.38
−2.5
−1.26
−0.4
−1.38
−2.5
−1.26
−0.4
V
V
BB
Input HIGH Voltage Common Mode
Range (DIfferential Configuration)
(Note 12)
IHCMR
I
IH
Input HIGH Current
150
150
150
mA
NOTE: Device will meet the specifications after thermal equilibrium has been established when mounted in a test socket or printed circuit
board with maintained transverse airflow greater than 500 lfpm. Electrical parameters are guaranteed only over the declared
operating temperature range. Functional operation of the device exceeding these conditions is not implied. Device specification
limit values are applied individually under normal operating conditions and not valid simultaneously.
10.Input and output parameters vary 1:1 with V . V can vary +0.8 V / −0.5 V.
CC
EE
11. Outputs are terminated through a 50 W resistor to V − 2.0 V.
CC
12. V
min varies 1:1 with V , V
max varies 1:1 with V . The V
range is referenced to the most positive side of the differential input
IHCMR
EE IHCMR
CC
IHCMR
signal. Normal operation is obtained if the HIGH level falls within the specified range and the peak-to-peak voltage lies between V min and 1 V.
PP
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4
MC10EL33, MC100EL33
Table 7. AC CHARACTERISTICS V = 5.0 V; V = 0.0 V or V = 0.0 V; V = −5.0 V (Note 13)
CC
EE
CC
EE
−40°C
Typ
25°C
Typ
4.2
85°C
Typ
4.2
Symbol
Characteristic
Maximum Toggle Frequency
Propagation Delay
Min
Max
Min
Max
Min
Max
Unit
f
3.4
4.2
3.8
3.8
GHz
max
t
t
PLH
PHL
560
400
670
540
860
700
610
460
700
550
810
660
640
570
740
480
840
670
CLK to Q
Reset to Q
ps
ps
t
Set/Reset Recovery
Input Swing (Note 14)
Cycle−to−Cycle Jitter
400
150
200
400
150
200
400
150
200
RR
V
PP
1000
350
1000
350
1000
350
mV
ps
t
1.0
1.0
1.0
JITTER
t
r
t
f
Output Rise/Fall Times Q
100
225
100
225
100
225
ps
(20% − 80%)
NOTE: Device will meet the specifications after thermal equilibrium has been established when mounted in a test socket or printed circuit
board with maintained transverse airflow greater than 500 lfpm. Electrical parameters are guaranteed only over the declared
operating temperature range. Functional operation of the device exceeding these conditions is not implied. Device specification
limit values are applied individually under normal operating conditions and not valid simultaneously.
13.10 Series: V can vary +0.25 V / −0.5 V.
EE
100 Series: V can vary +0.8 V / −0.5 V.
EE
14.V (min) is minimum input swing for which AC parameters guaranteed. The device has a DC gain of ≈40.
PP
CLK
t
RR
RESET
Q
Figure 2. Timing Diagram
Z = 50 W
Q
Q
D
D
o
Receiver
Device
Driver
Device
Z = 50 W
o
50 W
50 W
V
TT
V
TT
= V − 2.0 V
CC
Figure 3. Typical Termination for Output Driver and Device Evaluation
(See Application Note AND8020/D − Termination of ECL Logic Devices.)
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5
MC10EL33, MC100EL33
Resource Reference of Application Notes
AN1405/D
AN1406/D
AN1503/D
AN1504/D
AN1568/D
AN1672/D
AND8001/D
AND8002/D
AND8020/D
AND8066/D
AND8090/D
−
−
−
−
−
−
−
−
−
−
−
ECL Clock Distribution Techniques
Designing with PECL (ECL at +5.0 V)
ECLinPSt I/O SPiCE Modeling Kit
Metastability and the ECLinPS Family
Interfacing Between LVDS and ECL
The ECL Translator Guide
Odd Number Counters Design
Marking and Date Codes
Termination of ECL Logic Devices
Interfacing with ECLinPS
AC Characteristics of ECL Devices
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6
MC10EL33, MC100EL33
ORDERING INFORMATION
Device
†
Package
Shipping
MC10EL33D
SOIC−8
98 Units / Rail
98 Units / Rail
MC10EL33DG
SOIC−8
(Pb−Free)
MC10EL33DR2
SOIC−8
2500 / Tape & Reel
2500 / Tape & Reel
MC10EL33DR2G
SOIC−8
(Pb−Free)
MC10EL33DT
TSSOP−8
100 Units / Rail
100 Units / Rail
MC10EL33DTG
TSSOP−8
(Pb−Free)
MC10EL33DTR2
TSSOP−8
2500 / Tape & Reel
2500 / Tape & Reel
MC10EL33DTR2G
TSSOP−8
(Pb−Free)
MC10EL33MNR4
MC10EL33MNR4G
DFN8
1000 / Tape & Reel
1000 / Tape & Reel
DFN8
(Pb−Free)
MC100EL33D
SOIC−8
98 Units / Rail
98 Units / Rail
MC100EL33DG
SOIC−8
(Pb−Free)
MC100EL33DR2
SOIC−8
2500 / Tape & Reel
2500 / Tape & Reel
MC100EL33DR2G
SOIC−8
(Pb−Free)
MC100EL33DT
TSSOP−8
100 Units / Rail
100 Units / Rail
MC100EL33DTG
TSSOP−8
(Pb−Free)
MC100EL33DTR2
MC100EL33DTR2G
TSSOP−8
2500 / Tape & Reel
2500 / Tape & Reel
TSSOP−8
(Pb−Free)
MC100EL33MNR4
MC100EL33MNR4G
DFN8
1000 / Tape & Reel
1000 / Tape & Reel
DFN8
(Pb−Free)
†For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging
Specifications Brochure, BRD8011/D.
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7
MC10EL33, MC100EL33
PACKAGE DIMENSIONS
SOIC−8 NB
CASE 751−07
ISSUE AH
NOTES:
1. DIMENSIONING AND TOLERANCING PER
ANSI Y14.5M, 1982.
2. CONTROLLING DIMENSION: MILLIMETER.
3. DIMENSION A AND B DO NOT INCLUDE
MOLD PROTRUSION.
−X−
A
4. MAXIMUM MOLD PROTRUSION 0.15 (0.006)
PER SIDE.
8
5
4
5. DIMENSION D DOES NOT INCLUDE DAMBAR
PROTRUSION. ALLOWABLE DAMBAR
PROTRUSION SHALL BE 0.127 (0.005) TOTAL
IN EXCESS OF THE D DIMENSION AT
MAXIMUM MATERIAL CONDITION.
6. 751−01 THRU 751−06 ARE OBSOLETE. NEW
STANDARD IS 751−07.
S
M
M
B
0.25 (0.010)
Y
1
K
−Y−
G
MILLIMETERS
DIM MIN MAX
INCHES
MIN
MAX
0.197
0.157
0.069
0.020
A
B
C
D
G
H
J
K
M
N
S
4.80
3.80
1.35
0.33
5.00 0.189
4.00 0.150
1.75 0.053
0.51 0.013
C
N X 45
_
SEATING
PLANE
−Z−
1.27 BSC
0.050 BSC
0.10 (0.004)
0.10
0.19
0.40
0
0.25 0.004
0.25 0.007
1.27 0.016
0.010
0.010
0.050
8
0.020
0.244
M
J
H
D
8
0
_
_
_
_
0.25
5.80
0.50 0.010
6.20 0.228
M
S
S
X
0.25 (0.010)
Z
Y
SOLDERING FOOTPRINT*
1.52
0.060
7.0
4.0
0.275
0.155
0.6
0.024
1.270
0.050
mm
inches
ǒ
Ǔ
SCALE 6:1
*For additional information on our Pb−Free strategy and soldering
details, please download the ON Semiconductor Soldering and
Mounting Techniques Reference Manual, SOLDERRM/D.
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8
MC10EL33, MC100EL33
PACKAGE DIMENSIONS
TSSOP−8
DT SUFFIX
PLASTIC TSSOP PACKAGE
CASE 948R−02
ISSUE A
8x K REF
NOTES:
1. DIMENSIONING AND TOLERANCING PER ANSI
Y14.5M, 1982.
M
S
S
V
0.10 (0.004)
T U
S
0.15 (0.006) T U
2. CONTROLLING DIMENSION: MILLIMETER.
3. DIMENSION A DOES NOT INCLUDE MOLD FLASH.
PROTRUSIONS OR GATE BURRS. MOLD FLASH
OR GATE BURRS SHALL NOT EXCEED 0.15
(0.006) PER SIDE.
4. DIMENSION B DOES NOT INCLUDE INTERLEAD
FLASH OR PROTRUSION. INTERLEAD FLASH OR
PROTRUSION SHALL NOT EXCEED 0.25 (0.010)
PER SIDE.
2X L/2
8
5
4
0.25 (0.010)
B
−U−
L
1
M
PIN 1
IDENT
5. TERMINAL NUMBERS ARE SHOWN FOR
REFERENCE ONLY.
6. DIMENSION A AND B ARE TO BE DETERMINED
AT DATUM PLANE −W−.
S
0.15 (0.006) T U
A
−V−
F
DETAIL E
MILLIMETERS
INCHES
MIN
DIM MIN
MAX
3.10
3.10
MAX
0.122
0.122
0.043
0.006
0.028
A
B
C
D
F
2.90
2.90
0.80
0.05
0.40
0.114
0.114
C
1.10 0.031
0.15 0.002
0.70 0.016
0.10 (0.004)
−W−
SEATING
PLANE
D
−T−
G
G
K
L
0.65 BSC
0.026 BSC
0.25
0.40 0.010
0.016
4.90 BSC
0.193 BSC
0
DETAIL E
M
0
6
6
_
_
_
_
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9
MC10EL33, MC100EL33
PACKAGE DIMENSIONS
DFN8
CASE 506AA−01
ISSUE D
NOTES:
D
A
B
1. DIMENSIONING AND TOLERANCING PER
ASME Y14.5M, 1994 .
2. CONTROLLING DIMENSION: MILLIMETERS.
3. DIMENSION b APPLIES TO PLATED
TERMINAL AND IS MEASURED BETWEEN
0.25 AND 0.30 MM FROM TERMINAL.
4. COPLANARITY APPLIES TO THE EXPOSED
PAD AS WELL AS THE TERMINALS.
PIN ONE
REFERENCE
MILLIMETERS
DIM MIN
MAX
1.00
0.05
E
A
A1
A3
b
0.80
0.00
0.20 REF
0.20
0.30
2 X
D
D2
E
E2
e
K
2.00 BSC
0.10
C
1.10
1.30
2.00 BSC
2 X
0.70
0.90
0.50 BSC
0.10
C
TOP VIEW
0.20
0.25
−−−
0.35
L
A
0.10
0.08
C
C
8 X
(A3)
SIDE VIEW
D2
A1
SEATING
PLANE
C
e
e/2
4
1
8 X L
E2
K
8
5
0.10 C A B
8 X b
0.05
C
NOTE 3
BOTTOM VIEW
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