MC14017BDR2G [ONSEMI]

Decade Counter; 十进制计数器
MC14017BDR2G
型号: MC14017BDR2G
厂家: ONSEMI    ONSEMI
描述:

Decade Counter
十进制计数器

计数器 触发器 逻辑集成电路 光电二极管 PC
文件: 总8页 (文件大小:144K)
中文:  中文翻译
下载:  下载PDF数据表文档文件
MC14017B  
Decade Counter  
The MC14017B is a fivestage Johnson decade counter with  
builtin code converter. High speed operation and spikefree outputs  
are obtained by use of a Johnson decade counter design. The ten  
decoded outputs are normally low, and go high only at their  
appropriate decimal time period. The output changes occur on the  
positivegoing edge of the clock pulse. This part can be used in  
frequency division applications as well as decade counter or decimal  
decode display applications.  
http://onsemi.com  
MARKING  
DIAGRAMS  
Features  
16  
1
Fully Static Operation  
PDIP16  
P SUFFIX  
CASE 648  
MC14017BCP  
AWLYYWWG  
DC Clock Input Circuit Allows Slow Rise Times  
Carry Out Output for Cascading  
DividebyN Counting  
Supply Voltage Range = 3.0 Vdc to 18 Vdc  
16  
Capable of Driving Two LowPower TTL Loads or One LowPower  
Schottky TTL Load Over the Rated Temperature Range  
PinforPin Replacement for CD4017B  
SOIC16  
D SUFFIX  
CASE 751B  
14017BG  
AWLYWW  
1
Triple Diode Protection on All Inputs  
These Devices are PbFree and are RoHS Compliant  
NLV Prefix for Automotive and Other Applications Requiring  
Unique Site and Control Change Requirements; AECQ100  
Qualified and PPAP Capable  
A
WL, L  
YY, Y  
= Assembly Location  
= Wafer Lot  
= Year  
WW, W = Work Week  
G
= PbFree Indicator  
MAXIMUM RATINGS (Voltages Referenced to V  
)
SS  
Symbol  
Parameter  
Value  
0.5 to +18.0  
Unit  
V
V
DD  
DC Supply Voltage Range  
ORDERING INFORMATION  
See detailed ordering and shipping information in the package  
dimensions section on page 3 of this data sheet.  
V , V  
in out  
Input or Output Voltage Range  
(DC or Transient)  
0.5 to V + 0.5  
V
DD  
I , I  
in out  
Input or Output Current  
(DC or Transient) per Pin  
10  
mA  
P
D
Power Dissipation, per Package  
(Note 1)  
500  
mW  
T
Ambient Temperature Range  
Storage Temperature Range  
55 to +125  
65 to +150  
260  
°C  
°C  
°C  
A
T
stg  
T
Lead Temperature  
L
(8Second Soldering)  
Stresses exceeding Maximum Ratings may damage the device. Maximum  
Ratings are stress ratings only. Functional operation above the Recommended  
Operating Conditions is not implied. Extended exposure to stresses above the  
Recommended Operating Conditions may affect device reliability.  
1. Temperature Derating:  
Plastic “P and D/DW” Packages: – 7.0 mW/_C From 65_C To 125_C  
This device contains protection circuitry to guard against damage due to high  
static voltages or electric fields. However, precautions must be taken to avoid  
applications of any voltage higher than maximum rated voltages to this  
highimpedance circuit. For proper operation, V and V should be constrained  
in  
out  
to the range V v (V or V ) v V  
.
SS  
in  
out  
DD  
Unused inputs must always be tied to an appropriate logic voltage level  
(e.g., either V or V ). Unused outputs must be left open.  
SS  
DD  
© Semiconductor Components Industries, LLC, 2013  
1
Publication Order Number:  
April, 2013 Rev. 8  
MC14017B/D  
 
MC14017B  
PIN ASSIGNMENT  
Q5  
Q1  
Q0  
Q2  
Q6  
Q7  
Q3  
1
2
3
4
5
6
7
8
16  
V
DD  
15 RESET  
14 CLOCK  
13  
12  
CE  
C
out  
11 Q9  
10 Q4  
V
SS  
9
Q8  
FUNCTIONAL TRUTH TABLE  
(Positive Logic)  
BLOCK DIAGRAM  
CLOCK 14  
Q0  
Q1  
Q2  
Q3  
Q4  
Q5  
Q6  
Q7  
Q8  
Q9  
3
Clock  
Decode  
2
Clock Enable Reset Output=n  
4
0
X
X
X
1
X
0
0
0
1
0
0
0
0
n
n
Q0  
n+1  
n
7
10  
1
CLOCK  
13  
ENABLE  
5
X
6
X
1
n
n+1  
9
11  
12  
RESET 15  
C
out  
X = Don’t Care. If n < 5 Carry = “1”,  
Otherwise = “0”.  
V
= PIN 16  
= PIN 8  
DD  
V
SS  
LOGIC DIAGRAM  
Q5  
Q1  
Q7  
Q3  
7
Q9  
11  
1
2
6
14  
CLOCK  
CLOCK  
12  
C
C
D
R
Q
C
C
D
R
Q
C
C
D
R
Q
C
C
D
R
Q
Q
C
Q
Q
ENABLE  
13  
CARRY  
C
D
Q
Q
Q
R
R
R
R
R R  
15  
RESET  
3
5
4
9
10  
Q0  
Q6  
Q2  
Q3  
Q4  
http://onsemi.com  
2
MC14017B  
ELECTRICAL CHARACTERISTICS (Voltages Referenced to V  
)
SS  
55_C  
25_C  
125_C  
V
Vdc  
DD  
Characteristic  
Symbol  
Unit  
Min  
Max  
Min  
Typ  
Max  
Min  
Max  
(Note 2)  
Output Voltage  
“0” Level  
V
OL  
5.0  
10  
15  
0.05  
0.05  
0.05  
0
0
0
0.05  
0.05  
0.05  
0.05  
0.05  
0.05  
Vdc  
V
in  
= V or 0  
DD  
V
5.0  
10  
15  
4.95  
9.95  
14.95  
4.95  
9.95  
14.95  
5.0  
10  
15  
4.95  
9.95  
14.95  
Vdc  
Vdc  
“1” Level  
“0” Level  
OH  
V
in  
= 0 or V  
DD  
Input Voltage  
V
IL  
(V = 4.5 or 0.5 Vdc)  
5.0  
10  
15  
1.5  
3.0  
4.0  
2.25  
4.50  
6.75  
1.5  
3.0  
4.0  
1.5  
3.0  
4.0  
O
(V = 9.0 or 1.0 Vdc)  
O
(V = 13.5 or 1.5 Vdc)  
O
V
IH  
Vdc  
“1” Level  
(V = 0.5 or 4.5 Vdc)  
5.0  
10  
15  
3.5  
7.0  
11  
3.5  
7.0  
11  
2.75  
5.50  
8.25  
3.5  
7.0  
11  
O
(V = 1.0 or 9.0 Vdc)  
O
(V = 1.5 or 13.5 Vdc)  
O
Output Drive Current  
I
mAdc  
OH  
(V = 2.5 Vdc)  
Source  
Sink  
5.0  
5.0  
10  
– 3.0  
– 0.64  
– 1.6  
– 4.2  
– 2.4  
– 0.51  
– 1.3  
– 3.4  
– 4.2  
– 0.88  
– 2.25  
– 8.8  
– 1.7  
– 0.36  
– 0.9  
– 2.4  
OH  
(V = 4.6 Vdc)  
OH  
(V = 9.5 Vdc)  
OH  
(V = 13.5 Vdc)  
OH  
15  
I
OL  
5.0  
10  
15  
0.64  
1.6  
4.2  
0.51  
1.3  
3.4  
0.88  
2.25  
8.8  
0.36  
0.9  
2.4  
mAdc  
(V = 0.4 Vdc)  
OL  
(V = 0.5 Vdc)  
OL  
(V = 1.5 Vdc)  
OL  
Input Current  
I
15  
0.1  
0.00001  
5.0  
0.1  
7.5  
1.0  
mAdc  
in  
Input Capacitance  
C
pF  
in  
(V = 0)  
in  
Quiescent Current  
(Per Package)  
I
5.0  
10  
15  
5.0  
10  
20  
0.005  
0.010  
0.015  
5.0  
10  
20  
150  
300  
600  
mAdc  
mAdc  
DD  
Total Supply Current (Notes 3 & 4)  
(Dynamic plus Quiescent,  
Per Package)  
I
T
5.0  
10  
15  
I = (0.27 mA/kHz) f + I  
T
DD  
DD  
DD  
I = (0.55 mA/kHz) f + I  
T
I = (0.83 mA/kHz) f + I  
T
(C = 50 pF on all outputs, all  
L
buffers switching)  
2. Data labelled “Typ” is not to be used for design purposes but is intended as an indication of the IC’s potential performance.  
3. The formulas given are for the typical characteristics only at 25_C.  
4. To calculate total supply current at loads other than 50 pF:  
I (C ) = I (50 pF) + (C – 50) Vfk  
T
L
T
L
where: I is in mA (per package), C in pF, V = (V – V ) in volts, f in kHz is input frequency, and k = 0.0011.  
T
L
DD  
SS  
ORDERING INFORMATION  
Device  
Package  
Shipping  
MC14017BCPG  
PDIP16  
500 Units / Rail  
48 Units / Rail  
(PbFree)  
SOIC16  
MC14017BDG  
NLV14017BDG*  
MC14017BDR2G  
NLV14017BDR2G*  
SOIC16  
(PbFree)  
2500 Units / Tape & Reel  
†For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging  
Specifications Brochure, BRD8011/D.  
*NLV Prefix for Automotive and Other Applications Requiring Unique Site and Control Change Requirements; AECQ100 Qualified and PPAP  
Capable.  
http://onsemi.com  
3
 
MC14017B  
SWITCHING CHARACTERISTICS (Note 5) (C = 50 pF, T = 25_C)  
L
A
Characteristic  
Symbol  
V
DD  
Min  
Typ  
Max  
Unit  
Vdc  
(Note 6)  
Output Rise and Fall Time  
t
,
ns  
TLH  
t
t
t
, t  
= (1.5 ns/pF) C + 25 ns  
t
5.0  
10  
15  
100  
50  
40  
200  
100  
80  
TLH THL  
L
THL  
, t  
= (0.75 ns/pF) C + 12.5 ns  
TLH THL  
L
, t  
= (0.55 ns/pF) C + 9.5 ns  
TLH THL  
L
Propagation Delay Time  
Reset to Decode Output  
t
t
t
,
ns  
ns  
ns  
ns  
PLH  
t
PHL  
t
t
t
, t  
= (1.7 ns/pF) C + 415 ns  
= (0.66 ns/PF) C + 197 ns  
= (0.5 ns/pF) C + 150 ns  
5.0  
10  
15  
500  
230  
175  
1000  
460  
350  
PLH PHL  
L
, t  
PLH PHL  
L
, t  
PLH PHL  
L
Propagation Delay Time  
Clock to C  
,
PLH  
t
out  
PHL  
t
t
t
, t  
= (1.7 ns/pF) C + 315 ns  
= (0.66 ns/pF) C + 142 ns  
= (0.5 ns/pF) C + 100 ns  
L
5.0  
10  
15  
400  
175  
125  
800  
350  
250  
PLH PHL  
L
, t  
PLH PHL  
L
, t  
PLH PHL  
Propagation Delay Time  
Clock to Decode Output  
,
PLH  
t
PHL  
t
t
t
, t  
= (1.7 ns/pF) C + 415 ns  
= (0.66 ns/pF) C + 197 ns  
= (0.5 ns/pF) C + 150 ns  
5.0  
10  
15  
500  
230  
175  
1000  
460  
350  
PLH PHL  
L
, t  
PLH PHL  
L
, t  
PLH PHL  
L
TurnOff Delay Time  
Reset to C  
t
PLH  
out  
t
t
t
= (1.7 ns/pF) C + 315 ns  
5.0  
10  
15  
400  
175  
125  
800  
350  
250  
PLH  
PLH  
PLH  
L
= (0.66 ns/pF) C + 142 ns  
L
= (0.5 ns/pF) C + 100 ns  
L
Clock Pulse Width  
t
5.0  
10  
15  
250  
100  
75  
125  
50  
35  
ns  
MHz  
ns  
w(H)  
Clock Frequency  
f
cl  
5.0  
10  
15  
5.0  
12  
16  
2.0  
5.0  
6.7  
Reset Pulse Width  
t
5.0  
10  
15  
500  
250  
190  
250  
125  
95  
w(H)  
Reset Removal Time  
Clock Input Rise and Fall Time  
Clock Enable Setup Time  
Clock Enable Removal Time  
t
5.0  
10  
15  
750  
275  
210  
375  
135  
105  
ns  
rem  
t
,
5.0  
10  
15  
TLH  
t
No Limit  
THL  
t
5.0  
10  
15  
350  
150  
115  
175  
75  
52  
ns  
su  
t
5.0  
10  
15  
420  
200  
140  
260  
100  
70  
ns  
rem  
5. The formulas given are for the typical characteristics only at 25_C.  
6. Data labelled “Typ” is not to be used for design purposes but is intended as an indication of the IC’s potential performance.  
http://onsemi.com  
4
 
MC14017B  
V
DD  
V
out  
Output  
Sink Drive Source Drive  
Output  
CLOCK  
V
SS  
Q0  
Q1  
Q2  
Q3  
Q4  
Q5  
Q6  
Q7  
Q8  
Q9  
ENABLE  
Clock to  
desired  
outputs  
(S1 to B)  
Decode  
Outputs  
(S1 to A)  
A
B
V
S1  
S1  
DD  
I
D
RESET  
Clock to 5  
thru 9  
(S1 to B)  
V
Carry  
S1 to A  
SS  
V
V
=
=
V
DD  
V  
GS  
DD  
EXTERNAL  
POWER  
SUPPLY  
V
out  
V
V  
out DD  
DS  
C
CLOCK  
out  
V
SS  
Figure 1. Typical Output Source and Output Sink Characteristics Test Circuit  
V
DD  
0.01 mF  
I
D
500 mF  
CERAMIC  
Q0  
Q1  
Q2  
Q3  
Q4  
Q5  
Q6  
Q7  
Q8  
Q9  
CLOCK  
ENABLE  
RESET  
CLOCK  
f
c
PULSE  
GENERATOR  
C
out  
V
SS  
C
C
C
C
C
C
C
C
C
C
C
L
L
L
L
L
L
L
L
L
L
L
Figure 2. Typical Power Dissipation Test Circuit  
http://onsemi.com  
5
MC14017B  
APPLICATIONS INFORMATION  
Figure 3 shows a technique for extending the number of decoded output states for the MC14017B. Decoded outputs are  
sequential within each stage and from stage to stage, with no dead time (except propagation delay).  
RESET  
RESET  
RESET  
CLOCK  
CLOCK  
CLOCK  
MC14017B  
MC14017B  
MC14017B  
CE  
Q0 Q1  
CE  
CE  
• • •  
• • •  
• • •  
Q8 Q9  
Q8 Q9  
Q0Q1  
Q8 Q9  
Q1  
8 DECODED  
OUTPUTS  
9 DECODED  
8 DECODED  
OUTPUTS  
OUTPUTS  
CLOCK  
FIRST STAGE  
INTERMEDIATE STAGES  
LAST STAGE  
Figure 3. Counter Expansion  
Pcp  
Ncp  
90%  
V
DD  
CLOCK  
50%  
V
SS  
10%  
20 ns  
t
t
su  
20 ns  
rem  
V
DD  
CLOCK  
ENABLE  
t
V
SS  
rem  
20 ns  
20 ns  
20 ns  
V
DD  
RESET  
20 ns  
V
SS  
t
t
PLH  
PLH  
t
PHL  
Q0  
V
OH  
V
OL  
t
TLH  
t
t
PHL  
PLH  
V
90%  
10%  
OH  
50%  
Q1  
Q2  
Q3  
Q4  
Q5  
Q6  
Q7  
Q8  
V
OL  
t
t
t
t
THL  
PLH  
PHL  
TLH  
V
OH  
V
OL  
t
t
PHL  
t
t
THL  
PLH  
TLH  
V
OH  
50%  
V
OL  
t
t
t
t
THL  
PLH  
PHL  
TLH  
V
OH  
t
V
OL  
THL  
t
t
t
TLH  
PLH  
PHL  
t
PHL  
V
OH  
V
OL  
t
t
THL  
TLH  
t
t
PHL  
90%  
PLH  
V
OH  
10%  
V
OL  
t
t
THL  
THL  
t
t
PHL  
PLH  
V
OH  
V
OL  
t
THL  
V
OH  
t
PLH  
V
OL  
t
t
THL  
TLH  
t
PHL  
t
PLH  
V
OH  
Q9  
C
V
OL  
t
t
t
PHL  
t
TLH  
THL  
PHL  
t
PLH  
V
OH  
out  
V
OL  
t
THL  
t
TLH  
Figure 4. AC Measurement Definition and Functional Waveforms  
http://onsemi.com  
6
MC14017B  
PACKAGE DIMENSIONS  
PDIP16  
P SUFFIX  
PLASTIC DIP PACKAGE  
CASE 64808  
ISSUE T  
NOTES:  
A−  
1. DIMENSIONING AND TOLERANCING PER  
ANSI Y14.5M, 1982.  
2. CONTROLLING DIMENSION: INCH.  
3. DIMENSION L TO CENTER OF LEADS  
WHEN FORMED PARALLEL.  
4. DIMENSION B DOES NOT INCLUDE  
MOLD FLASH.  
16  
1
9
8
B
S
5. ROUNDED CORNERS OPTIONAL.  
INCHES  
DIM MIN MAX  
0.740 0.770 18.80 19.55  
MILLIMETERS  
F
C
L
MIN MAX  
A
B
C
D
F
0.250 0.270  
0.145 0.175  
0.015 0.021  
6.35  
3.69  
0.39  
1.02  
6.85  
4.44  
0.53  
1.77  
SEATING  
PLANE  
T−  
0.040  
0.70  
G
H
J
K
L
M
S
0.100 BSC  
2.54 BSC  
1.27 BSC  
K
M
H
J
0.050 BSC  
0.008 0.015  
0.110 0.130  
0.295 0.305  
G
0.21  
0.38  
3.30  
7.74  
10  
D 16 PL  
2.80  
7.50  
0
M
M
0.25 (0.010)  
T A  
0
10  
_
_
_
_
0.020 0.040  
0.51  
1.01  
http://onsemi.com  
7
MC14017B  
PACKAGE DIMENSIONS  
SOIC16  
D SUFFIX  
PLASTIC SOIC PACKAGE  
CASE 751B05  
ISSUE K  
NOTES:  
1. DIMENSIONING AND TOLERANCING PER ANSI  
Y14.5M, 1982.  
A−  
2. CONTROLLING DIMENSION: MILLIMETER.  
3. DIMENSIONS A AND B DO NOT INCLUDE MOLD  
PROTRUSION.  
4. MAXIMUM MOLD PROTRUSION 0.15 (0.006) PER SIDE.  
5. DIMENSION D DOES NOT INCLUDE DAMBAR  
PROTRUSION. ALLOWABLE DAMBAR PROTRUSION  
SHALL BE 0.127 (0.005) TOTAL IN EXCESS OF THE D  
DIMENSION AT MAXIMUM MATERIAL CONDITION.  
16  
9
8
B−  
P 8 PL  
M
S
B
0.25 (0.010)  
1
MILLIMETERS  
INCHES  
MIN  
0.386  
DIM MIN  
MAX  
MAX  
0.393  
0.157  
0.068  
0.019  
0.049  
A
B
C
D
F
9.80  
3.80  
1.35  
0.35  
0.40  
10.00  
G
4.00 0.150  
1.75 0.054  
0.49 0.014  
1.25 0.016  
F
R X 45  
K
_
G
J
1.27 BSC  
0.050 BSC  
0.19  
0.10  
0
0.25 0.008  
0.25 0.004  
0.009  
0.009  
7
K
M
P
R
C
7
0
_
_
_
_
T−  
SEATING  
PLANE  
5.80  
0.25  
6.20 0.229  
0.50 0.010  
0.244  
0.019  
J
M
D
16 PL  
M
S
S
A
0.25 (0.010)  
T B  
SOLDERING FOOTPRINT  
8X  
6.40  
16X  
1.12  
1
16  
16X  
0.58  
1.27  
PITCH  
8
9
DIMENSIONS: MILLIMETERS  
ON Semiconductor and  
are registered trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC owns the rights to a number of patents, trademarks,  
copyrights, trade secrets, and other intellectual property. A listing of SCILLC’s product/patent coverage may be accessed at www.onsemi.com/site/pdf/PatentMarking.pdf. SCILLC  
reserves the right to make changes without further notice to any products herein. SCILLC makes no warranty, representation or guarantee regarding the suitability of its products for any  
particular purpose, nor does SCILLC assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without  
limitation special, consequential or incidental damages. “Typical” parameters which may be provided in SCILLC data sheets and/or specifications can and do vary in different applications  
and actual performance may vary over time. All operating parameters, including “Typicals” must be validated for each customer application by customer’s technical experts. SCILLC  
does not convey any license under its patent rights nor the rights of others. SCILLC products are not designed, intended, or authorized for use as components in systems intended for  
surgical implant into the body, or other applications intended to support or sustain life, or for any other application in which the failure of the SCILLC product could create a situation where  
personal injury or death may occur. Should Buyer purchase or use SCILLC products for any such unintended or unauthorized application, Buyer shall indemnify and hold SCILLC and  
its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly,  
any claim of personal injury or death associated with such unintended or unauthorized use, even if such claim alleges that SCILLC was negligent regarding the design or manufacture  
of the part. SCILLC is an Equal Opportunity/Affirmative Action Employer. This literature is subject to all applicable copyright laws and is not for resale in any manner.  
PUBLICATION ORDERING INFORMATION  
LITERATURE FULFILLMENT:  
N. American Technical Support: 8002829855 Toll Free  
USA/Canada  
Europe, Middle East and Africa Technical Support:  
Phone: 421 33 790 2910  
Japan Customer Focus Center  
Phone: 81358171050  
ON Semiconductor Website: www.onsemi.com  
Order Literature: http://www.onsemi.com/orderlit  
Literature Distribution Center for ON Semiconductor  
P.O. Box 5163, Denver, Colorado 80217 USA  
Phone: 3036752175 or 8003443860 Toll Free USA/Canada  
Fax: 3036752176 or 8003443867 Toll Free USA/Canada  
Email: orderlit@onsemi.com  
For additional information, please contact your local  
Sales Representative  
MC14017B/D  

相关型号:

MC14017BF

Decade Counter
ONSEMI

MC14017BF

4000/14000/40000 SERIES, SYN POSITIVE EDGE TRIGGERED 10-BIT UP RING COUNTER, PDSO16, EIAJ, SOIC-16
ROCHESTER

MC14017BFEL

Decade Counter
ONSEMI

MC14017BFELG

IC 4000/14000/40000 SERIES, SYN POSITIVE EDGE TRIGGERED 10-BIT UP RING COUNTER, PDSO16, EIAJ, PLASTIC, SOIC-16, Counter
ONSEMI

MC14017BFR2

4000/14000/40000 SERIES, SYN POSITIVE EDGE TRIGGERED 10-BIT UP RING COUNTER, PDSO16, EIAJ, SOIC-16
ONSEMI

MC14017BFR2

Ring Counter, 4000/14000/40000 Series, Synchronous, Positive Edge Triggered, 10-Bit, Up Direction, CMOS, PDSO16, EIAJ, SOIC-16
ROCHESTER

MC14017B_05

Decade Counter
ONSEMI

MC14018B

Presettable Divide-By-N Counter
MOTOROLA

MC14018B

Presettable Divdie-By-N Counter
ONSEMI

MC14018BALD

Ring Counter, 4000/14000/40000 Series, Synchronous, Positive Edge Triggered, 5-Bit, Up Direction, CMOS, CDIP16, 620-09
MOTOROLA

MC14018BALDS

4000/14000/40000 SERIES, SYN POSITIVE EDGE TRIGGERED 5-BIT UP RING COUNTER, CDIP16, 620-09
MOTOROLA

MC14018BALS

IC,COUNTER,UP,DECADE,CMOS,DIP,16PIN,CERAMIC
MOTOROLA