MC14028BFEL [ONSEMI]
BCD-To-Decimal Decoder Binary-To-Octal Decoder; BCD到十进制解码器二进制到八进制解码器型号: | MC14028BFEL |
厂家: | ONSEMI |
描述: | BCD-To-Decimal Decoder Binary-To-Octal Decoder |
文件: | 总8页 (文件大小:219K) |
中文: | 中文翻译 | 下载: | 下载PDF数据表文档文件 |
The MC14028B decoder is constructed so that an 8421 BCD code
on the four inputs provides a decimal (one–of–ten) decoded output,
while a 3–bit binary input provides a decoded octal (one–of–eight)
code output with D forced to a logic “0”. Expanded decoding such as
binary–to–hexadecimal (one–of–16), etc., can be achieved by using
other MC14028B devices. The part is useful for code conversion,
address decoding, memory selection control, demultiplexing, or
readout decoding.
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MARKING
DIAGRAMS
16
• Diode Protection on All Inputs
PDIP–16
P SUFFIX
CASE 648
MC14028BCP
AWLYYWW
• Supply Voltage Range = 3.0 Vdc to 18 Vdc
• Capable of Driving Two Low–power TTL Loads or One Low–power
Schottky TTL Load Over the Rated Temperature Range
• Positive Logic Design
• Low Outputs on All Illegal Input Combinations
• Similar to CD4028B.
1
16
SOIC–16
D SUFFIX
CASE 751B
14028B
AWLYWW
1
MAXIMUM RATINGS (Voltages Referenced to V ) (Note 2.)
16
SS
SOEIAJ–16
F SUFFIX
CASE 966
Symbol
Parameter
Value
Unit
V
MC14028B
AWLYWW
V
DD
DC Supply Voltage Range
–0.5 to +18.0
V , V
in out
Input or Output Voltage Range
(DC or Transient)
–0.5 to V + 0.5
V
DD
1
I , I
Input or Output Current
(DC or Transient) per Pin
±10
mA
in out
A
= Assembly Location
WL or L = Wafer Lot
YY or Y = Year
WW or W = Work Week
P
D
Power Dissipation,
per Package (Note 3.)
500
mW
T
Ambient Temperature Range
Storage Temperature Range
–55 to +125
–65 to +150
260
°C
°C
°C
A
T
stg
ORDERING INFORMATION
T
Lead Temperature
L
(8–Second Soldering)
Device
Package
PDIP–16
SOIC–16
Shipping
2. Maximum Ratings are those values beyond which damage to the device
may occur.
3. Temperature Derating:
MC14028BCP
MC14028BD
2000/Box
2400/Box
Plastic “P and D/DW” Packages: – 7.0 mW/ C From 65 C To 125 C
MC14028BDR2
SOIC–16 2500/Tape & Reel
This device contains protection circuitry to guard against damage due to high
static voltages or electric fields. However, precautions must be taken to avoid
applications of any voltage higher than maximum rated voltages to this
MC14028BF
SOEIAJ–16
SOEIAJ–16
See Note 1.
See Note 1.
MC14028BFEL
high–impedancecircuit. For proper operation, V and V should be constrained
in
out
to the range V
(V or V
)
V
.
SS
in
out
DD
1. For ordering information on the EIAJ version of
the SOIC packages, please contact your local
ON Semiconductor representative.
Unused inputs must always be tied to an appropriate logic voltage level (e.g.,
either V or V ). Unused outputs must be left open.
SS
DD
Semiconductor Components Industries, LLC, 2000
1
Publication Order Number:
March, 2000 – Rev. 3
MC14028B/D
MC14028B
PIN ASSIGNMENT
Q4
Q2
Q0
Q7
Q9
Q5
Q6
1
2
3
4
5
6
7
8
16
V
DD
15 Q3
14 Q1
13
12
11
10
9
B
C
D
A
Q8
V
SS
TRUTH TABLE
D C B A Q9 Q8 Q7 Q6 Q5 Q4 Q3 Q2 Q1 Q0
0
0
0
0
0
0
0
0
0
0
1
1
0
1
0
1
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
1
0
0
1
0
0
1
0
0
1
0
0
0
0
0
0
0
1
1
1
1
0
0
1
1
0
1
0
1
0
0
0
0
0
0
0
0
0
0
0
1
0
0
1
0
0
1
0
0
1
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
1
1
1
1
0
0
0
0
0
0
1
1
0
1
0
1
0
1
0
0
1
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
1
1
1
1
1
1
1
1
0
0
1
1
0
1
0
1
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
BLOCK DIAGRAM
Q0
Q1
Q2
Q3
Q4
Q5
Q6
Q7
Q8
Q9
3
10
A
B
C
D
14
2
15
1
3–BIT
BINARY
INPUTS
OCTAL
DECODED
OUTPUTS
13
12
11
8421
BCD
INPUTS
DECIMAL
DECODED
OUTPUTS
6
7
4
9
5
V
V
= PIN 16
= PIN 8
DD
SS
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2
MC14028B
ELECTRICAL CHARACTERISTICS (Voltages Referenced to V
)
SS
– 55 C
25 C
125 C
V
Vdc
DD
(4.)
Characteristic
Output Voltage
Symbol
Unit
Min
Max
Min
Typ
Max
Min
Max
“0” Level
“1” Level
“0” Level
5.0
10
15
—
—
—
0.05
0.05
0.05
—
—
—
0
0
0
0.05
0.05
0.05
—
—
—
0.05
0.05
0.05
Vdc
V
in
= V or 0
DD
V
OL
5.0
10
15
4.95
9.95
14.95
—
—
—
4.95
9.95
14.95
5.0
10
15
—
—
—
4.95
9.95
14.95
—
—
—
Vdc
Vdc
V
in
= 0 or V
V
OH
DD
Input Voltage
(V = 4.5 or 0.5 Vdc)
5.0
10
15
—
—
—
1.5
3.0
4.0
—
—
—
2.25
4.50
6.75
1.5
3.0
4.0
—
—
—
1.5
3.0
4.0
O
V
IL
(V = 9.0 or 1.0 Vdc)
O
(V = 13.5 or 1.5 Vdc)
O
“1” Level
Vdc
(V = 0.5 or 4.5 Vdc)
5.0
10
15
3.5
7.0
11
—
—
—
3.5
7.0
11
2.75
5.50
8.25
—
—
—
3.5
7.0
11
—
—
—
O
V
IH
(V = 1.0 or 9.0 Vdc)
O
(V = 1.5 or 13.5 Vdc)
O
Output Drive Current
mAdc
(V = 2.5 Vdc)
Source
Sink
5.0
5.0
10
– 3.0
– 0.64
– 1.6
– 4.2
—
—
—
—
– 2.4
– 0.51
– 1.3
– 3.4
– 4.2
– 0.88
– 2.25
– 8.8
—
—
—
—
– 1.7
– 0.36
– 0.9
– 2.4
—
—
—
—
OH
(V = 4.6 Vdc)
I
OH
OH
(V = 9.5 Vdc)
OH
(V = 13.5 Vdc)
OH
15
(V = 0.4 Vdc)
5.0
10
15
0.64
1.6
4.2
—
—
—
0.51
1.3
3.4
0.88
2.25
8.8
—
—
—
0.36
0.9
2.4
—
—
—
mAdc
OL
(V = 0.5 Vdc)
I
OL
OL
(V = 1.5 Vdc)
OL
Input Current
Input Capacitance
I
15
—
—
—
± 0.1
—
—
±0.00001
± 0.1
—
—
± 1.0
µAdc
in
C
—
5.0
7.5
—
pF
in
(V = 0)
in
Quiescent Current
(Per Package)
I
5.0
10
15
—
—
—
5.0
10
20
—
—
—
0.005
0.010
0.015
5.0
10
20
—
—
—
150
300
600
µAdc
µAdc
DD
(5.) (6.)
Total Supply Current
I
T
5.0
10
15
I = (0.3 µA/kHz) f + I
T
I = (0.6 µA/kHz) f + I
T
I = (0.9 µA/kHz) f + I
T
DD
DD
DD
(Dynamic plus Quiescent,
Per Package)
(C = 50 pF on all outputs, all
L
buffers switching)
4. Data labelled “Typ” is not to be used for design purposes but is intended as an indication of the IC’s potential performance.
5. The formulas given are for the typical characteristics only at 25 C.
6. To calculate total supply current at loads other than 50 pF:
I (C ) = I (50 pF) + (C – 50) Vfk
T
L
T
L
where: I is in µA (per package), C in pF, V = (V – V ) in volts, f in kHz is input frequency, and k = 0.001.
T
L
DD
SS
SWITCHING CHARACTERISTICS (7.) (C = 50 pF, T = 25 C)
L
A
(8.)
Characteristic
Symbol
V
DD
Min
Typ
Max
Unit
Output Rise and Fall Time
t
,
ns
TLH
t
t
t
, t
= (1.5 ns/pF) C + 25 ns
t
THL
5.0
10
15
—
—
—
100
50
40
200
100
80
TLH THL
L
, t
= (0.75 ns/pF) C + 12.5 ns
TLH THL
L
, t
= (0.55 ns/pF) C + 9.5 ns
L
TLH THL
Propagation Delay Time
t
,
ns
PLH
t
t
t
, t
= (1.7 ns/pF) C + 215 ns
= (0.66 ns/pF) C + 97 ns
L
= (0.5 ns/pF) C + 65 ns
L
t
PHL
5.0
10
15
—
—
—
300
130
90
600
260
180
PLH PHL
L
, t
PLH PHL
, t
PLH PHL
7. The formulas given are for the typical characteristics only at 25 C.
8. Data labelled “Typ” is not to be used for design purposes but is intended as an indication of the IC’s potential performance.
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3
MC14028B
20 ns
INPUT A
20 ns
Inputs B, C, and D
switching in respect
to a BCD code.
All outputs connected
V
DD
90%
to respective C loads.
L
50%
f in respect to a system
clock.
10%
V
SS
1/f
20 ns
90%
20 ns
V
DD
INPUT C
50%
10%
V
SS
Inputs A, B, and D low.
t
t
PHL
PLH
V
OH
90%
50%
Q4
10%
V
OL
t
t
THL
TLH
Figure 1. Dynamic Signal Waveforms
LOGIC DIAGRAM
Q0
Q1
Q2
Q3
Q4
Q5
Q6
Q7
Q8
Q9
A
B
C
D
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4
MC14028B
INPUTS
APPLICATIONS INFORMATION
D
D
C
B
A
Expanded decoding can be performed by using the
MC14028B and other CMOS Integrated Circuits. The
circuit in Figure 2 converts any 4–bit code to a decimal or
hexadecimal code. The accompanying table shows the input
binary combinations, the associated “output numbers” that
go “high” when selected, and the “redefined output
numbers” needed for the proper code. For example: For the
combinationDCBA = 0111 the output number 7 is redefined
for the 4–bit binary, 4–bit gray, excess–3, or excess–3 gray
codes as 7, 5, 4, or 2, respectively. Figure 3 shows a 6–bit
binary 1–of–64 decoder using nine MC14028B circuits and
two MC14069UB inverters.
D
C
B
A
C
B
A
MC14028B
MC14028B
Q9
Q0
Q9
Q0
–0
15
–8
15
OUTPUT NUMBERS
Figure 2. Code Conversion Circuit and Truth Table
The MC14028B can be used in decimal digit displays,
such as, neon readouts or incandescent projection indicators
as shown in Figure 4.
Code and Redefined
Output Numbers
Hexadecimal
Decimal
Inputs
Output Numbers
D
C
B
A
15 14 13 12 11 10
9
8
7
6
5
4
3
2
1
0
0
0
0
0
0
0
0
0
0
0
1
1
0
1
0
1
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
1
0
0
1
0
0
1
0
0
1
0
0
0
0
1
2
3
0
1
3
2
0
1
2
3
0
1
2
0
3
0
0
0
0
0
1
1
1
1
0
0
1
1
0
1
0
1
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
1
0
0
1
0
0
1
0
0
1
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
4
5
6
7
7
6
4
5
1
2
3
4
4
4
3
4
1
2
1
1
1
1
0
0
0
0
0
0
1
1
0
1
0
1
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
1
0
0
1
0
0
1
0
0
1
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
8
9
15
14
5
6
7
8
5
6
10 12
11 13
9
5
1
1
1
1
1
1
1
1
0
0
1
1
0
1
0
1
0
0
0
1
0
0
1
0
0
1
0
0
1
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
12
13
14 11
15 10
8
9
9
5
6
8
7
6
7
8
9
7
8
9
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5
MC14028B
INPUTS
A
B
C
D
A
E
B
F
INHIBIT
–D
(NO SELECTION)
C
MC14028B
Q0
Q9
A B
MC14028B
Q0 Q9 Q0
C
D
A B
MC14028B
C
D
A B
MC14028B
Q9 Q0 Q9 Q0
C
D
A B
MC14028B
Q9 Q0
C
D
A B
MC14028B
Q9 Q0
C
D
A B
MC14028B
Q9 Q0
C
D
A B
MC14028B
Q9 Q0
C
D
A B
MC14028B
Q9
C D
0
7
8
15
16
23
24
31
32
39
40
47
48
55
56
63
*1/6 MC14069UB
64 OUTPUTS (SELECTED OUTPUT IS HIGH)
Figure 3. Six–Bit Binary 1–of–64 Decoder
APPROPRIATE
VOLTAGE
APPROPRIATE
VOLTAGE
Q0
Q1
Q2
Q3
Q4
Q5
Q6
Q7
Q8
Q9
A
NEON
DISPLAY
INCANDESCENT
DISPLAY
B
C
D
OR
MC14028B
0
9
9
2
1
0
Figure 4. Decimal Digit Display Application
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6
MC14028B
PACKAGE DIMENSIONS
PDIP–16
P SUFFIX
PLASTIC DIP PACKAGE
CASE 648–08
ISSUE R
NOTES:
–A–
1. DIMENSIONING AND TOLERANCING PER ANSI
Y14.5M, 1982.
2. CONTROLLING DIMENSION: INCH.
3. DIMENSION L TO CENTER OF LEADS WHEN
FORMED PARALLEL.
16
1
9
8
B
S
4. DIMENSION B DOES NOT INCLUDE MOLD FLASH.
5. ROUNDED CORNERS OPTIONAL.
INCHES
DIM MIN MAX
0.740 0.770 18.80 19.55
MILLIMETERS
MIN MAX
F
A
B
C
D
F
G
H
J
K
L
M
S
C
L
0.250 0.270
0.145 0.175
0.015 0.021
6.35
3.69
0.39
1.02
6.85
4.44
0.53
1.77
0.040
0.70
SEATING
PLANE
–T–
0.100 BSC
0.050 BSC
0.008 0.015
2.54 BSC
1.27 BSC
K
M
0.21
0.38
3.30
7.74
10
H
J
0.110
0.295 0.305
10
0.020 0.040
0.130
2.80
7.50
0
G
D 16 PL
0
0.51
1.01
M
M
0.25 (0.010)
T A
SOIC–16
D SUFFIX
PLASTIC SOIC PACKAGE
CASE 751B–05
ISSUE J
–A–
NOTES:
1. DIMENSIONING AND TOLERANCING PER ANSI
Y14.5M, 1982.
2. CONTROLLING DIMENSION: MILLIMETER.
3. DIMENSIONS A AND B DO NOT INCLUDE
MOLD PROTRUSION.
16
1
9
–B–
P 8 PL
4. MAXIMUM MOLD PROTRUSION 0.15 (0.006)
PER SIDE.
M
S
0.25 (0.010)
B
8
5. DIMENSION D DOES NOT INCLUDE DAMBAR
PROTRUSION. ALLOWABLE DAMBAR
PROTRUSION SHALL BE 0.127 (0.005) TOTAL
IN EXCESS OF THE D DIMENSION AT
MAXIMUM MATERIAL CONDITION.
G
MILLIMETERS
DIM MIN MAX
INCHES
MIN
MAX
0.393
0.157
0.068
0.019
0.049
F
A
B
C
D
F
9.80
3.80
1.35
0.35
0.40
10.00 0.386
4.00 0.150
1.75 0.054
0.49 0.014
1.25 0.016
R X 45
K
C
G
J
K
M
P
1.27 BSC
0.050 BSC
–T–
SEATING
PLANE
0.19
0.10
0
0.25 0.008
0.25 0.004
0.009
0.009
7
J
M
D
16 PL
7
0
5.80
0.25
6.20 0.229
0.50 0.010
0.244
0.019
M
S
S
0.25 (0.010)
T B
A
R
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7
MC14028B
PACKAGE DIMENSIONS
SOEIAJ–16
F SUFFIX
PLASTIC EIAJ SOIC PACKAGE
CASE 966–01
NOTES:
1. DIMENSIONING AND TOLERANCING PER ANSI
ISSUE O
Y14.5M, 1982.
2. CONTROLLING DIMENSION: MILLIMETER.
3. DIMENSIONS D AND E DO NOT INCLUDE
MOLD FLASH OR PROTRUSIONS AND ARE
MEASURED AT THE PARTING LINE. MOLD FLASH
OR PROTRUSIONS SHALL NOT EXCEED 0.15
(0.006) PER SIDE.
L
E
16
9
8
Q
1
H
E
M
4. TERMINAL NUMBERS ARE SHOWN FOR
REFERENCE ONLY.
E
5. THE LEAD WIDTH DIMENSION (b) DOES NOT
INCLUDE DAMBAR PROTRUSION. ALLOWABLE
DAMBAR PROTRUSION SHALL BE 0.08 (0.003)
TOTAL IN EXCESS OF THE LEAD WIDTH
DIMENSION AT MAXIMUM MATERIAL CONDITION.
DAMBAR CANNOT BE LOCATED ON THE LOWER
RADIUS OR THE FOOT. MINIMUM SPACE
BETWEEN PROTRUSIONS AND ADJACENT LEAD
TO BE 0.46 ( 0.018).
1
L
DETAIL P
Z
D
VIEW P
e
MILLIMETERS
INCHES
A
DIM MIN
MAX
MIN
–––
MAX
0.081
0.008
0.020
0.011
0.413
0.215
c
A
1
–––
0.05
0.35
0.18
9.90
5.10
2.05
A
0.20 0.002
0.50 0.014
0.27 0.007
10.50 0.390
5.45 0.201
b
c
D
E
A
1
b
0.13 (0.005)
e
1.27 BSC
0.050 BSC
0.10 (0.004)
M
H
7.40
0.50
1.10
0
0.70
–––
8.20 0.291
0.85 0.020
1.50 0.043
10
0.90 0.028
0.78 –––
0.323
0.033
0.059
10
0.035
0.031
E
L
L
E
M
Q
0
1
Z
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